DE3788355D1 - Eingangs/ausgangsnetz für ein rechnersystem. - Google Patents

Eingangs/ausgangsnetz für ein rechnersystem.

Info

Publication number
DE3788355D1
DE3788355D1 DE87906702T DE3788355T DE3788355D1 DE 3788355 D1 DE3788355 D1 DE 3788355D1 DE 87906702 T DE87906702 T DE 87906702T DE 3788355 T DE3788355 T DE 3788355T DE 3788355 D1 DE3788355 D1 DE 3788355D1
Authority
DE
Germany
Prior art keywords
input
computer system
output network
network
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE87906702T
Other languages
English (en)
Other versions
DE3788355T2 (de
Inventor
Michael Fischer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Datapoint Corp
Original Assignee
Datapoint Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Datapoint Corp filed Critical Datapoint Corp
Publication of DE3788355D1 publication Critical patent/DE3788355D1/de
Application granted granted Critical
Publication of DE3788355T2 publication Critical patent/DE3788355T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G06F13/128—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine for dedicated transfers to a network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
    • H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
    • H04L69/322—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions
    • H04L69/327—Intralayer communication protocols among peer entities or protocol data unit [PDU] definitions in the session layer [OSI layer 5]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer And Data Communications (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Control By Computers (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
DE87906702T 1986-12-12 1987-09-18 Eingangs/ausgangsnetz für ein rechnersystem. Expired - Fee Related DE3788355T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/941,084 US4941089A (en) 1986-12-12 1986-12-12 Input/output network for computer system
PCT/US1987/002388 WO1988004511A1 (en) 1986-12-12 1987-09-18 Input/output network for computer system

Publications (2)

Publication Number Publication Date
DE3788355D1 true DE3788355D1 (de) 1994-01-13
DE3788355T2 DE3788355T2 (de) 1994-05-05

Family

ID=25475892

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87906702T Expired - Fee Related DE3788355T2 (de) 1986-12-12 1987-09-18 Eingangs/ausgangsnetz für ein rechnersystem.

Country Status (9)

Country Link
US (1) US4941089A (de)
EP (1) EP0333715B1 (de)
JP (1) JPH0783365B2 (de)
KR (1) KR950014178B1 (de)
AU (1) AU614499B2 (de)
CA (1) CA1293820C (de)
DE (1) DE3788355T2 (de)
DK (1) DK444988A (de)
WO (1) WO1988004511A1 (de)

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Also Published As

Publication number Publication date
KR880008170A (ko) 1988-08-30
AU614499B2 (en) 1991-09-05
JPH02501787A (ja) 1990-06-14
EP0333715A1 (de) 1989-09-27
DK444988D0 (da) 1988-08-09
EP0333715A4 (en) 1991-01-30
AU8039487A (en) 1988-06-30
JPH0783365B2 (ja) 1995-09-06
DK444988A (da) 1988-09-20
EP0333715B1 (de) 1993-12-01
CA1293820C (en) 1991-12-31
DE3788355T2 (de) 1994-05-05
WO1988004511A1 (en) 1988-06-16
US4941089A (en) 1990-07-10
KR950014178B1 (ko) 1995-11-22

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