DE3780551T2 - Speichereinrichtung unter verwendung von adressenmultiplex. - Google Patents

Speichereinrichtung unter verwendung von adressenmultiplex.

Info

Publication number
DE3780551T2
DE3780551T2 DE8787112567T DE3780551T DE3780551T2 DE 3780551 T2 DE3780551 T2 DE 3780551T2 DE 8787112567 T DE8787112567 T DE 8787112567T DE 3780551 T DE3780551 T DE 3780551T DE 3780551 T2 DE3780551 T2 DE 3780551T2
Authority
DE
Germany
Prior art keywords
storage device
address multiplex
multiplex
address
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787112567T
Other languages
English (en)
Other versions
DE3780551D1 (de
Inventor
Masao Nakano
Hirohiko Mochizuki
Tsuyoshi Ohira
Yukinori Kodama
Hidenori Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP61208527A external-priority patent/JPS6364698A/ja
Priority claimed from JP61208526A external-priority patent/JPS6364697A/ja
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Publication of DE3780551D1 publication Critical patent/DE3780551D1/de
Application granted granted Critical
Publication of DE3780551T2 publication Critical patent/DE3780551T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C8/00Arrangements for selecting an address in a digital store
    • G11C8/04Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
DE8787112567T 1986-09-04 1987-08-28 Speichereinrichtung unter verwendung von adressenmultiplex. Expired - Fee Related DE3780551T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP61208527A JPS6364698A (ja) 1986-09-04 1986-09-04 記憶装置
JP61208526A JPS6364697A (ja) 1986-09-04 1986-09-04 記憶装置

Publications (2)

Publication Number Publication Date
DE3780551D1 DE3780551D1 (de) 1992-08-27
DE3780551T2 true DE3780551T2 (de) 1993-03-11

Family

ID=26516884

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787112567T Expired - Fee Related DE3780551T2 (de) 1986-09-04 1987-08-28 Speichereinrichtung unter verwendung von adressenmultiplex.

Country Status (4)

Country Link
US (1) US4807192A (de)
EP (1) EP0262413B1 (de)
KR (1) KR910006110B1 (de)
DE (1) DE3780551T2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0476282A3 (en) * 1990-07-31 1992-06-24 Texas Instruments Incorporated Improvements in or relating to integrated circuits
US5323355A (en) * 1991-01-22 1994-06-21 Fujitsu Limited Semiconductor memory device
JPH0628846A (ja) * 1992-07-09 1994-02-04 Mitsubishi Electric Corp 半導体記憶装置
US5590307A (en) * 1993-01-05 1996-12-31 Sgs-Thomson Microelectronics, Inc. Dual-port data cache memory
US5692148A (en) * 1994-04-11 1997-11-25 Intel Corporation Method and apparatus for improving system memory cost/performance using extended data out (EDO)DRAM and split column addresses
FR2757305B1 (fr) * 1996-12-17 1999-01-15 Sgs Thomson Microelectronics Dispositif et procede de lecture incrementale d'une memoire
US6336159B1 (en) 1997-06-25 2002-01-01 Intel Corporation Method and apparatus for transferring data in source-synchronous protocol and transferring signals in common clock protocol in multiple agent processing system
KR100600053B1 (ko) * 2004-07-27 2006-07-13 주식회사 하이닉스반도체 어드레스핀과 데이터핀을 공유하는 의사 에스램

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0162234A3 (de) * 1980-07-23 1986-03-19 Nec Corporation Speicheranordnung
US4344156A (en) * 1980-10-10 1982-08-10 Inmos Corporation High speed data transfer for a semiconductor memory
JPS6052513B2 (ja) * 1981-12-02 1985-11-19 富士通株式会社 半導体記憶装置
US4567579A (en) * 1983-07-08 1986-01-28 Texas Instruments Incorporated Dynamic memory with high speed nibble mode
US4675808A (en) * 1983-08-08 1987-06-23 American Telephone And Telegraph Company At&T Bell Laboratories Multiplexed-address interface for addressing memories of various sizes
JPS6072020A (ja) * 1983-09-29 1985-04-24 Nec Corp デュアルポ−トメモリ回路
FR2554952B1 (fr) * 1983-11-15 1989-04-28 Telecommunications Sa Procede et systeme d'adressage pour memoire dynamique
US4608678A (en) * 1983-12-23 1986-08-26 Advanced Micro Devices, Inc. Semiconductor memory device for serial scan applications
JPS60200287A (ja) * 1984-03-24 1985-10-09 株式会社東芝 記憶装置

Also Published As

Publication number Publication date
KR910006110B1 (en) 1991-08-13
EP0262413B1 (de) 1992-07-22
KR880004476A (ko) 1988-06-04
DE3780551D1 (de) 1992-08-27
US4807192A (en) 1989-02-21
EP0262413A1 (de) 1988-04-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee