DE3642071A1 - Recoding circuit for recoding decimal digits from 5211 code into the 54321 code - Google Patents

Recoding circuit for recoding decimal digits from 5211 code into the 54321 code

Info

Publication number
DE3642071A1
DE3642071A1 DE19863642071 DE3642071A DE3642071A1 DE 3642071 A1 DE3642071 A1 DE 3642071A1 DE 19863642071 DE19863642071 DE 19863642071 DE 3642071 A DE3642071 A DE 3642071A DE 3642071 A1 DE3642071 A1 DE 3642071A1
Authority
DE
Germany
Prior art keywords
recoding
code
circuit
decimal digits
inputs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19863642071
Other languages
German (de)
Inventor
Paul Merkle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to DE19863642071 priority Critical patent/DE3642071A1/en
Priority to DE19873700288 priority patent/DE3700288A1/en
Publication of DE3642071A1 publication Critical patent/DE3642071A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Lock And Its Accessories (AREA)

Abstract

The recoding circuit according to the subject-matter of the invention is not as simple as the 5211/54321 recoding circuit according to P 3700288.0 and consists of 6 AND gates 1 having 2 inputs each and 3 negating circuits 2 and one OR gate 3 having 2 inputs. <IMAGE>

Description

Gegenstand der Erfindung ist eine Umcodierschaltung, welche Dezimalziffern vom 5211-Code in den 54321-Code umcodiert. Die sehr einfache, gegenläufige Umcodierschaltung, welche Dezimalziffern vom 54321-Code in den 5211-Code umcodiert, ist auch dargestellt.The invention relates to a recoding circuit, which Decimal digits recoded from the 5211 code to the 54321 code. The very simple, counter-rotating recoding circuit, which Decimal digits recoded from the 54321 code to the 5211 code, is also shown.

Die 5211/54321-Umcodierschaltung ist in Fig. 1 dargestellt.The 5211/54321 recoding circuit is shown in FIG. 1.

Die 54321/5211-Umcodierschaltung ist in Fig. 2 dargestellt.The 54321/5211 recoding circuit is shown in FIG. 2.

Der 5211-Code ist in Fig. 3 dargestellt.The 5211 code is shown in FIG. 3.

Der 54321-Code ist in Fig. 4 dargestellt.The 54321 code is shown in FIG. 4.

Die 5211/54321-Umcodierschaltung, welche Dezimalziffern vom 5211-Code in den 54321-Code umcodiert und in Fig. 1 darge­ stellt ist, besteht aus 6 Und-Schaltungen 1 mit je 2 Ein­ gängen und 3 Negierschaltungen 2 und einer Oder-Schaltung 3 mit 2 Eingängen. Die Eingänge A und die Ausgänge B sind mit den zugehörigen Zahlenwerten gekennzeichnet.The 5211/54321 recoding circuit, which is the decimal digits from the 5211 code to the 54321 code and is shown in FIG. 1, consists of 6 AND circuits 1 each with 2 inputs and 3 negating circuits 2 and an OR circuit 3 with 2 entrances. Inputs A and outputs B are marked with the associated numerical values.

Die 54321/5211-Umcodierschaltung, welche Dezimalziffern vom 54321-Code in den 5211-Code umcodiert und in Fig. 2 darge­ stellt ist, besteht aus einer Oder-Schaltung 7 mit 4 Ein­ gängen und 2 Oder-Schaltungen 8 mit je 2 Eingängen. Die Ein­ gänge A und die Ausgänge B sind auch mit den zugehörigen Zahlenwerten gekennzeichnet.The 54321/5211 recoding circuit, which is the decimal digits from the 54321 code into the 5211 code and is shown in FIG. 2, consists of an OR circuit 7 with 4 inputs and 2 OR circuits 8 with 2 inputs each. Inputs A and outputs B are also marked with the associated numerical values.

Claims (5)

1. Umcodierschaltung für die Umcodierung von Dezimal- Ziffern vom 5211-Code in den 54321-Code, dadurch ge­ kennzeichnet, daß sie keine Und-Schaltung mit mehr als 2 Eingängen aufweist.1. Recoding circuit for the recoding of decimal digits from the 5211 code to the 54321 code, characterized in that it has no AND circuit with more than 2 inputs. 2. Umcodierschaltung nach Anspruch 1, dadurch gekenn­ zeichnet, daß sie nicht mehr als 8 Und-Schaltungen (1) aufweist.2. recoding circuit according to claim 1, characterized in that it has no more than 8 AND circuits ( 1 ). 3. Umcodierschaltung nach Anspruch 1 oder nach Anspruch 1 und 2, dadurch gekennzeichnet, daß sie nur 6 Und- Schaltungen (1) mit je 2 Eingängen aufweist.3. transcoding circuit according to claim 1 or according to claim 1 and 2, characterized in that it has only 6 AND circuits ( 1 ) with 2 inputs each. 4. Umcodierschaltung nach Anspruch 1 oder nach Anspruch 1 und 2 oder nach Anspruch 1 bis 3, dadurch gekennzeich­ net, daß sie aus 6 Und-Schaltungen (1) mit je 2 Ein­ gängen und 3 Negierschaltungen (2) und einer Oder- Schaltung (3) mit 2 Eingängen besteht.4. recoding circuit according to claim 1 or according to claim 1 and 2 or according to claim 1 to 3, characterized in that it consists of 6 AND circuits ( 1 ) with 2 A gears and 3 negating circuits ( 2 ) and an OR circuit ( 3 ) with 2 inputs. 5. Umcodierschaltung nach Anspruch 1 oder nach Anspruch 1 und 2 oder nach Anspruch 1 bis 3 oder nach Anspruch 1 bis 4, dadurch gekennzeichnet, daß sie 3 direkte und eine indirekte Sperr-Ansteuerung aufweist.5. recoding circuit according to claim 1 or according to claim 1 and 2 or according to claim 1 to 3 or according to claim 1 to 4, characterized in that they have 3 direct and has an indirect lock control.
DE19863642071 1986-12-09 1986-12-09 Recoding circuit for recoding decimal digits from 5211 code into the 54321 code Withdrawn DE3642071A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE19863642071 DE3642071A1 (en) 1986-12-09 1986-12-09 Recoding circuit for recoding decimal digits from 5211 code into the 54321 code
DE19873700288 DE3700288A1 (en) 1986-12-09 1987-01-07 Encoder circuit for decimal 5211-code to 54321-code - has two stages with one OR-gate and one AND-gate and three AND-gates and three inverters

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19863642071 DE3642071A1 (en) 1986-12-09 1986-12-09 Recoding circuit for recoding decimal digits from 5211 code into the 54321 code

Publications (1)

Publication Number Publication Date
DE3642071A1 true DE3642071A1 (en) 1988-06-16

Family

ID=6315815

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19863642071 Withdrawn DE3642071A1 (en) 1986-12-09 1986-12-09 Recoding circuit for recoding decimal digits from 5211 code into the 54321 code

Country Status (1)

Country Link
DE (1) DE3642071A1 (en)

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