DE3587765D1 - Einrichtung zum Speichern von multi-bit Bildelementdaten. - Google Patents

Einrichtung zum Speichern von multi-bit Bildelementdaten.

Info

Publication number
DE3587765D1
DE3587765D1 DE85114750T DE3587765T DE3587765D1 DE 3587765 D1 DE3587765 D1 DE 3587765D1 DE 85114750 T DE85114750 T DE 85114750T DE 3587765 T DE3587765 T DE 3587765T DE 3587765 D1 DE3587765 D1 DE 3587765D1
Authority
DE
Germany
Prior art keywords
picture element
element data
storing multi
bit picture
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE85114750T
Other languages
English (en)
Other versions
DE3587765T2 (de
Inventor
Charles B Schnarel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of DE3587765D1 publication Critical patent/DE3587765D1/de
Application granted granted Critical
Publication of DE3587765T2 publication Critical patent/DE3587765T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/02—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed
    • G09G5/022—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the way in which colour is displayed using memory planes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Image Input (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
DE3587765T 1984-11-21 1985-11-21 Einrichtung zum Speichern von multi-bit Bildelementdaten. Expired - Fee Related DE3587765T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US67381784A 1984-11-24 1984-11-24

Publications (2)

Publication Number Publication Date
DE3587765D1 true DE3587765D1 (de) 1994-04-07
DE3587765T2 DE3587765T2 (de) 1994-06-09

Family

ID=24704225

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3587765T Expired - Fee Related DE3587765T2 (de) 1984-11-21 1985-11-21 Einrichtung zum Speichern von multi-bit Bildelementdaten.

Country Status (4)

Country Link
US (1) US4888582A (de)
EP (1) EP0182375B1 (de)
JP (1) JPS61130985A (de)
DE (1) DE3587765T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4897812A (en) * 1986-06-25 1990-01-30 Wang Laboratories, Inc. Graphics adapter
JPS6358395A (ja) * 1986-08-11 1988-03-14 テクトロニックス・インコ−ポレイテッド カラ−表示装置
US4808986A (en) * 1987-02-12 1989-02-28 International Business Machines Corporation Graphics display system with memory array access
US5195056A (en) * 1987-05-21 1993-03-16 Texas Instruments, Incorporated Read/write memory having an on-chip input data register, having pointer circuits between a serial data register and input/output buffer circuits
JPS6465596A (en) * 1987-08-05 1989-03-10 Texas Instruments Inc Memory
JPH0750391B2 (ja) * 1987-10-30 1995-05-31 株式会社日立製作所 表示用メモリ制御装置
US4953104A (en) * 1989-05-18 1990-08-28 Eastman Kodak Company Page buffer for an electronic gray-scale color printer
JPH032896A (ja) * 1989-05-31 1991-01-09 Fujitsu Ltd Ｖ―ｒａｍ表示装置
US5162788A (en) * 1989-06-16 1992-11-10 Apple Computer, Inc. Chunky planar data packing apparatus and method for a video memory
CA2062200A1 (en) * 1991-03-15 1992-09-16 Stephen C. Purcell Decompression processor for video applications
EP0525750A3 (en) * 1991-07-30 1995-03-22 Tokyo Shibaura Electric Co Display control apparatus
US5815646A (en) * 1993-04-13 1998-09-29 C-Cube Microsystems Decompression processor for video applications
JPH07129139A (ja) * 1993-11-05 1995-05-19 Fujitsu Ltd 表示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810135B2 (ja) * 1973-03-20 1983-02-24 松下電器産業株式会社 ハイガスジヨウカヨウシヨクバイタイ
JPS592905B2 (ja) * 1976-08-31 1984-01-21 日本ビクター株式会社 デイスプレイ装置
JPS53114617A (en) * 1977-03-17 1978-10-06 Toshiba Corp Memory unit for picture processing
JPS5576437A (en) * 1978-12-04 1980-06-09 Hitachi Ltd Graphic display unit
JPS5716487A (en) * 1980-04-11 1982-01-27 Ampex Computer graphic system
US4352100A (en) * 1980-11-24 1982-09-28 Ncr Corporation Image formatting apparatus for visual display
WO1983003916A1 (en) * 1982-04-22 1983-11-10 Sinclair Research Limited Display for a computer
US4562435A (en) * 1982-09-29 1985-12-31 Texas Instruments Incorporated Video display system using serial/parallel access memories
US4620186A (en) * 1983-08-30 1986-10-28 Zenith Electronics Corporation Multi-bit write feature for video RAM
US4688031A (en) * 1984-03-30 1987-08-18 Wang Laboratories, Inc. Monochromatic representation of color images
US4635049A (en) * 1984-06-27 1987-01-06 Tektronix, Inc. Apparatus for presenting image information for display graphically

Also Published As

Publication number Publication date
EP0182375B1 (de) 1994-03-02
JPS61130985A (ja) 1986-06-18
DE3587765T2 (de) 1994-06-09
EP0182375A2 (de) 1986-05-28
EP0182375A3 (en) 1988-11-09
US4888582A (en) 1989-12-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee