DE3587283T2 - Leistungsabführanordnung einer Speicherzelle. - Google Patents

Leistungsabführanordnung einer Speicherzelle.

Info

Publication number
DE3587283T2
DE3587283T2 DE85402151T DE3587283T DE3587283T2 DE 3587283 T2 DE3587283 T2 DE 3587283T2 DE 85402151 T DE85402151 T DE 85402151T DE 3587283 T DE3587283 T DE 3587283T DE 3587283 T2 DE3587283 T2 DE 3587283T2
Authority
DE
Germany
Prior art keywords
memory cell
power dissipation
dissipation arrangement
arrangement
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE85402151T
Other languages
English (en)
Other versions
DE3587283D1 (de
Inventor
William H Herndon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Semiconductor Corp filed Critical Fairchild Semiconductor Corp
Publication of DE3587283D1 publication Critical patent/DE3587283D1/de
Application granted granted Critical
Publication of DE3587283T2 publication Critical patent/DE3587283T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
DE85402151T 1984-11-09 1985-11-07 Leistungsabführanordnung einer Speicherzelle. Expired - Fee Related DE3587283T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/669,929 US4627034A (en) 1984-11-09 1984-11-09 Memory cell power scavenging apparatus and method

Publications (2)

Publication Number Publication Date
DE3587283D1 DE3587283D1 (de) 1993-05-27
DE3587283T2 true DE3587283T2 (de) 1993-10-21

Family

ID=24688311

Family Applications (1)

Application Number Title Priority Date Filing Date
DE85402151T Expired - Fee Related DE3587283T2 (de) 1984-11-09 1985-11-07 Leistungsabführanordnung einer Speicherzelle.

Country Status (5)

Country Link
US (1) US4627034A (de)
EP (1) EP0181819B1 (de)
JP (1) JPS61160895A (de)
CA (1) CA1238419A (de)
DE (1) DE3587283T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6145491A (ja) * 1984-08-10 1986-03-05 Fujitsu Ltd 半導体記憶装置
US4792923A (en) * 1985-08-30 1988-12-20 Mitsubishi Denki Kabushiki Kaisha Bipolar semiconductor memory device with double word lines structure
JPH0770216B2 (ja) * 1985-11-22 1995-07-31 株式会社日立製作所 半導体集積回路
IL83184A0 (en) * 1986-07-15 1987-12-31 Sundstrand Data Control Method and apparatus for memory mapping topographical data
US5663919A (en) * 1996-02-28 1997-09-02 Micron Technology, Inc. Memory device with regulated power supply control
US7298152B1 (en) 2006-05-19 2007-11-20 The Boeing Company Damage detection system
US8594882B2 (en) * 2008-01-16 2013-11-26 The Boeing Company Damage detection system

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576198B2 (de) * 1974-08-09 1982-02-03
FR2443118A1 (fr) * 1978-11-30 1980-06-27 Ibm France Dispositif pour l'alimentation des memoires monolithiques
JPS5831673B2 (ja) * 1979-08-22 1983-07-07 富士通株式会社 半導体記憶装置
JPS5677981A (en) * 1979-11-28 1981-06-26 Oki Electric Ind Co Ltd Memory access circuit
US4422162A (en) * 1980-10-01 1983-12-20 Motorola, Inc. Non-dissipative memory system
US4488263A (en) * 1982-03-29 1984-12-11 Fairchild Camera & Instrument Corp. Bypass circuit for word line cell discharge current

Also Published As

Publication number Publication date
DE3587283D1 (de) 1993-05-27
EP0181819A2 (de) 1986-05-21
US4627034A (en) 1986-12-02
JPS61160895A (ja) 1986-07-21
EP0181819B1 (de) 1993-04-21
CA1238419A (en) 1988-06-21
EP0181819A3 (en) 1988-06-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee