DE3586840T2 - Speichersystem mit integriertem schaltkreis. - Google Patents

Speichersystem mit integriertem schaltkreis.

Info

Publication number
DE3586840T2
DE3586840T2 DE8585111751T DE3586840T DE3586840T2 DE 3586840 T2 DE3586840 T2 DE 3586840T2 DE 8585111751 T DE8585111751 T DE 8585111751T DE 3586840 T DE3586840 T DE 3586840T DE 3586840 T2 DE3586840 T2 DE 3586840T2
Authority
DE
Germany
Prior art keywords
integrated circuit
storage system
storage
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585111751T
Other languages
English (en)
Other versions
DE3586840D1 (de
Inventor
John Edward Andersen
Robert Lloyd Barry
Kenneth Howard Christie
Dennis John Shea
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE3586840D1 publication Critical patent/DE3586840D1/de
Application granted granted Critical
Publication of DE3586840T2 publication Critical patent/DE3586840T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90Details of database functions independent of the retrieved data types
    • G06F16/903Querying
    • G06F16/90335Query processing
    • G06F16/90339Query processing by using parallel associative memories or content-addressable memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Linguistics (AREA)
  • Data Mining & Analysis (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE8585111751T 1984-10-30 1985-09-17 Speichersystem mit integriertem schaltkreis. Expired - Fee Related DE3586840T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/666,580 US4663742A (en) 1984-10-30 1984-10-30 Directory memory system having simultaneous write, compare and bypass capabilites

Publications (2)

Publication Number Publication Date
DE3586840D1 DE3586840D1 (de) 1992-12-24
DE3586840T2 true DE3586840T2 (de) 1993-06-09

Family

ID=24674616

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585111751T Expired - Fee Related DE3586840T2 (de) 1984-10-30 1985-09-17 Speichersystem mit integriertem schaltkreis.

Country Status (4)

Country Link
US (1) US4663742A (de)
EP (1) EP0180022B1 (de)
JP (1) JPS61107448A (de)
DE (1) DE3586840T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835733A (en) * 1985-09-30 1989-05-30 Sgs-Thomson Microelectronics, Inc. Programmable access memory
JP2895488B2 (ja) * 1988-04-18 1999-05-24 株式会社東芝 半導体記憶装置及び半導体記憶システム
WO1990004235A1 (en) * 1988-10-07 1990-04-19 Martin Marietta Corporation Parallel data processor
WO1990004849A1 (en) * 1988-10-20 1990-05-03 David Siu Fu Chung Memory structure and method of utilization
US4905141A (en) * 1988-10-25 1990-02-27 International Business Machines Corporation Partitioned cache memory with partition look-aside table (PLAT) for early partition assignment identification
US5027326A (en) * 1988-11-10 1991-06-25 Dallas Semiconductor Corporation Self-timed sequential access multiport memory
US5185875A (en) * 1989-01-27 1993-02-09 Digital Equipment Corporation Method and apparatus for reducing memory read latency in a shared memory system with multiple processors
US5371874A (en) * 1989-01-27 1994-12-06 Digital Equipment Corporation Write-read/write-pass memory subsystem cycle
US5072422A (en) * 1989-05-15 1991-12-10 E-Systems, Inc. Content-addressed memory system with word cells having select and match bits
US5062081A (en) * 1989-10-10 1991-10-29 Advanced Micro Devices, Inc. Multiport memory collision/detection circuitry
US4998221A (en) * 1989-10-31 1991-03-05 International Business Machines Corporation Memory by-pass for write through read operations
GB2246001B (en) * 1990-04-11 1994-06-15 Digital Equipment Corp Array architecture for high speed cache memory
US5625797A (en) * 1990-08-10 1997-04-29 Vlsi Technology, Inc. Automatic optimization of a compiled memory structure based on user selected criteria
US5625793A (en) * 1991-04-15 1997-04-29 International Business Machines Corporation Automatic cache bypass for instructions exhibiting poor cache hit ratio
US5267199A (en) * 1991-06-28 1993-11-30 Digital Equipment Corporation Apparatus for simultaneous write access to a single bit memory
US20050062492A1 (en) * 2001-08-03 2005-03-24 Beaman Brian Samuel High density integrated circuit apparatus, test probe and methods of use thereof
US5371654A (en) * 1992-10-19 1994-12-06 International Business Machines Corporation Three dimensional high performance interconnection package
US5630063A (en) * 1994-04-28 1997-05-13 Rockwell International Corporation Data distribution system for multi-processor memories using simultaneous data transfer without processor intervention
US5592425A (en) * 1995-12-20 1997-01-07 Intel Corporation Method and apparatus for testing a memory where data is passed through the memory for comparison with data read from the memory
US6014759A (en) * 1997-06-13 2000-01-11 Micron Technology, Inc. Method and apparatus for transferring test data from a memory array
US6044429A (en) * 1997-07-10 2000-03-28 Micron Technology, Inc. Method and apparatus for collision-free data transfers in a memory device with selectable data or address paths
US7480195B2 (en) * 2005-05-11 2009-01-20 Micron Technology, Inc. Internal data comparison for memory testing

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US3238510A (en) * 1961-12-29 1966-03-01 Ibm Memory organization for data processors
US3471838A (en) * 1965-06-21 1969-10-07 Magnavox Co Simultaneous read and write memory configuration
US3685020A (en) * 1970-05-25 1972-08-15 Cogar Corp Compound and multilevel memories
US3686640A (en) * 1970-06-25 1972-08-22 Cogar Corp Variable organization memory system
US3761898A (en) * 1971-03-05 1973-09-25 Raytheon Co Random access memory
US3761881A (en) * 1971-06-30 1973-09-25 Ibm Translation storage scheme for virtual memory system
US3723976A (en) * 1972-01-20 1973-03-27 Ibm Memory system with logical and real addressing
US3800289A (en) * 1972-05-15 1974-03-26 Goodyear Aerospace Corp Multi-dimensional access solid state memory
US3787817A (en) * 1972-06-21 1974-01-22 Us Navy Memory and logic module
US4087853A (en) * 1973-11-20 1978-05-02 Casio Computer Co., Ltd. Storage reconfiguration apparatus
US3858187A (en) * 1974-01-11 1974-12-31 Gte Automatic Electric Lab Inc Read only memory system
US3958222A (en) * 1974-06-27 1976-05-18 Ibm Corporation Reconfigurable decoding scheme for memory address signals that uses an associative memory table
US3906458A (en) * 1974-08-28 1975-09-16 Burroughs Corp Odd-sized memory having a plurality of even-sized storage elements of the same capacity
AT354159B (de) * 1975-02-10 1979-12-27 Siemens Ag Assoziativspeicher mit getrennt assoziierbaren bereichen
US3967251A (en) * 1975-04-17 1976-06-29 Xerox Corporation User variable computer memory module
JPS5245232A (en) * 1975-10-08 1977-04-09 Hitachi Ltd Micro program modification circuit
JPS5362942A (en) * 1976-11-17 1978-06-05 Fujitsu Ltd Memory element
US4075686A (en) * 1976-12-30 1978-02-21 Honeywell Information Systems Inc. Input/output cache system including bypass capability
US4070657A (en) * 1977-01-03 1978-01-24 Honeywell Information Systems Inc. Current mode simultaneous dual-read/single-write memory device
US4136385A (en) * 1977-03-24 1979-01-23 International Business Machines Corporation Synonym control means for multiple virtual storage systems
US4286173A (en) * 1978-03-27 1981-08-25 Hitachi, Ltd. Logical circuit having bypass circuit
JPS54128634A (en) * 1978-03-30 1979-10-05 Toshiba Corp Cash memory control system
US4138738A (en) * 1978-07-24 1979-02-06 Drogichen Daniel P Self-contained relocatable memory subsystem
US4268907A (en) * 1979-01-22 1981-05-19 Honeywell Information Systems Inc. Cache unit bypass apparatus
DE2855118C2 (de) * 1978-12-20 1981-03-26 IBM Deutschland GmbH, 70569 Stuttgart Dynamischer FET-Speicher
US4241425A (en) * 1979-02-09 1980-12-23 Bell Telephone Laboratories, Incorporated Organization for dynamic random access memory
US4222112A (en) * 1979-02-09 1980-09-09 Bell Telephone Laboratories, Incorporated Dynamic RAM organization for reducing peak current
US4332010A (en) * 1980-03-17 1982-05-25 International Business Machines Corporation Cache synonym detection and handling mechanism
US4460984A (en) * 1981-12-30 1984-07-17 International Business Machines Corporation Memory array with switchable upper and lower word lines
JPS5998387A (ja) * 1982-11-26 1984-06-06 Nec Corp メモリ回路
US4616341A (en) * 1983-06-30 1986-10-07 International Business Machines Corporation Directory memory system having simultaneous write and comparison data bypass capabilities

Also Published As

Publication number Publication date
EP0180022A3 (en) 1989-03-15
DE3586840D1 (de) 1992-12-24
EP0180022B1 (de) 1992-11-19
EP0180022A2 (de) 1986-05-07
JPS61107448A (ja) 1986-05-26
US4663742A (en) 1987-05-05

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee