DE3579573D1 - Logisches gatter mit "verdrahteter" und-funktion-eingangsstufe unter verwendung von feldeffekttransistoren. - Google Patents

Logisches gatter mit "verdrahteter" und-funktion-eingangsstufe unter verwendung von feldeffekttransistoren.

Info

Publication number
DE3579573D1
DE3579573D1 DE8585307223T DE3579573T DE3579573D1 DE 3579573 D1 DE3579573 D1 DE 3579573D1 DE 8585307223 T DE8585307223 T DE 8585307223T DE 3579573 T DE3579573 T DE 3579573T DE 3579573 D1 DE3579573 D1 DE 3579573D1
Authority
DE
Germany
Prior art keywords
wired
field effect
effect transistors
input stage
function input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585307223T
Other languages
English (en)
Inventor
Chris Harry Saunders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Space and Mission Systems Corp
Original Assignee
TRW Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TRW Inc filed Critical TRW Inc
Application granted granted Critical
Publication of DE3579573D1 publication Critical patent/DE3579573D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0956—Schottky diode FET logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
DE8585307223T 1984-10-19 1985-10-09 Logisches gatter mit "verdrahteter" und-funktion-eingangsstufe unter verwendung von feldeffekttransistoren. Expired - Fee Related DE3579573D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/663,004 US4680484A (en) 1984-10-19 1984-10-19 Wired-AND FET logic gate

Publications (1)

Publication Number Publication Date
DE3579573D1 true DE3579573D1 (de) 1990-10-11

Family

ID=24660109

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585307223T Expired - Fee Related DE3579573D1 (de) 1984-10-19 1985-10-09 Logisches gatter mit "verdrahteter" und-funktion-eingangsstufe unter verwendung von feldeffekttransistoren.

Country Status (4)

Country Link
US (1) US4680484A (de)
EP (1) EP0186940B1 (de)
JP (1) JPS61179616A (de)
DE (1) DE3579573D1 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4798979A (en) * 1986-09-23 1989-01-17 Honeywell Inc. Schottky diode logic for E-mode FET/D-mode FET VLSI circuits
US4965863A (en) * 1987-10-02 1990-10-23 Cray Computer Corporation Gallium arsenide depletion made MESFIT logic cell
FR2653277A1 (fr) * 1989-10-17 1991-04-19 Thomson Composants Microondes Circuit integre logique, a temps de basculement reglable.
JP3956347B2 (ja) * 2002-02-26 2007-08-08 インターナショナル・ビジネス・マシーンズ・コーポレーション ディスプレイ装置
US10141930B2 (en) * 2013-06-04 2018-11-27 Nvidia Corporation Three state latch
RU2715178C1 (ru) * 2019-11-06 2020-02-25 Федеральное государственное бюджетное образовательное учреждение высшего образования "Юго-Западный государственный университет" (ЮЗГУ) Триггерный логический элемент И на полевых транзисторах
RU2756096C1 (ru) * 2020-12-16 2021-09-28 Федеральное государственное бюджетное образовательное учреждение высшего образования «Юго-Западный государственный университет» (ЮЗГУ) Триггерный логический элемент и-не/или-не на полевых транзисторах
RU2759863C1 (ru) * 2021-04-28 2021-11-18 Федеральное государственное бюджетное образовательное учреждение высшего образования «Юго-Западный государственный университет» Триггерный логический элемент И/ИЛИ на полевых транзисторах
RU2763585C1 (ru) * 2021-05-27 2021-12-30 Федеральное государственное бюджетное образовательное учреждение высшего образования «Юго-Западный государственный университет» (ЮЗГУ) (RU) Триггерный логический элемент И/И-НЕ на полевых транзисторах
RU2763152C1 (ru) * 2021-05-27 2021-12-27 Федеральное государственное бюджетное образовательное учреждение высшего образования «Юго-Западный государственный университет» Триггерный логический элемент НЕ/ИЛИ/И/ИЛИ-НЕ/И-НЕ на полевых транзисторах

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53108290A (en) * 1977-03-03 1978-09-20 Seiko Instr & Electronics Ltd Static induction transistor logic
FR2411512A1 (fr) * 1977-12-06 1979-07-06 Lardy Jean Louis Porte logique a transistor mos multidrain
US4300064A (en) * 1979-02-12 1981-11-10 Rockwell International Corporation Schottky diode FET logic integrated circuit
FR2457605A2 (fr) * 1979-05-21 1980-12-19 France Etat Perfectionnements aux portes logiques a transistors mos multidrains
US4418291A (en) * 1980-05-28 1983-11-29 Raytheon Company Logic gate having an isolation FET and noise immunity circuit
FR2485832A1 (fr) * 1980-06-24 1981-12-31 Thomson Csf Inverseur logique, et operateur a plusieurs sorties derive de cet inverseur, utilisant au moins un transistor a effet de champ a faible tension de seuil
US4405870A (en) * 1980-12-10 1983-09-20 Rockwell International Corporation Schottky diode-diode field effect transistor logic
US4423339A (en) * 1981-02-23 1983-12-27 Motorola, Inc. Majority logic gate
US4404480A (en) * 1982-02-01 1983-09-13 Sperry Corporation High speed-low power gallium arsenide basic logic circuit

Also Published As

Publication number Publication date
JPS61179616A (ja) 1986-08-12
EP0186940A1 (de) 1986-07-09
EP0186940B1 (de) 1990-09-05
US4680484A (en) 1987-07-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee