DE3380602D1 - Microprogram controlled data processing apparatus - Google Patents
Microprogram controlled data processing apparatusInfo
- Publication number
- DE3380602D1 DE3380602D1 DE8383101877T DE3380602T DE3380602D1 DE 3380602 D1 DE3380602 D1 DE 3380602D1 DE 8383101877 T DE8383101877 T DE 8383101877T DE 3380602 T DE3380602 T DE 3380602T DE 3380602 D1 DE3380602 D1 DE 3380602D1
- Authority
- DE
- Germany
- Prior art keywords
- processing apparatus
- data processing
- controlled data
- microprogram controlled
- microprogram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3824—Operand accessing
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57028808A JPS58146941A (ja) | 1982-02-26 | 1982-02-26 | マイクロプログラム制御デ−タ処理装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3380602D1 true DE3380602D1 (de) | 1989-10-26 |
Family
ID=12258713
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8383101877T Expired DE3380602D1 (de) | 1982-02-26 | 1983-02-25 | Microprogram controlled data processing apparatus |
Country Status (4)
Country | Link |
---|---|
US (1) | US4807113A (de) |
EP (1) | EP0087785B1 (de) |
JP (1) | JPS58146941A (de) |
DE (1) | DE3380602D1 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61285537A (ja) * | 1985-06-12 | 1986-12-16 | Hitachi Ltd | マイクロプログラム制御によるデ−タ処理装置 |
US4903196A (en) * | 1986-05-02 | 1990-02-20 | International Business Machines Corporation | Method and apparatus for guaranteeing the logical integrity of data in the general purpose registers of a complex multi-execution unit uniprocessor |
CA1271561A (en) * | 1986-07-02 | 1990-07-10 | Jeffry M. Bram | Instruction decoding microengines |
US5233695A (en) * | 1987-03-31 | 1993-08-03 | Kabushiki Kaisha Toshiba | Microprocessor with a reduced size microprogram |
JP2635057B2 (ja) * | 1987-11-04 | 1997-07-30 | 株式会社日立製作所 | マイクロプロセッサ |
JPH01183736A (ja) * | 1988-01-18 | 1989-07-21 | Toshiba Corp | 情報処理装置 |
EP0349124B1 (de) * | 1988-06-27 | 1996-10-09 | Digital Equipment Corporation | Operandenspezifiererverarbeitung |
US5117487A (en) * | 1988-08-26 | 1992-05-26 | Kabushiki Kaisha Toshiba | Method for accessing microprocessor and microinstruction control type microprocessor including pointer register |
US5142633A (en) * | 1989-02-03 | 1992-08-25 | Digital Equipment Corporation | Preprocessing implied specifiers in a pipelined processor |
EP0388735A3 (de) * | 1989-03-10 | 1993-01-13 | Nec Corporation | Mikroprogrammsteuerung mit Generator für feste Befehle und Mikroprogrammspeicher |
US5487156A (en) * | 1989-12-15 | 1996-01-23 | Popescu; Valeri | Processor architecture having independently fetching issuing and updating operations of instructions which are sequentially assigned and stored in order fetched |
JPH04260929A (ja) * | 1991-01-21 | 1992-09-16 | Mitsubishi Electric Corp | データ処理装置 |
US5542058A (en) * | 1992-07-06 | 1996-07-30 | Digital Equipment Corporation | Pipelined computer with operand context queue to simplify context-dependent execution flow |
JP3339132B2 (ja) * | 1993-09-14 | 2002-10-28 | ソニー株式会社 | 中央処理装置 |
US5898854A (en) * | 1994-01-04 | 1999-04-27 | Intel Corporation | Apparatus for indicating an oldest non-retired load operation in an array |
US6378062B1 (en) * | 1994-01-04 | 2002-04-23 | Intel Corporation | Method and apparatus for performing a store operation |
US5577200A (en) * | 1994-02-28 | 1996-11-19 | Intel Corporation | Method and apparatus for loading and storing misaligned data on an out-of-order execution computer system |
US5659785A (en) * | 1995-02-10 | 1997-08-19 | International Business Machines Corporation | Array processor communication architecture with broadcast processor instructions |
US5864704A (en) * | 1995-10-10 | 1999-01-26 | Chromatic Research, Inc. | Multimedia processor using variable length instructions with opcode specification of source operand as result of prior instruction |
US7376814B1 (en) | 1999-09-07 | 2008-05-20 | Nxp B.V. | Method for forming variable length instructions in a processing system |
JP6227767B2 (ja) * | 2014-05-12 | 2017-11-08 | 株式会社日立製作所 | 情報処理装置、その処理方法、及び入出力装置 |
US20220291947A1 (en) * | 2021-03-10 | 2022-09-15 | Meta Platforms, Inc. | Apparatus, systems, and methods for facilitating efficient hardware-firmware interactions |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4992960A (de) * | 1973-01-10 | 1974-09-04 | ||
US3976977A (en) * | 1975-03-26 | 1976-08-24 | Honeywell Information Systems, Inc. | Processor for input-output processing system |
CA1059639A (en) * | 1975-03-26 | 1979-07-31 | Garvin W. Patterson | Instruction look ahead having prefetch concurrency and pipe line features |
US4117536A (en) * | 1976-12-27 | 1978-09-26 | International Business Machines Corporation | Instruction processing control apparatus |
US4179738A (en) * | 1978-06-23 | 1979-12-18 | International Business Machines Corporation | Programmable control latch mechanism for a data processing system |
US4236206A (en) * | 1978-10-25 | 1980-11-25 | Digital Equipment Corporation | Central processor unit for executing instructions of variable length |
GB2062912B (en) * | 1979-09-29 | 1983-09-14 | Plessey Co Ltd | Data processing system including internal register addressing arrangements |
CA1174370A (en) * | 1980-05-19 | 1984-09-11 | Hidekazu Matsumoto | Data processing unit with pipelined operands |
JPS57756A (en) * | 1980-06-04 | 1982-01-05 | Hitachi Ltd | Data processor |
US4530050A (en) * | 1981-08-26 | 1985-07-16 | Hitachi, Ltd. | Central processing unit for executing instructions of variable length having end information for operand specifiers |
-
1982
- 1982-02-26 JP JP57028808A patent/JPS58146941A/ja active Granted
-
1983
- 1983-02-25 DE DE8383101877T patent/DE3380602D1/de not_active Expired
- 1983-02-25 EP EP83101877A patent/EP0087785B1/de not_active Expired
-
1986
- 1986-11-14 US US06/930,532 patent/US4807113A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0087785A2 (de) | 1983-09-07 |
JPS6232503B2 (de) | 1987-07-15 |
JPS58146941A (ja) | 1983-09-01 |
US4807113A (en) | 1989-02-21 |
EP0087785B1 (de) | 1989-09-20 |
EP0087785A3 (en) | 1986-11-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |