DE3376927D1 - Integrated circuit base - Google Patents

Integrated circuit base

Info

Publication number
DE3376927D1
DE3376927D1 DE8383402527T DE3376927T DE3376927D1 DE 3376927 D1 DE3376927 D1 DE 3376927D1 DE 8383402527 T DE8383402527 T DE 8383402527T DE 3376927 T DE3376927 T DE 3376927T DE 3376927 D1 DE3376927 D1 DE 3376927D1
Authority
DE
Germany
Prior art keywords
integrated circuit
circuit base
base
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383402527T
Other languages
English (en)
Inventor
Bernard Lacruche
Michel Lebailly
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
XERAM
Original Assignee
XERAM
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by XERAM filed Critical XERAM
Application granted granted Critical
Publication of DE3376927D1 publication Critical patent/DE3376927D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
    • H05K3/3426—Leaded components characterised by the leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01012—Magnesium [Mg]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Multi-Conductor Connections (AREA)
  • Casings For Electric Apparatus (AREA)
DE8383402527T 1982-12-30 1983-12-23 Integrated circuit base Expired DE3376927D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8222069A FR2538961B1 (fr) 1982-12-30 1982-12-30 Embase pour circuit integre

Publications (1)

Publication Number Publication Date
DE3376927D1 true DE3376927D1 (en) 1988-07-07

Family

ID=9280677

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383402527T Expired DE3376927D1 (en) 1982-12-30 1983-12-23 Integrated circuit base

Country Status (4)

Country Link
US (1) US4568796A (de)
EP (1) EP0113292B1 (de)
DE (1) DE3376927D1 (de)
FR (1) FR2538961B1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0333237A3 (de) * 1984-05-18 1990-03-21 BRITISH TELECOMMUNICATIONS public limited company Integrierter Schaltungschipträger
GB8412674D0 (en) * 1984-05-18 1984-06-27 British Telecomm Integrated circuit chip carrier
US4760335A (en) * 1985-07-30 1988-07-26 Westinghouse Electric Corp. Large scale integrated circuit test system
GB2223354B (en) * 1988-09-30 1992-10-14 Marconi Electronic Devices Semiconductor devices
US5224021A (en) * 1989-10-20 1993-06-29 Matsushita Electric Industrial Co., Ltd. Surface-mount network device
FR2675632B1 (fr) * 1991-04-18 1997-04-30 Texas Instruments France Dispositif de conditionnement de circuits integres
US5281849A (en) * 1991-05-07 1994-01-25 Singh Deo Narendra N Semiconductor package with segmented lead frame
US5452511A (en) * 1993-11-04 1995-09-26 Chang; Alexander H. C. Composite lead frame manufacturing method
JPH10242374A (ja) * 1997-02-27 1998-09-11 Oki Electric Ind Co Ltd 半導体装置
FR2799883B1 (fr) 1999-10-15 2003-05-30 Thomson Csf Procede d'encapsulation de composants electroniques
JP3421307B2 (ja) * 2000-07-28 2003-06-30 三菱電機株式会社 サブラックのフロントレール
JP2004003886A (ja) * 2002-05-31 2004-01-08 Matsushita Electric Works Ltd センサパッケージ
JP6870534B2 (ja) * 2017-08-25 2021-05-12 住友電気工業株式会社 イメージセンサ装置及び撮像装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3228091A (en) * 1960-12-30 1966-01-11 Bendix Corp Method of making printed circuit board
US3185761A (en) * 1963-02-12 1965-05-25 Burroughs Corp Fabricated circuit structure
US3416348A (en) * 1966-09-30 1968-12-17 Westinghouse Electric Corp Flat-pack lead bending device
US3550766A (en) * 1969-03-03 1970-12-29 David Nixen Flat electronic package assembly
US3650232A (en) * 1970-09-08 1972-03-21 Amp Inc Method and apparatus for manufacturing lead frames
US3735214A (en) * 1972-01-27 1973-05-22 Coilcraft Inc A header for mounting circuit elements for incorporation in an electric circuit
US4089575A (en) * 1976-09-27 1978-05-16 Amp Incorporated Connector for connecting a circuit element to the surface of a substrate
US4147889A (en) * 1978-02-28 1979-04-03 Amp Incorporated Chip carrier
US4224637A (en) * 1978-08-10 1980-09-23 Minnesota Mining And Manufacturing Company Leaded mounting and connector unit for an electronic device
JPS57115850A (en) * 1981-01-10 1982-07-19 Nec Corp Chip carrier for semiconductor ic
US4463217A (en) * 1981-09-14 1984-07-31 Texas Instruments Incorporated Plastic surface mounted high pinout integrated circuit package

Also Published As

Publication number Publication date
EP0113292B1 (de) 1988-06-01
FR2538961B1 (fr) 1985-07-12
US4568796A (en) 1986-02-04
EP0113292A1 (de) 1984-07-11
FR2538961A1 (fr) 1984-07-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee