DE3370420D1 - Comparator - Google Patents

Comparator

Info

Publication number
DE3370420D1
DE3370420D1 DE8383402388T DE3370420T DE3370420D1 DE 3370420 D1 DE3370420 D1 DE 3370420D1 DE 8383402388 T DE8383402388 T DE 8383402388T DE 3370420 T DE3370420 T DE 3370420T DE 3370420 D1 DE3370420 D1 DE 3370420D1
Authority
DE
Germany
Prior art keywords
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8383402388T
Other languages
English (en)
Inventor
Yasuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3370420D1 publication Critical patent/DE3370420D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
DE8383402388T 1982-12-24 1983-12-12 Comparator Expired DE3370420D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57225825A JPS59126315A (ja) 1982-12-24 1982-12-24 比較回路

Publications (1)

Publication Number Publication Date
DE3370420D1 true DE3370420D1 (en) 1987-04-23

Family

ID=16835388

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8383402388T Expired DE3370420D1 (en) 1982-12-24 1983-12-12 Comparator

Country Status (4)

Country Link
US (1) US4572977A (de)
EP (1) EP0116243B1 (de)
JP (1) JPS59126315A (de)
DE (1) DE3370420D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153223A (ja) * 1984-01-20 1985-08-12 Ricoh Co Ltd 入力バツフア回路
JP3085803B2 (ja) * 1992-11-26 2000-09-11 株式会社東芝 差動電流源回路
US5949256A (en) * 1997-10-31 1999-09-07 Hewlett Packard Company Asymmetric sense amplifier for single-ended memory arrays
US7009905B2 (en) * 2003-12-23 2006-03-07 International Business Machines Corporation Method and apparatus to reduce bias temperature instability (BTI) effects

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5472641A (en) * 1977-11-21 1979-06-11 Toshiba Corp Voltage detection circuit
DE2919166C2 (de) * 1978-05-12 1986-01-02 Nippon Electric Co., Ltd., Tokio/Tokyo Speichervorrichtung
US4192014A (en) * 1978-11-20 1980-03-04 Ncr Corporation ROM memory cell with 2n FET channel widths
JPS55134535A (en) * 1979-04-06 1980-10-20 Nec Corp Detecting-amplifying circuit
US4327424A (en) * 1980-07-17 1982-04-27 International Business Machines Corporation Read-only storage using enhancement-mode, depletion-mode or omitted gate field-effect transistors
US4358690A (en) * 1980-07-18 1982-11-09 Teletype Corporation Digital voltage comparator
JPS5856198B2 (ja) * 1980-09-25 1983-12-13 株式会社東芝 半導体記憶装置
JPS5856199B2 (ja) * 1980-09-25 1983-12-13 株式会社東芝 半導体記憶装置
JPS5782279A (en) * 1980-11-04 1982-05-22 Fujitsu Ltd Semiconductor storage device
US4404655A (en) * 1981-01-28 1983-09-13 General Instrument Corporation Data sense apparatus for use in multi-threshold read only memory
US4412143A (en) * 1981-03-26 1983-10-25 Ncr Corporation MOS Sense amplifier
US4413330A (en) * 1981-06-30 1983-11-01 International Business Machines Corporation Apparatus for the reduction of the short-channel effect in a single-polysilicon, one-device FET dynamic RAM array
US4388702A (en) * 1981-08-21 1983-06-14 Mostek Corporation Multi-bit read only memory circuit

Also Published As

Publication number Publication date
US4572977A (en) 1986-02-25
EP0116243B1 (de) 1987-03-18
JPS59126315A (ja) 1984-07-20
JPH0224412B2 (de) 1990-05-29
EP0116243A1 (de) 1984-08-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee