DE3347683A1 - TEMPERATURE COMPENSATED LOGARITHMIC CIRCUIT - Google Patents

Description

The invention relates to electrical circuits for generating output signals corresponding to a logarithmic one Puncture. In particular, this invention relates to improved circuits for developing one temperature-independent logarithmic output signal.

A variety of analog logarithmic circuits have been used industrially for many years. These included Logarithmic amplifier with only one variable input signal and circuits for a logarithmic.es Ratio (log-ratio circuits) with two variable input signals. In general, the logarithmic Puncture through a pair of opposing P-If zone transitions (junctions) formed the corresponding currents I-, Ip with the differential voltage kT / q. (In 1- / Ip) used as the base output signal will. When the output is proportional to absolute temperature it is evident that a form of temperature compensation for each of these circuits, which is required to be at variable Temperatures works exactly, must be provided.

The task was to provide temperature-compensated logarithmic circuits for the production can be used in monolithic Porm, for example integrated circuit chips. In known circuits Resistors with a high temperature coefficient (TC) are usually used to achieve the required To effect temperature compensation. However, such resistance is difficult in a plague body to be provided. In general, an external high temperature resistor is used. This is not satisfactory because the product is then more in a modular format than in "an overall monolithic implementation

payment must be made.

According to the invention, logarithmic circuits (either logarithmic amplifiers or logarithmic Ratio) provided in which the need for any special components, such as "for example a temperature compensation resistor, through the use of a compensation circuit that alone is based on the behavior of the zone transition, is eliminated

In a "preferred embodiment of the invention, a pair of opposing P-N region junctions supplied with input currents I-, I «in order to "Develop base logarithmic ratio. The resulting A signal with a logarithmic ratio is connected to a compensation circuit, which is a second pair of P-N junction, the common emitter of which is powered by a current source which generates a current proportional to the absolute temperature (PTAT -) '.

The PTAT current shared between the second pair of zone transitions becomes in accordance with the logarithmic Ratio (In I-j / lg) modulated, where the temperature-induced changes introduced by the first pair of zone transitions equal and opposite temperature-induced changes introduced by the PTAT-S tromque He be compensated. One final output signal becomes proportional to the modulation factor in the second Pair of zone transitions developed, which is independent of the temperature.

Other objects, aspects and advantages of the invention will become apparent from the detailed description of a

preferred embodiment shown with the aid of the drawings.

Figure 1 is a schematic diagram of a relative simple version of the basic circuit that represents the principle of the invention,

Figure 2 is a modified design using a balanced circuit design;

FIG. 3 is a more detailed embodiment of one in FIG circuit shown and

Figure 4 is an additional modification of the arrangements according to Figure 2.

Referring to Figure 1, there is shown a relatively simple implementation of a logarithmic circuit _{comprising a pair of matched transistors Q-, Q 2} with a common emitter connection to form opposite PN junction junctions. The base of the transistor Q- is grounded and its collector is connected to an input terminal to receive a variable input current I-. This input terminal is also connected to the input of a high-gain inverting amplifier 12, the output of which controls the common emitter connection of transistors Q ₁ and Qo in order to drive the current I- through the transistor Q <.

The collector of the transistor Q ₂ receives a current from a source I ₂ which is a constant current in the case of an application as a logarithmic amplifier or a variable current for an application as a logarithmic ratio. The amplifier 12 supplies the current I ₂ when required.

The base of the transistor Q ₂ is connected to ground via a resistor R and to the collector of a transistor Q 1. The base of the transistor Qi is grounded and its emitter is connected to the emitter of a matched transistor Qi, the collector of which is grounded. The common emitters of the transistors Q 1, Q. are connected to a current source I ₃ , which generates a PTAT current (e.g. proportional to the absolute temperature). The transistor Q, conducts part of the PTAT current xl ^, while the transistor Q ₄ (1-x) I ₁ conducts.

It can be seen that the collector current of the trail sistor Q, also flows through the resistor R. Thus the voltage at the top of the transistor with respect to ground is -xI ^ R. Accordingly, the circular equation from the grounded _{base of transistor Q 1} to the grounded base of transistor Q- can be described as follows:

where I _{e is} the zone transition saturation current.

In order to simplify the analyzes for the sake of clarity only, it is assumed that the Product I ", R is set to the value kT / q. Through a Put in equation (1) results in:

kT -, _ ¹ I = kT _Ί - ¹ Z

Adjusting and dividing by kT / q results in:

I ₁ I ₂

In γ- - In ^ - = χ (3)

s s

Thus the modulation factor "x" is directly proportional to the desired logarithmic ratio and free from the effects of temperature. To a corresponding To obtain an output signal, it is only necessary to provide an output signal corresponding to the modulation factor "x" to create.

This can be accomplished, as shown in Figure 1, by using a third pair of matched PM junction junctions Q_, Qg coupled to the base of transistor Q. and arranged in a mirror image configuration. A constant _{current source I R} is connected to the common emitters of the transistors Qc, Qg. It can be seen that the current through the transistor Qg is χ · Ιτ> and thus serves as the output current Ijm-g. In order to obtain a corresponding output voltage, the collector of the transistor Qg can be connected to an inverting high-gain amplifier 20 which has a feedback resistor .R_. The output voltage is then as follows;

^E OFF - ¹ R ^R si

Thus it should be understood that the output voltage is temperature-independent and without any need for special components, such as high-temperature coefficient resistors, is produced. Corresponding

such a circuit can readily be implemented in full monolithic format.

When using a logarithmic amplifier with Ip fixed, the error voltage at node N is not very important because it can be current controlled and the small base currents for Q., Qf- can be slightly smaller. I ™ can be readily generated by an E circuit, such as the general type shown in Figure 2 of U.S. Patent 3,940,760 (Brokaw). It should also be noted that when Lp and 1 ™ are nearly the same, the circuit does not require good logarithmic conformity from Q1 to Qg since its ohms are similar to ^{1 see errors.}

A well-managed virtual hatred at the node To get N, for example to make a very accurate logarithmic ratio circuit, could be a low-gain, non-inverting amplifier marked A in FIG Circuit point can be inserted.

FIG. 2 shows another circuit arrangement in which the node N for I ₁ = I _{2 is} very close to earth. Analysis of this symmetrical circuit is directional and shows that:

(2x-1) lnyl (6)

As can easily be seen from the example, FIG. 3 is provided to show how some details a practical circuit based on Figure 2 can be performed. How the Circuit is directional in almost every way

drove. Q ₇ and Q _Q serve a dual purpose by reducing the base currents from Q to Qg and by providing some (headroom) for the collectors of the four transistors. Im and I _R are set to relatively high values. This ensures that the resistor R can be sufficiently small so that base current _{errors in Q 1} at the high-input end of the signal range cause minor errors in the output signal «,

Returning to Figure 2, it is understandable that the finite beta in the "core" transistors Q- and Qp will have an adverse effect. Although the base currents in Q ₁ and Q _{2 will} not change the voltage compared to the V / i resistances E, (since this is always _{forced to be equal to V 1} In (I ₁ Zl ₂ ) by the feedback system) they change the fourth of the modulation index X ₁ required to generate this voltage, and thus introduce an error in the final output signal. FIG. 4 shows a supplementary modification of the core part of the arrangement in FIG. 2, which avoids this task in the following way. Q ₁ . generates a base current equal to the total base current of Q ₁ and Q ₂ . Q ₁₂ and Q ₁ -, form an emitter-coupled pair that proportions _{this current in the same way as Q 1} and Q ₂ balance the total emitter current F ₁ and P _2. Due to the crossed connections and assuming that the base current error factor <f {& 1 / ß) is small, the collector current of Q _{12 is} almost equal to the base current of Q ₂ ; likewise the collector current of Q ₁ ^ is almost equal to the base current of Q ₁ *. As a result, the base current in each resistor is ^ T (I * + I ₂ ) and the

COPY

Net differential error zero.

Although various preferred embodiments of the invention have been disclosed in detail herein, it is it will be understood that this has been done for the purpose of illustrating the invention, and not to limit the scope to limit the invention, since it is obvious to a person skilled in the art that many changes are only made by the application of the claimed invention can be made.

A logarithmic amplifier or a logarithmic ratio circuit to produce a temperature independent Output signal corresponding to the logarithm of the ratio of a pair of input currents. the The logarithmic function is generated by a pair of opposite P-K zone transitions through which the corresponding Input currents flow. The temperature compensation is done by a circuit that is a pair opposite Includes P-U zone transitions, causing a PTAI flow portion between the zone transitions accordingly a modulation factor proportional to the desired logarithmic puncture. The temperature-induced Signal changes caused by the PTAI current source are equal to and opposite to the temperature-induced signal changes that generated by the first pair of P-2T zone transitions, and a temperature-independent output signal is in Agreement with the modulation factor applied to the Pl'AT flow through the second pair of P-N zone transitions created, developed.

ΟΘΡΥ ORIGINAL INSPECTED

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Claims (18)

Gertz, Dr. Fucht, Dr. Harctei * PATENT LAWYERS P.O. Box 2626
Sonnenberger Strasse 100
'D 6200 Wiesbaden 1
Telephone 06121/560034 December 27, 1983
FuKk / G - A 120 Analog Devices, Incorp., Route 1, Industrial Park,
.Norwood, MA 02062, USA Temperature compensated logarithmic circuit Pat entans check Iy Logarithmic circuit for generating an output signal proportional to the logarithm of an input signal and free of temperature-induced changes, marked by: Input means responsible for the input signals and means for developing a first signal proportional to the product (1) of the logarithm this input signal and (2) the absolute temperature exhibit, Circuit means that have a PTAT source that a
second signal generated, having and coupled to these input means, Circuit means, further comprising means for modulation
of the order of magnitude of the second signal in accordance with the logarithm, while the temperature-related factor of this second signal is canceled and Output means for developing an output signal corresponding to the modulation of the second output signal. 2. Circuit according to claim 1, characterized in that the input means comprise differential means, who are responsible for the input signal and for a comparison signal in order to make the first signal pro proportional to the logarithm of the ratio of the Generate input and comparison signals. 3. A circuit according to claim 2, characterized in that the differential means are first and second transistors (Q-J, Q2) with common emitters, where the input and comparison signals have currents, which pass through the corresponding transistors 4. Circuit according to claim 3, characterized in that that said circuit means comprise resistance means (E) connected to the base of the second transistor (Q2) are coupled, and means connecting the PTAT source to the resistance means for a flow of the PTAT current through there. 5. Circuit according to claim 4 »characterized in that that this coupling means third and fourth transistors (Qj, Q4) with their emitters connected together comprising resistance means between the collector and the base of the third transistor with the PTAT source connected to the emitters of the third and fourth transistors is. 6. Circuit according to claim 5, characterized in that the base of the first transistor with a comparison potential is connected, the base of the second transistor to the collector of the third Transistor and the base of the third transistor is connected to a comparison potential. 7 · Circuit according to claim 3 »characterized in that that the base of the first transistor (Q-]) with a Comparison potential is connected, the circuit means have a resistor between the base of the second transistor (Q2) and a Comparison potential is arranged, and wherein the PTAT source is coupled to this resistor to causing PTAT current to flow therethrough to develop the second signal. 8. Circuit according to claim 7, characterized in that it has a high gain amplifier with a output connected to the common emitters of the first and second transistors (Q-j, Q 2) and with having an input connected to the collector of the first transistor (Q-), the input of which Amplifier also with the input connection point, which the input current through the first Transistor receives and controls, is connected. 9. Circuit according to claim 8, characterized in that the comparison signal has a current source (I ₂ ) which is connected to the collector of the second transistor. 10. Circuit according to claim 7 »characterized in that this circuit means further third and fourth Having transistors with a common emitter connection, this third transistor having connected to the resistor for conducting the current therethrough, and wherein said circuit means provides some of the current from this PTAT source between the third and fourth transistor, where the measure of the current through this third transistor, which is used as the modulation factor for the Current ratio is responsible, serves. 11. Circuit according to claim 10, characterized in that the fifth and sixth with their emitters with each other having connected transistors, these fifth and sixth transistors with these third and fourth transistors are connected, this output means means for repeating a Current modulation in this sixth transistor corresponding to that in the third transistor comprises and these output means contain further means for the flow of current through this sixth transistor responsible for developing an output signal are. 12. A log-ratio circuit, labeled by: a first pair of matched transistors (Q ^, Qg) with common emitters, these collectors of these transistors being connected to the corresponding input terminal in order to supply input currents receive, an amplifier (12), whose input to one of these input connections and whose output to these connected to common emitters, a pair of resistors (R), each at one end is connected to a corresponding base of the transistor pair and the other ends of these resistors are connected together with a comparison potential, a second pair of matched transistors (Q *, Q ^) with jointly connected emitters whose collectors are connected to the corresponding bases of the first Transistor pairs (Q ^, C ^) are connected, a PTAT power source connected to the second pair of emitters connected to there through and through the appropriate resistors one in accordance generate current flow modulated with the logarithm of the ratio of these input currents, and Output means for developing an output signal according to this modulation of the PTAT current * 13 · Circuit according to claim 12, characterized in that the output means are a third transistor pair, which is balanced with the second pair of transistors, the emitters of which third pair with each other with a constant current source are connected, this third transistor pair (Qc, Qg) with the second transistor pair (Q ,, Q,) is connected to provide that the current flowing through this third pair is in In accordance with the modulation of the current in the second pair is modulated, and this output means responsible for the current flow through one of these transistors of this third pair (Qc, Qg) is. 14 · Circuit according to Claim 13, characterized by: a current mirror which is connected to the collector of the third transistor pair (Qc »Qg) is connected, this output means to the collector of a Transistor of this third pair (Qt-, Qg) is connected. 15. Method for developing a temperature-independent Signal according to the logarithm of an input signal, characterized by: Development of a first signal which is the product of (1) the logarithm of this input signal and (2) represents the absolute temperature! Developing a second signal from a PTAT power source, Combining the first and second signals, setting the level of the second signal to cancel to provide the temperature-dependent factors of these second signals, Modulation of the height of this second signal in accordance with the logarithm of the ratio between this input signal and a reference signal and Development of an output signal in accordance with the modulation of this second signal. 16. Circuit according to claim 15 »characterized in that that this first signal is developed by a pair of opposing P-H zone transitions, one having a first stream corresponding to this input signal and the other having a second Electricity transported. 17. Circuit according to claim 16, characterized in that the modulation of this second signal caused by a second pair of opposing P-u zone transitions. 18. Circuit according to claim 12, characterized in that it has means for avoiding the effect of a limited beta in the first transistor pair and a third pair of emitter-coupled transistors whose collectors are connected to the corresponding bases of the first corresponding transistor pair are connected, the collector current of each of these third Transistor pairs is connected to the base of the other third transistor pair and an additional transistor, its collector with the emitters of the first transistor pair and its The base is connected to the emitters of the second pair of transistors.