FR2542891A1

FR2542891A1 - LOGARITHMIC CIRCUIT COMPENSATED IN TEMPERATURE

Info

Publication number: FR2542891A1
Application number: FR8400046A
Authority: FR
Inventors: Barrie Gilbert
Original assignee: Analog Devices Inc
Current assignee: Analog Devices Inc
Priority date: 1983-01-03
Filing date: 1984-01-03
Publication date: 1984-09-21
Also published as: JPS59136871A; GB2133597A; JPH0670799B2; NL8400018A; GB2133597B; CA1203628A; DE3347683A1; GB8333543D0

Abstract

L'INVENTION CONCERNE LES CIRCUITS ANALOGIQUES LOGARITHMIQUES. UN CIRCUIT LOGARITHMIQUE PRODUISANT UN SIGNAL DE SORTIE E PROPORTIONNEL AU LOGARITHME D'UN SIGNAL D'ENTREE I COMPREND NOTAMMENT UNE PAIRE DE TRANSISTORS D'ENTREE Q, Q PRODUISANT UN SIGNAL PROPORTIONNEL AU PRODUIT DE LA TEMPERATURE ABSOLUE ET DU LOGARITHME DU SIGNAL D'ENTREE; UN CIRCUIT DE COMPENSATION EN TEMPERATURE R, Q, Q, I QUI COMPORTE UNE SOURCE DE COURANT PROPORTIONNEL A LA TEMPERATURE ABSOLUE; ET UN CIRCUIT DE SORTIE Q, Q, 20 QUI PRODUIT LE SIGNAL DE SORTIE COMPENSE EN TEMPERATURE. APPLICATION AUX AMPLIFICATEURS LOGARITHMIQUES EN CIRCUIT INTEGRE.THE INVENTION CONCERNS LOGARITHMIC ANALOGUE CIRCUITS. A LOGARITHMIC CIRCUIT PRODUCING AN OUTPUT SIGNAL E PROPORTIONAL TO THE LOGARITHM OF AN INPUT SIGNAL I INCLUDES IN PARTICULAR A PAIR OF INPUT TRANSISTORS Q, Q PRODUCING A SIGNAL PROPORTIONAL TO THE PRODUCT OF THE ABSOLUTE TEMPERATURE AND THE LOGARITHM OF THE INPUT SIGNAL ; A R, Q, Q, I TEMPERATURE COMPENSATION CIRCUIT WHICH CONTAINS A SOURCE OF CURRENT PROPORTIONAL TO THE ABSOLUTE TEMPERATURE; AND AN OUTPUT CIRCUIT Q, Q, 20 WHICH PRODUCES THE TEMPERATURE COMPENSATED OUTPUT SIGNAL. APPLICATION TO LOGARITHMIC AMPLIFIERS IN INTEGRATED CIRCUIT.

Description

2542891 '2542891 '

La présente invention concerne des circuits élec- The present invention relates to electrical circuits

triques destinés à produire des signaux de sortie selon une used to produce output signals according to a

fonction logarithmique L'invention porte plus particuliè- logarithmic function The invention relates more particularly to

rement sur un circuit perfectionné destiné à produire un signal de sortie logarithmique indépendant de la températu- re. on an improved circuit designed to produce a logarithmic output signal independent of the temperature.

Diverses sortes de circuits logarithmiques analo- Various kinds of analog logarithmic circuits

giques ont été utilisés industriellement depuis de nombreu- have been used industrially for many

ses années Parmi ces circuits figurent des amplificateurs logarithmiques (ayant un seul signal d'entrée variable) et des circuits à rapport logarithmique (ayant deux signaux d'entrée variables) la fonction logarithmique est établie de façon générale par une paire de jonctions PN opposées acheminant des courants respectifs Il, I 2, et la tension years Among these circuits are logarithmic amplifiers (having a single variable input signal) and logarithmic ratio circuits (having two variable input signals) the logarithmic function is generally established by a pair of opposite PN junctions carrying respective currents II, I 2, and the voltage

différentielle k T/q (in 1/I 2) est utilisée en tant que si- differential k T / q (in 1 / I 2) is used as the

gnal de sortie fondamental Du fait que le signal de sortie est proportionnel à la température absolue, il est évident qu'une certaine forme de compensation dé température doit Since the output signal is proportional to the absolute temperature, it is obvious that some form of temperature compensation must

9 tre accomplie pour tout circuit de ce type devant fonc- 9 be completed for any such circuit that is to function

tionner de façon précise à des températures variables. accurately at varying temperatures.

Il est apparu un problème dans la réalisation de It appeared a problem in the realization of

circuits logarithmiques compensés en température qui con- logarithmic circuits compensated for temperature which

viennent pour la fabrication sous forme monolithique, c'est- come for manufacturing in monolithic form, that is,

à-dire sous forme de puces de circuit intégré Dans des cir- in the form of integrated circuit chips In certain circumstances,

cuits antérieurs, on utilise couramment une résistance ayant previously cooked, resistance is commonly

un coefficient de température élevé pour effectuer la com- a high temperature coefficient to perform the com-

pensation de température nécessaire Il est cependant dif- However, it is difficult to

ficile de fabriquer une telle résistance sous forme monoli- to manufacture such resistance in monolithic form

thique Il en résulte qu'on utilise généralement une résis- The result is that a resistance is generally used.

tance externe à coefficient de température élevé Ceci n'est external ratio with a high temperature coefficient

pas satisfaisant du fait que le produit doit alors être fa- unsatisfactory because the product must then be

briqué sous la forme d'un module au lieu de l'être sous une broken in the form of a module instead of being under a

forme totalement monolithique.totally monolithic form.

Conformément à l'invention, on réalise des cir- In accordance with the invention, cir-

cuits logarithmiques (du type amplificateur logarithmique Logarithmic Cooking (Logarithmic Amplifier Type)

2542891 -2542891 -

ou du type à rappocrt logarithmioue) dans lesquels la nécessi- or the logarithmic type) in which the

té de composants spéciaux, tels qu'une résistance de compen- special components, such as compensating

sation de température, est éliminée par l'utilisation d'un circuit de compensation basé uniquement sur le comportement de jonctions Dans des modes de réalisation préférés de l'invention, on applique des courants d'entrée Il 12, à une paire de jonctions P-N opposées, pour produire la relation In preferred embodiments of the invention, input currents Il 12 are applied to a pair of PN junctions by the use of a compensation circuit based solely on the behavior of the junctions. opposite, to produce the relationship

logarithmique fondamentale Le signal de rapport logarith- logarithmic fundamental The logarithmic report signal

mique résultant est appliqué à un circuit de compensation result is applied to a compensation circuit

comprenant une seconde paire de jonctions P-N dont les émet- comprising a second pair of P-N junctions whose transmissions

teurs communs sont alimentés par une source de courant pro- common sources are powered by a current source

duisant un courant proportionnel à la température absolue a current proportional to the absolute temperature

(ou en abrégé PTA).(or abbreviated PTA).

Le courant PTA qui est divisé entre les jonctions The current PTA which is divided between the junctions

de la seconde paire est modulé conformément auv rapport lo- of the second pair is modulated in accordance with the

garithmique (ln I 1/I 2);Iet les variations induites par la température qui sont introduites dans la première paire de (I 1 I / I 2), and the temperature-induced variations introduced in the first pair of

jonctions sont compensées par des variations égales et op- junctions are compensated by equal and

posées, induites par la température, qui sont introduites par la source de courant PTA Un signal de sortie final proportionnel au facteur de modulation est produit dans la temperature-induced, which are introduced by the current source PTA A final output signal proportional to the modulation factor is produced in the

seconde paire de jonctions, et ce ignal de sortie est indé- second pair of junctions, and this output ignal is inde-

pendant de la température.during the temperature.

L'invention sera mieux comprise à la lecture de The invention will be better understood when reading

la description qui va suivre de modes de réalisation et en the following description of embodiments and in

se référant aux dessins annexés sur lesquels: referring to the accompanying drawings in which:

La figure 1 est un schéma d'une version relative- Figure 1 is a diagram of a relative version of

ment simple du circuit de base, illustrant les principes de l'invention; simple circuit of the basic circuit, illustrating the principles of the invention;

La figure 2 représente un mode de réalisation mo- FIG. 2 represents a modal embodiment

difié utilisant une configuration de circuit équilibrée; La figure 3 est une représentation plus détaillée d'un circuit du type représenté sur la figure 2; et La figure 4 montre une version modifiée de la defined using a balanced circuit configuration; Figure 3 is a more detailed representation of a circuit of the type shown in Figure 2; and Figure 4 shows a modified version of the

partie centrale du circuit de la figure 2. central part of the circuit of Figure 2.

On va maintenant considérer la figure 1 qui mon- We will now consider Figure 1 which shows

tre une version relativement simple d'un circuit logarith- be a relatively simple version of a logarithmic circuit

mique comprenant une paire de transistors appariés Q 1, Q 2 ayant une connexion d'émetteurs commune pour former des jonctions P-N opposées La base de Q 1 est mise à la masse et son collecteur est connecté à une borne d'entrée 10 pour comprising a pair of paired transistors Q 1, Q 2 having a common emitter connection to form opposite P-N junctions. The base of Q 1 is grounded and its collector is connected to an input terminal 10 for

recevoir un courant d'entrée variable Il Cette borne d'en- receive a variable input current.

trée est également connectée à l'entrée d'un amplificateur is also connected to the input of an amplifier

inverseur de gain élevé, 12, dont la sortie attaque la con- high gain inverter, 12, whose output attacks the con-

nexion d'émetteurs commune de Q 1, Q 2, ce qui impose la cir- sending transmitters of Q 1, Q 2, which imposes the cir-

culation du courant Il dans Q 1.culation of the current II in Q 1.

le collecteur de Q 2 reçoit un courant provenant d'une source I 2 qui est un courant constant dans le cas the collector of Q 2 receives a current from a source I 2 which is a constant current in the case

d'une application correspondant à un amplificateur logarith- an application corresponding to a logarithmic amplifier

mique, ou un courant variable dans le cas d'une application correspondant à un rapport logarithmique L'amplificateur or a variable current in the case of an application corresponding to a logarithmic ratio

12 fournit le courant I 2 à la demande. 12 supplies the current I 2 on demand.

La base de Q 2 est connectée à la masse par une résistance R et elle est également connectée au collecteur d'un transistor Q 3 La base de Q 3 est connectée à la masse et son émetteur est connecté à l'émetteur d'un transistor apparié Q 4 dont le collecteur est connecté à la masse les émetteurs communs de Q 3, Q 4 sont connectés à une source de The base of Q 2 is connected to ground by a resistor R and it is also connected to the collector of a transistor Q 3 The base of Q 3 is connected to ground and its emitter is connected to the emitter of a transistor paired Q 4 whose collector is connected to ground the common transmitters of Q 3, Q 4 are connected to a source of

courant IT qui produit un courant PTA (c'est-à-dire propor- current that produces a PTA current (that is,

tionnel à la température absolue) Q 3 achemine une fraction at absolute temperature) Q 3 conveys a fraction

x IT du courant PTA, tandis que Q 4 achemine le courant res- x IT of the current PTA, while Q 4 carries the current

tant (l-x) k TEboth (l-x) k TE

On voit que le courant de collecteur de Q 3 tra- It can be seen that the collector current of Q 3

verse également la résistance R La tension à l'extrémité supérieure de la résistance est donc -x ITR par rapport à la masse Par conséquent; l'équation de maille de la base connectée à la masse de Q 1 jusqu'à la base connectée à la masse de Q 3 peut s'écrire sous la forme suivante: k T ln Il = k T q N2 ITR ( 1) q S q I also the resistor R The voltage at the upper end of the resistor is therefore -X ITR with respect to ground Therefore; the mesh equation of the base connected to the mass of Q 1 up to the base connected to the mass of Q 3 can be written in the following form: k T ln II = k T q N2 ITR (1) q S q I

en désignant par Is le courant de saturation de jonction. by designating Is the saturation current of junction.

Pour simplifier l'analyse, uniquement dans un but d'exposi- To simplify the analysis, only for the purpose of

tion, on supposera que le produit ITR est fixé à la valeur k T/q En reportant ceci dans l'équation ( 1), on obtient: I k T 12 k T q q q 2 1 N À_ lar N + x-k ( 2) En combinant les ternes et en divisant par k T/q, on obtient: It is assumed that the product ITR is set to the value k T / q. By referring this to equation (1), we obtain: I k T 12 k T qqq 2 1 N A_ lar N + xk (2) In combining the dull and dividing by k T / q, we get:

I 1 I 2I 1 I 2

ln in = x ( 3) Is Is s s ou x = N ( 4) ln in = x (3) Is Is s s or x = N (4)

le facteur de modulation "x" est ainsi directement propor- the modulation factor "x" is thus directly proportional

tionnel au rapport logarithmique désiré, et est exempt d'effets de température Pour obtenir un signal de sortie correspondant, il suffit de produire un signal de sortie correspondant à "x" On peut accomplir ceci, comme le montre la figure In order to obtain a corresponding output signal, it suffices to produce an output signal corresponding to "x". This can be accomplished as shown in FIG.

1, en employant une troisième paire de jonctions P-N appa- 1, using a third pair of P-N junctions

riées, Q 5 ' Q 6 ' connectées à la base de Q 4 et branchées se- Q 5 'Q 6' connected to the base of Q 4 and connected

lon une configuration symétrique Une source à courant constant IR est connectée aux émetteurs communs de Q 5, Q 6 On voit que le courant traversant Q 6 est égal à x I Ri, et est In a symmetrical configuration A constant current source IR is connected to the common emitters of Q 5, Q 6. It can be seen that the through current Q 6 is equal to x I Ri, and is

donc utilisable en tant que courant de sortie IS Pour pro- therefore usable as an output current IS For

duire une tension correspondante, on peut connecter le col- to create a corresponding voltage, you can connect the col-

lecteur de Q 6 à un amplificateur inverseur de gain élevé, Q6 reader to a high gain inverter amplifier,

, ayant une résistance de réaction Rse la tension de sor- , having a reaction resistance Rse the output voltage

tie est alors: ES = IR Rs ln ( 5) I 2 On voit ainsi que la tension de sortie est indépendante de la température et est produite sans nécessiter de-composants is then: ES = IR Rs ln (5) I 2 We can see that the output voltage is independent of the temperature and is produced without the need for components.

spéciaux tels que des résistances à coefficient de tempéra- such as resistors with a temperature coefficient

_ 30 ture élevé Un tel circuit peut donc être réalisé aisément This circuit can therefore be easily realized.

2542891:2542891:

entièrement sous forme monolithique. entirely in monolithic form.

Dans une application d'amplificateur logarithmique, dans laquelle I 2 est fixe, la tension d'erreur au noeud N n'est pas très importante, du fait de la possibilité d'une commande par courant; les courants de base faibles pour QV In a logarithmic amplifier application, in which I 2 is fixed, the error voltage at node N is not very large, due to the possibility of current control; weak basic currents for QV

Q 5 peuvent être négligeables Le courant I' est produit ai- Q 5 can be negligible The current I 'is produced ai-

sément par un circuit Ego par exemple du type général qui est représenté sur la figure 2 du brevet US 3 940 760 On peut également noter que si IR et IT sont presque identiques, Ego circuit, for example, of the general type shown in FIG. 2 of US Pat. No. 3,940,760. It can also be noted that if IR and IT are almost identical,

le circuit ne nécessite même pas une bonne conformité loga- the circuit does not even require good logistical compliance

rithmique de Q 3 à Q 6, du fait que leurs erreurs ohmiques Q 3 to Q 6, because their ohmic errors

sont similaires.are similar.

Pour établir une Lasse virtuelle bien définie au To establish a well defined virtual Lasse at

noeud N, par exemple pour réaliser un circuit à rapport lo- node N, for example to produce a circuit with a ratio

garithmique de haute précision, on pourrait intercaler un amplificateur non inverseur ayant un gain faible au point de circuit marqué A sur la figure 1 La figure 2 montre une autre configuration de circuit dans laquelle le noeud N est a high-precision device, a non-inverting amplifier having a low gain could be inserted at the marked circuit point A in FIG. 1 FIG. 2 shows another circuit configuration in which the node N is

très proche de la masse pour Il = I 20 L'analyse de ce cir- very close to the mass for II = I 20 The analysis of this cir-

cuit équilibré n'offre aucune difficulté et montre que: ( 2 x-1)= ln ( 6) Simplement à titre d'exemple, la figure 3 montre comment on peut réaliser certains des détails d'un circuit baked balanced offers no difficulty and shows that: (2 x-1) = ln (6) Simply as an example, Figure 3 shows how we can achieve some of the details of a circuit

pratique basé sur la configuration de la figure 2 Le fonc- practice based on the configuration of Figure 2.

tionnement du circuit ne présente en majeure partie aucune Most of the circuit's layout

difficulté de compréhension Q 7 et Q 8 remplissent une dou- difficulty of comprehension Q 7 and Q 8 fill a

ble fonction, en réduisant les courants de base de Q 4 à QG, et en établissant une certaine marge supérieure pour les collecteurs des quatre transistors I' et IR sont fixés à function, reducing the base currents from Q 4 to QG, and establishing a certain upper margin for the collectors of the four transistors I 'and IR are set to

des valeurs relativement élevées Ceci permet à la résis- relatively high values This allows the resistance

tance R d' tre suffisamment faible pour que des erreurs de R to be sufficiently low so that errors in

courant de base dans Q 1 à l'extrémité supérieure de la gam- base current in Q 1 at the upper end of the gam-

me de signal d'entrée produisent une erreur négligeable à me input signal produce a negligible error to

la sortie.the exit.

En retournant à la figure 2, on note qu'un bêta Returning to Figure 2, we note that a beta

fini dans les transistors "centraux" Q 1 et Q 2 aura un cer- finished in the "central" transistors Q 1 and Q 2 will have some

tain effet défavorable Plus précisément, bien que les cou- tain adverse effect More specifically, although

rants de base de Q 1 et Q 2 ne modifient pas la tension aux bornes des résistances R (du fait que le circuit de réaction force cette dernière à être toujours égale à VT ln (I 1/12)), Basic rims of Q 1 and Q 2 do not modify the voltage across the resistors R (because the feedback circuit forces the latter to always be equal to VT ln (I 1/12)),

ils modifient effectivement la valeur du facteur de modula- they actually change the value of the modula-

tion x qui est nécessaire pour établir cette tension, et ils introduisent donc une erreur dans le signal de sortie final La figure 4 montre une modification supplémentaire tion x which is necessary to establish this voltage, and they thus introduce an error in the final output signal Figure 4 shows an additional modification

apportée à la partie centrale de la configuration de la fi- brought to the central part of the configuration of the

gure 2, qui élimine ce problème de la manière suivante Q 14 produit un courant de base égal aux courants de base totaux Figure 2, which eliminates this problem in the following manner Q 14 produces a base current equal to the total base currents

de Q 1 et Q 2 Q 12 et Q 1) forment une paire à couplage d'émet- of Q 1 and Q 2 Q 12 and Q 1) form an emitter coupled pair.

teurs qui proportionne ce courant de la même manière que Q 1 et Q 2 proportionnent le courant d'émetteur total Il + 120 which proportionates this current in the same way that Q 1 and Q 2 proportion the total emitter current Il + 120

Du fait des connexions croisées, et en supposant que le fac- Because of cross-connections, and assuming that the

teur de défaut de courant de base S ( 1/ p)soit faible, le courant de collecteur de Q 12 est étroitement égal au courant de base de Q 2; de façon similaire, le courant de collecteur de Q 13 est étroitement égal au courant de base de Q 1 Le courant de base dans chaque résistance est donc & (Il + 12), the basic current fault current S (1 / p) is low, the collector current of Q 12 is closely equal to the base current of Q 2; similarly, the collector current of Q 13 is closely equal to the base current of Q 1. The base current in each resistor is therefore & (Il + 12),

et l'erreur différentielle résultante est égale à zéro. and the resulting differential error is zero.

Il va de soi que de nombreuses autres modifica- It goes without saying that many other changes

tions peuvent 9 tre apportées au dispositif décrit et repré- can be made to the device described and

senté, sans sortir du cadre de l'invention. felt, without departing from the scope of the invention.

2 i 4289 12 i 4289 1

Claims

CLAIMS Logarithmic circuit for producing an output signal (ES) proportional to the logarithm of an input signal (II) and free of temperature-induced variations, characterized in that it comprises: means input signal (Q 1, Q 2) responsive to the input signal (11) and comprising means capable of producing a first signal proportional to the product of the following quantities: (1) the logarithm of the input signal and 2) the absolute temperature; a circuit element (R, QY, 4 p IT) comprising a current source proportional to the absolute temperature (IT) 'which produces a second signal and which is connected to the input means (Q 1, Q 2); said circuit element (R ,, Q 4, IJ) including means for modulating the value of the second signal according to said logarithm while canceling the temperature related factors of the two signals; and output means (Q 5, Q 6, 20) for producing an output signal (Es) which corresponds to the modulation of the second signal. Circuit according to Claim 1, characterized in that the input means comprise differential means (Q 1, Q 2) which respond to the input signal (II) and to a reference signal (I 2) in generating the first signal so that it is proportional to the logarithm of the ratio of the input (h 1) and reference (12) signals.

3 Dircuit according to claim 2, characterized in that the differential means comprise first and second transistors (Q 1, Q 2) having common emitters; and the input (II) and reference (I 2) signals consist of

in currents crossing respectively these transistors.

Circuit according to Claim 3, characterized in that the circuit element comprises a resistor (R) connected to the base of the second transistor (Q 2); and

means (Q 3, Q 4) connecting the proportional current source

the absolute temperature (IT) at the resistance, for

$ 251 301;

circulate in the latter a proportional current

at the absolute temperature.

Circuit according to Claim 4, characterized in that the connection means comprise third and fourth transistors (Q 3, Q 4) whose emitters are connected together; the resistor (R) is connected between the collector and the base of the third transistor (Q 3); and the current source proportional to the absolute temperature (I) is connected to the transmitters of the third and fourth

transistors (Q 3, Q 4).

Circuit according to Claim 5, characterized in that the base of the first transistor (Q 1) is connected to a reference potential; the base of the second transistor (Q 2) is connected to the collector of the third transistor

(Q 3) and the base of the third transistor (Q 3) is connected

at a reference potential.

Circuit according to Claim 3, characterized in that the base of the first transistor (Q 1) is connected to a reference potential; the circuit element includes

a resistance (R) connected between the base of the second tran-

sistor (Q 2) and a reference potential; the current source proportional to the absolute temperature (IT) is

connected to the resistor (R) to circulate in this

the last a current proportional to the absolute temperature

read, to produce the second signal.

8 circuit according to claim 7, characterized in that it comprises a high gain amplifier (12) whose output is connected to the common emitters of the first and second transistors (Q 1 'Q 2) and whose input is connected at the collector of the first transistor (Q 1); and the input of this amplifier is also connected to an input terminal (10) which receives the input current (I 1) and

force the circulation of this current in the first

Tor (Q 1) 0 9 Circuit according to Claim 8, characterized in that the reference signal (I 2) is provided by a current source (I 2) which is connected to the collector of the second transistor (Q 2) Circuit according to Claim 7, characterized in that the circuit element further comprises three

third (Q 3) and fourth (Q 4) transistors, with a con-

number of common transmitters; the third transistor (Q 3) is connected to the resistor (R) to carry the current of the latter; and the circuit element divides between the third (Q 3) and fourth (Q 4) transistors the current which

comes from the current source proportional to the temperature

absolute reduction (IT), and the proportion of current that

the third transistor (Q 3) is the

modulation that is a function of the current ratio.

Circuit according to claim 10, characterized

characterized in that it comprises fifth (Q 5) and sixth (Q 6) transistors whose emitters are connected together;

these fifth and sixth transistors (Q 5, Q 6) are connected

third and fourth transistors (Q 3, Q 4); the

output means comprise means (IR) for reproducing

in the sixth transistor (Q 6) a current modulation corresponding to that of the current flowing through the

third transistor (Q 3); and the output means

furthermore take means (20) which react with the current flowing in the sixth transistor (Q 6) producing a

output signal (Es) -

12 Equivalent logarithmic ratio circuit

characterized in that it comprises: a first pair

paired transistors (Q 1 'Q 2) connected with their transmitters

common players; the collectors of these transistors being connected to respective input terminals (10, N) for receiving input currents (I 1, 12); an amplifier

(12) whose input is connected to one of the input terminals

(10) and whose output is connected to the transmitters

common; a pair of resistors (R 1, R 2), each of which

254 '2891

being connected at one of its ends to a respective base of the pair of transistors (Q 1 1 Q 2); others

ends (R 1, R 2) of the resistors being connected together

ble to a reference potential; a second pair of paired transistors (Q 3, Q 4) whose collectors are respectively connected to the bases of the first pair of transistors (Qle Q 2) and whose transmitters are connected

together; a current source proportional to the temperature

absolute gap (I,) connected to the emitters of the second pair of transistors, to circulate in them and in the respective resistors (R 1, R 2) a current modulated in accordance with the logarithm of the ratio of the input currents (II , I 2); and output means (Q 5, Q 6, 20) for

produce an output signal (ES) according to the modula-

current proportional to absolute temperature (IT ^) o ^

Circuit according to claim 12, characterized

in that the output means comprises a third pair of transistors (Q 51 Q 6) paired with the second pair

(Q 3, Q 4); the transmitters of the third pair of transistors

tors are connected together to a constant current source

both (IR); the third pair of transistors (Q 5, Q 6) is connected to the second pair (Q 3, Q 4) to ensure that the current flowing through the third pair is modulated

in correspondence with the modulation of the current in the se-

paired count; and the output means comprises means (20) responsive to the current flowing in one

transistors (Q 5, Q 6) of the third pair.

Circuit according to claim 13, characterized

it includes a current mirror circuit

connected to the collectors of the third pair of transistors (Q 5, Q 6); and the output means (20) is connected to the collector of one of the transistors (Q 5 QG) of the third pair. Method for producing an independent signal

254-891

1 1 of the temperature which corresponds to the logarithm of a signal

of entry (II), characterized in that: a first

signal representing the product of the following quantities

are: (1) the logarithm of the input signal (II) and- (2) the absolute temperature; producing a second signal from a current source proportional to the absolute temperature (I); the first and second signals are combined and the value of the second signal is set so as to cancel out the temperature-dependent factors in the two signals;

or modulates the value of the second signal in accordance with the

ratio of the input signal (II) to a

reference standard (I 2); and an output signal is produced *

(Es) according to the modulation of the second signal.

Circuit according to claim 15, characterized

in that the first signal is produced by a pair of opposing PN junctions (Q 11 Q 2), one of which is traversed by a first current corresponding to the input signal.

(II) and the other is crossed by a second current (I 2).

Circuit according to claim 16, characterized

in that the modulation of the second signal is effected by a second pair of opposite PN junctions (Q 3, Q 4). 18. The circuit of claim 12 including means for avoiding the effects of a finite beta in the first signal. pair of transistors (Q 1, Q 2), characterized in that it comprises: a third pair of transistors (Q 12 'Q 13) coupled by the emitters, whose collectors are respectively connected to the bases of the first pair of transistors (Q 1, Q 2); and in that the collector of each transistor of the third pair (Q 12, Q 1) is connected to the base of the other transistor of the third pair; and

the collector of an additional transistor (Q 14) is

connected to the emitters of the first pair of transistors

(Ql Q 2) and its base is connected to the transmitters of the third

second pair of transistors (Q 12 'Q 13) 0