DE3280477T2 - Hochgeschwindigkeits-Multiplizierer für einen Mikrorechner zur Anwendung in einem digitalen Signalverarbeitungssystem - Google Patents

Hochgeschwindigkeits-Multiplizierer für einen Mikrorechner zur Anwendung in einem digitalen Signalverarbeitungssystem

Info

Publication number
DE3280477T2
DE3280477T2 DE19823280477 DE3280477T DE3280477T2 DE 3280477 T2 DE3280477 T2 DE 3280477T2 DE 19823280477 DE19823280477 DE 19823280477 DE 3280477 T DE3280477 T DE 3280477T DE 3280477 T2 DE3280477 T2 DE 3280477T2
Authority
DE
Germany
Prior art keywords
microcomputer
signal processing
processing system
high speed
digital signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE19823280477
Other languages
English (en)
Other versions
DE3280477D1 (de
Inventor
Edward R Caudel
Surendar S Magar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/347,859 external-priority patent/US4538239A/en
Priority claimed from US06/350,852 external-priority patent/US4577282A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE3280477D1 publication Critical patent/DE3280477D1/de
Publication of DE3280477T2 publication Critical patent/DE3280477T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7814—Specially adapted for real time processing, e.g. comprising hardware timers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/786—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using a single memory module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
    • G06F7/5338—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm each bitgroup having two new bits, e.g. 2nd order MBA
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
  • Complex Calculations (AREA)
  • Memory System (AREA)
DE19823280477 1982-02-11 1982-12-23 Hochgeschwindigkeits-Multiplizierer für einen Mikrorechner zur Anwendung in einem digitalen Signalverarbeitungssystem Expired - Lifetime DE3280477T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US34786082A 1982-02-11 1982-02-11
US06/347,859 US4538239A (en) 1982-02-11 1982-02-11 High-speed multiplier for microcomputer used in digital signal processing system
US06/350,852 US4577282A (en) 1982-02-22 1982-02-22 Microcomputer system for digital signal processing

Publications (2)

Publication Number Publication Date
DE3280477D1 DE3280477D1 (de) 1997-11-13
DE3280477T2 true DE3280477T2 (de) 1998-02-12

Family

ID=27407800

Family Applications (3)

Application Number Title Priority Date Filing Date
DE3280476T Expired - Lifetime DE3280476T2 (de) 1982-02-11 1982-12-23 Mikrorechnersystem für digitale Datenverarbeitung
DE3280481T Expired - Lifetime DE3280481D1 (de) 1982-02-11 1982-12-23 Mikrorechnersystem für digitale Signalprozessoren
DE19823280477 Expired - Lifetime DE3280477T2 (de) 1982-02-11 1982-12-23 Hochgeschwindigkeits-Multiplizierer für einen Mikrorechner zur Anwendung in einem digitalen Signalverarbeitungssystem

Family Applications Before (2)

Application Number Title Priority Date Filing Date
DE3280476T Expired - Lifetime DE3280476T2 (de) 1982-02-11 1982-12-23 Mikrorechnersystem für digitale Datenverarbeitung
DE3280481T Expired - Lifetime DE3280481D1 (de) 1982-02-11 1982-12-23 Mikrorechnersystem für digitale Signalprozessoren

Country Status (3)

Country Link
EP (3) EP0377466B1 (de)
JP (4) JPH079646B2 (de)
DE (3) DE3280476T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3650703T2 (de) 1985-02-12 1999-04-01 Texas Instruments Inc Mikroprozessor mit einer Blockübertragungsinstruktion
GB2174517B (en) * 1985-03-23 1990-01-10 Burr Brown Ltd Apparatus and method for utilizing an auxiliary data memory unit in a data processing system having separate program and data memory units
JPS6320676A (ja) * 1986-07-15 1988-01-28 Brother Ind Ltd ワードプロセツサ
JP3043341B2 (ja) * 1988-05-25 2000-05-22 日本電気株式会社 マイクロコンピュータシステム
KR0136594B1 (ko) * 1988-09-30 1998-10-01 미다 가쓰시게 단일칩 마이크로 컴퓨터
JPH05197526A (ja) * 1991-08-28 1993-08-06 Toshiba Corp 乗算回路
JP3231429B2 (ja) * 1992-11-06 2001-11-19 株式会社日立製作所 中央処理装置と乗算器とを有する半導体集積回路装置

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US253624A (en) 1882-02-14 Weed and lawn mower
US3757306A (en) * 1971-08-31 1973-09-04 Texas Instruments Inc Computing systems cpu
US3757308A (en) 1971-09-03 1973-09-04 Texas Instruments Inc Data processor
US3984816A (en) 1973-05-16 1976-10-05 Texas Instruments, Inc. Expandable function electronic calculator
US3900722A (en) 1973-09-13 1975-08-19 Texas Instruments Inc Multi-chip calculator system having cycle and subcycle timing generators
US3921142A (en) 1973-09-24 1975-11-18 Texas Instruments Inc Electronic calculator chip having test input and output
US3934233A (en) 1973-09-24 1976-01-20 Texas Instruments Incorporated Read-only-memory for electronic calculator
US3932846A (en) 1973-09-24 1976-01-13 Texas Instruments Incorporated Electronic calculator having internal means for turning off display
US3991305A (en) 1974-11-19 1976-11-09 Caudel Edward R Electronic calculator or digital processor chip with multiple code combinations of display and keyboard scan outputs
US3939335A (en) 1974-11-26 1976-02-17 Texas Instruments Incorporated Universal condition latch in an electronic digital calculator
US4074351A (en) 1974-12-02 1978-02-14 Texas Instruments Incorporated Variable function programmed calculator
JPS5197349A (en) * 1975-02-24 1976-08-26 Deeta shifutohoshiki
GB1540923A (en) * 1975-12-01 1979-02-21 Intel Corp Programmable single chip mos computer
US4179734A (en) * 1976-07-02 1979-12-18 Floating Point Systems, Inc. Floating point data processor having fast access memory means
US4156927A (en) 1976-08-11 1979-05-29 Texas Instruments Incorporated Digital processor system with direct access memory
US4125901A (en) 1976-10-27 1978-11-14 Texas Instruments Incorporated Electronic calculator or microprocessor having a multi-input arithmetic unit
US4158432A (en) 1976-12-10 1979-06-19 Texas Instruments Incorporated Control of self-test feature for appliances or electronic equipment operated by microprocessor
US4144561A (en) * 1977-07-08 1979-03-13 Xerox Corporation Chip topography for MOS integrated circuitry microprocessor chip
FR2397679B1 (fr) * 1977-07-15 1988-02-26 Mostek Corp Calculateur microprogramme fabrique sur une pastille semi-conductrice unique
JPS5685157A (en) * 1979-12-15 1981-07-11 Toshiba Corp Information processor
JPS5694589A (en) * 1979-12-27 1981-07-31 Nec Corp Memory device
US4495593A (en) * 1982-07-01 1985-01-22 Hewlett-Packard Company Multiple bit encoding technique for combinational multipliers

Also Published As

Publication number Publication date
JPH02186487A (ja) 1990-07-20
DE3280481D1 (de) 2000-04-13
EP0086307A2 (de) 1983-08-24
JPH079646B2 (ja) 1995-02-01
EP0392133B1 (de) 1997-10-08
JPH02186485A (ja) 1990-07-20
EP0377466A1 (de) 1990-07-11
JPS58163060A (ja) 1983-09-27
EP0392133A1 (de) 1990-10-17
EP0086307A3 (de) 1986-11-05
JPH079648B2 (ja) 1995-02-01
DE3280476T2 (de) 1997-06-12
JPH079649B2 (ja) 1995-02-01
EP0086307B1 (de) 1997-02-26
EP0377466B1 (de) 2000-03-08
JPH079647B2 (ja) 1995-02-01
DE3280477D1 (de) 1997-11-13
JPH02186486A (ja) 1990-07-20
DE3280476D1 (de) 1997-04-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition