DE3279426D1 - Cache control method and apparatus - Google Patents

Cache control method and apparatus

Info

Publication number
DE3279426D1
DE3279426D1 DE8282306313T DE3279426T DE3279426D1 DE 3279426 D1 DE3279426 D1 DE 3279426D1 DE 8282306313 T DE8282306313 T DE 8282306313T DE 3279426 T DE3279426 T DE 3279426T DE 3279426 D1 DE3279426 D1 DE 3279426D1
Authority
DE
Germany
Prior art keywords
control method
cache control
cache
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282306313T
Other languages
German (de)
English (en)
Inventor
David P Dodd
Ronald L Blickenstaff
Richard L Coulson
Robert J Moreno
Brian E Trede
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Storage Technology Corp
Original Assignee
Storage Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Storage Technology Corp filed Critical Storage Technology Corp
Application granted granted Critical
Publication of DE3279426D1 publication Critical patent/DE3279426D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6026—Prefetching based on access pattern detection, e.g. stride based prefetch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/6028—Prefetching based on hints or prefetch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE8282306313T 1981-11-27 1982-11-26 Cache control method and apparatus Expired DE3279426D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/325,350 US4468730A (en) 1981-11-27 1981-11-27 Detection of sequential data stream for improvements in cache data storage

Publications (1)

Publication Number Publication Date
DE3279426D1 true DE3279426D1 (en) 1989-03-09

Family

ID=23267525

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282306313T Expired DE3279426D1 (en) 1981-11-27 1982-11-26 Cache control method and apparatus

Country Status (5)

Country Link
US (1) US4468730A (fr)
EP (1) EP0080876B1 (fr)
JP (1) JPS58155464A (fr)
CA (1) CA1180466A (fr)
DE (1) DE3279426D1 (fr)

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US5257370A (en) * 1989-08-29 1993-10-26 Microsoft Corporation Method and system for optimizing data caching in a disk-based computer system
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JPH03216751A (ja) * 1990-01-05 1991-09-24 Internatl Business Mach Corp <Ibm> フアイル転送方法
US5325509A (en) * 1991-03-05 1994-06-28 Zitel Corporation Method of operating a cache memory including determining desirability of cache ahead or cache behind based on a number of available I/O operations
US5594885A (en) * 1991-03-05 1997-01-14 Zitel Corporation Method for operating a cache memory system using a recycled register for identifying a reuse status of a corresponding cache entry
US5590300A (en) * 1991-03-05 1996-12-31 Zitel Corporation Cache memory utilizing address translation table
EP0574531A4 (fr) * 1991-03-05 1995-03-08 Zitel Corp Systeme d'antememoire et procede d'exploitation de ce systeme.
SE469402B (sv) * 1991-05-02 1993-06-28 Swedish Inst Of Computer Scien Foerfarande foer att haemta data till ett cache-minne
CA2074769C (fr) * 1991-08-09 2001-03-20 International Business Machines Corporation Processeur a formules
US5588140A (en) * 1993-03-15 1996-12-24 Computer Network Technology Corporation Transparent extension of peripheral from host
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US5627994A (en) * 1994-07-29 1997-05-06 International Business Machines Corporation Method for the assignment of request streams to cache memories
US8171203B2 (en) 1995-07-31 2012-05-01 Micron Technology, Inc. Faster write operations to nonvolatile memory using FSInfo sector manipulation
US6728851B1 (en) 1995-07-31 2004-04-27 Lexar Media, Inc. Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
US6978342B1 (en) 1995-07-31 2005-12-20 Lexar Media, Inc. Moving sectors within a block of information in a flash memory mass storage architecture
US5845313A (en) 1995-07-31 1998-12-01 Lexar Direct logical block addressing flash memory mass storage architecture
US6167496A (en) * 1998-02-18 2000-12-26 Storage Technology Corporation Data stream optimization system for video on demand
US6327644B1 (en) 1998-08-18 2001-12-04 International Business Machines Corporation Method and system for managing data in cache
US6141731A (en) * 1998-08-19 2000-10-31 International Business Machines Corporation Method and system for managing data in cache using multiple data structures
US6381677B1 (en) 1998-08-19 2002-04-30 International Business Machines Corporation Method and system for staging data into cache
JP2001101842A (ja) * 1999-09-30 2001-04-13 Fujitsu Ltd ディスク装置
US7102671B1 (en) 2000-02-08 2006-09-05 Lexar Media, Inc. Enhanced compact flash memory card
US7167944B1 (en) 2000-07-21 2007-01-23 Lexar Media, Inc. Block management for mass storage
US7275135B2 (en) * 2001-08-31 2007-09-25 Intel Corporation Hardware updated metadata for non-volatile mass storage cache
GB0123416D0 (en) 2001-09-28 2001-11-21 Memquest Ltd Non-volatile memory control
GB0123421D0 (en) 2001-09-28 2001-11-21 Memquest Ltd Power management system
GB0123417D0 (en) 2001-09-28 2001-11-21 Memquest Ltd Improved data processing
GB0123410D0 (en) 2001-09-28 2001-11-21 Memquest Ltd Memory system for data storage and retrieval
GB0123419D0 (en) 2001-09-28 2001-11-21 Memquest Ltd Data handling system
GB0123415D0 (en) 2001-09-28 2001-11-21 Memquest Ltd Method of writing data to non-volatile memory
US20030074524A1 (en) * 2001-10-16 2003-04-17 Intel Corporation Mass storage caching processes for power reduction
US6950918B1 (en) 2002-01-18 2005-09-27 Lexar Media, Inc. File management of one-time-programmable nonvolatile memory devices
US6957295B1 (en) 2002-01-18 2005-10-18 Lexar Media, Inc. File management of one-time-programmable nonvolatile memory devices
US7231643B1 (en) 2002-02-22 2007-06-12 Lexar Media, Inc. Image rescue system including direct communication between an application program and a device driver
US6973519B1 (en) 2003-06-03 2005-12-06 Lexar Media, Inc. Card identification compatibility
JP2007515024A (ja) 2003-12-17 2007-06-07 レクサー メディア， インコーポレイテッド 盗難を避けるための電子装置の販売場所におけるアクティブ化
US20050138296A1 (en) * 2003-12-18 2005-06-23 Coulson Richard L. Method and system to alter a cache policy
US7725628B1 (en) 2004-04-20 2010-05-25 Lexar Media, Inc. Direct secondary device interface by a host
US7370166B1 (en) 2004-04-30 2008-05-06 Lexar Media, Inc. Secure portable storage device
US7877546B2 (en) * 2004-08-09 2011-01-25 International Business Machines Corporation System, method, and circuit for retrieving data in data blocks into a cache memory from a mass data storage device based on a triggering event
US7594063B1 (en) 2004-08-27 2009-09-22 Lexar Media, Inc. Storage capacity status
US7464306B1 (en) 2004-08-27 2008-12-09 Lexar Media, Inc. Status of overall health of nonvolatile memory

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Also Published As

Publication number Publication date
US4468730A (en) 1984-08-28
EP0080876A3 (en) 1985-07-10
EP0080876A2 (fr) 1983-06-08
CA1180466A (fr) 1985-01-02
JPS58155464A (ja) 1983-09-16
EP0080876B1 (fr) 1989-02-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee