DE3276344D1 - Semiconductor circuit for driving clock signal line - Google Patents

Semiconductor circuit for driving clock signal line

Info

Publication number
DE3276344D1
DE3276344D1 DE8282300645T DE3276344T DE3276344D1 DE 3276344 D1 DE3276344 D1 DE 3276344D1 DE 8282300645 T DE8282300645 T DE 8282300645T DE 3276344 T DE3276344 T DE 3276344T DE 3276344 D1 DE3276344 D1 DE 3276344D1
Authority
DE
Germany
Prior art keywords
clock signal
signal line
semiconductor circuit
driving clock
driving
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282300645T
Other languages
English (en)
Inventor
Yoshihiro Takemae
Shigeki Nozaki
Katsuhiko Kabashima
Seiji Enomoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3276344D1 publication Critical patent/DE3276344D1/de
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408Address circuits
    • G11C11/4085Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01Shaping pulses
    • H03K5/02Shaping pulses by amplifying
    • H03K5/023Shaping pulses by amplifying using field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Dram (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)
  • Static Random-Access Memory (AREA)
DE8282300645T 1981-02-12 1982-02-09 Semiconductor circuit for driving clock signal line Expired DE3276344D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56019312A JPS57133589A (en) 1981-02-12 1981-02-12 Semiconductor circuit

Publications (1)

Publication Number Publication Date
DE3276344D1 true DE3276344D1 (en) 1987-06-19

Family

ID=11995890

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282300645T Expired DE3276344D1 (en) 1981-02-12 1982-02-09 Semiconductor circuit for driving clock signal line

Country Status (5)

Country Link
US (1) US4496850A (de)
EP (1) EP0058509B1 (de)
JP (1) JPS57133589A (de)
DE (1) DE3276344D1 (de)
IE (1) IE53090B1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57164492A (en) * 1981-04-02 1982-10-09 Nec Corp Semiconductor device
US4508978A (en) * 1982-09-16 1985-04-02 Texas Instruments Incorporated Reduction of gate oxide breakdown for booted nodes in MOS integrated circuits
US4598216A (en) * 1984-08-27 1986-07-01 Ncr Corporation Assist circuit for a data bus in a data processing system
US4639622A (en) * 1984-11-19 1987-01-27 International Business Machines Corporation Boosting word-line clock circuit for semiconductor memory
US4678941A (en) * 1985-04-25 1987-07-07 International Business Machines Corporation Boost word-line clock and decoder-driver circuits in semiconductor memories
JPH0782749B2 (ja) * 1986-03-28 1995-09-06 三菱電機株式会社 ブ−ステツド信号駆動回路
JP2543058B2 (ja) * 1986-12-16 1996-10-16 富士通株式会社 半導体記憶装置
US4810905A (en) * 1987-05-19 1989-03-07 Gazelle Microcircuits, Inc. Capacitor coupled push pull logic circuit
US5969559A (en) * 1997-06-09 1999-10-19 Schwartz; David M. Method and apparatus for using a power grid for clock distribution in semiconductor integrated circuits

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3718826A (en) * 1971-06-17 1973-02-27 Ibm Fet address decoder
US4061933A (en) * 1975-12-29 1977-12-06 Mostek Corporation Clock generator and delay stage
US4240092A (en) * 1976-09-13 1980-12-16 Texas Instruments Incorporated Random access memory cell with different capacitor and transistor oxide thickness
JPS5461429A (en) * 1977-10-26 1979-05-17 Hitachi Ltd Dynamic mis memory circuit
US4256976A (en) * 1978-12-07 1981-03-17 Texas Instruments Incorporated Four clock phase N-channel MOS gate
US4413401A (en) * 1979-07-23 1983-11-08 National Semiconductor Corporation Method for making a semiconductor capacitor
JPS5658331A (en) * 1979-10-19 1981-05-21 Mitsubishi Electric Corp Clock driver circuit
JPS5693422A (en) * 1979-12-05 1981-07-29 Fujitsu Ltd Level-up circuit
US4316106A (en) * 1980-01-11 1982-02-16 Mostek Corporation Dynamic ratioless circuitry for random logic applications
US4376252A (en) * 1980-08-25 1983-03-08 International Business Machines Corporation Bootstrapped driver circuit
JPS57106228A (en) * 1980-12-24 1982-07-02 Fujitsu Ltd Semiconductor circuit

Also Published As

Publication number Publication date
EP0058509A2 (de) 1982-08-25
EP0058509A3 (en) 1984-10-03
IE53090B1 (en) 1988-06-08
JPS57133589A (en) 1982-08-18
EP0058509B1 (de) 1987-05-13
IE820305L (en) 1982-08-12
JPH0319638B2 (de) 1991-03-15
US4496850A (en) 1985-01-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee