DE3272517D1 - Method and device for the exchange of information between terminals and a central control unit - Google Patents
Method and device for the exchange of information between terminals and a central control unitInfo
- Publication number
- DE3272517D1 DE3272517D1 DE8282430008T DE3272517T DE3272517D1 DE 3272517 D1 DE3272517 D1 DE 3272517D1 DE 8282430008 T DE8282430008 T DE 8282430008T DE 3272517 T DE3272517 T DE 3272517T DE 3272517 D1 DE3272517 D1 DE 3272517D1
- Authority
- DE
- Germany
- Prior art keywords
- terminals
- exchange
- information
- control unit
- central control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
- G06F13/282—Cycle stealing DMA
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Communication Control (AREA)
- Computer And Data Communications (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Bus Control (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP82430008A EP0089440B1 (de) | 1982-03-24 | 1982-03-24 | Verfahren und Einrichtung zum Informationsaustausch zwischen Terminals und einer zentralen Steuereinheit |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3272517D1 true DE3272517D1 (en) | 1986-09-18 |
Family
ID=8189977
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282430008T Expired DE3272517D1 (en) | 1982-03-24 | 1982-03-24 | Method and device for the exchange of information between terminals and a central control unit |
Country Status (5)
Country | Link |
---|---|
US (1) | US4593352A (de) |
EP (1) | EP0089440B1 (de) |
JP (1) | JPS58207144A (de) |
CA (1) | CA1196729A (de) |
DE (1) | DE3272517D1 (de) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4771403A (en) * | 1984-11-16 | 1988-09-13 | Allen-Bradley Company, Inc. | I/O module with multi-function integrated circuits and an isolation interface for multiplexing data between a main processor and I/O devices |
EP0244544B1 (de) | 1986-04-30 | 1991-01-16 | International Business Machines Corporation | Hochgeschwindigkeitsleitungsadapter für eine Übertragungssteuerung |
US5199105A (en) * | 1988-09-14 | 1993-03-30 | National Semiconductor Corporation | Universal asynchronous receiver/transmitter |
US5228130A (en) * | 1988-09-14 | 1993-07-13 | National Semiconductor Corporation | Multi-channel peripheral interface using selectively flaggable channel register sets for concurrent write in response to any selected channel register write instruction |
US5140679A (en) * | 1988-09-14 | 1992-08-18 | National Semiconductor Corporation | Universal asynchronous receiver/transmitter |
US5047927A (en) * | 1988-10-28 | 1991-09-10 | National Semiconductor Corporation | Memory management in packet data mode systems |
JP2644554B2 (ja) * | 1988-11-15 | 1997-08-25 | 株式会社日立製作所 | 情報処理システム |
JP2545482B2 (ja) * | 1990-03-15 | 1996-10-16 | 富士通株式会社 | インタ―フェイス装置の転送パラメ―タ設定方法 |
EP0535284A1 (de) * | 1991-09-30 | 1993-04-07 | International Business Machines Corporation | Verfahren und Vorrichtung zur Erweiterung der Verbindungsfähigkeit eines Kommunikationssystems |
US5574869A (en) * | 1992-03-30 | 1996-11-12 | Intel Corporation | Bus bridge circuit having configuration space enable register for controlling transition between various modes by writing the bridge identifier into CSE register |
DE69212997T2 (de) * | 1992-06-19 | 1997-05-28 | Euro Cp Sarl | Verfahren zur Adressierung einer Betriebseinrichtung und zur Verbindung von zwei Betriebseinrichtungen; Betriebseinrichtung und Anlage dafür |
EP0582535A1 (de) * | 1992-07-07 | 1994-02-09 | International Business Machines Corporation | Verfahren zur automatischen Schrifttypenbestimmung bei gemeinsamer Verwendung von Anwendungen |
FR2721468B1 (fr) * | 1994-06-17 | 1996-07-26 | Alcatel Mobile Comm France | Procédé de partage de ressources physiques et dispositif d'interface pour la mise en Óoeuvre du procédé. |
US5915131A (en) * | 1995-05-05 | 1999-06-22 | Apple Computer, Inc. | Method and apparatus for handling I/O requests utilizing separate programming interfaces to access separate I/O services |
JP3524247B2 (ja) * | 1995-10-09 | 2004-05-10 | 任天堂株式会社 | ゲーム機およびそれを用いたゲーム機システム |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4015243A (en) * | 1975-06-02 | 1977-03-29 | Kurpanek Horst G | Multi-processing computer system |
US4001790A (en) * | 1975-06-30 | 1977-01-04 | Honeywell Information Systems, Inc. | Modularly addressable units coupled in a data processing system over a common bus |
US4028668A (en) * | 1975-12-22 | 1977-06-07 | Honeywell Information Systems, Inc. | Apparatus for selectively addressing sections and locations in a device controller's memory |
US4067059A (en) * | 1976-01-29 | 1978-01-03 | Sperry Rand Corporation | Shared direct memory access controller |
US4133030A (en) * | 1977-01-19 | 1979-01-02 | Honeywell Information Systems Inc. | Control system providing for the transfer of data in a communications processing system employing channel dedicated control blocks |
US4156932A (en) * | 1977-07-05 | 1979-05-29 | Honeywell Information Systems Inc. | Programmable communications controller |
US4437157A (en) * | 1978-07-20 | 1984-03-13 | Sperry Corporation | Dynamic subchannel allocation |
US4417304A (en) * | 1979-07-30 | 1983-11-22 | International Business Machines Corporation | Synchronous cycle steal mechanism for transferring data between a processor storage unit and a separate data handling unit |
-
1982
- 1982-03-24 DE DE8282430008T patent/DE3272517D1/de not_active Expired
- 1982-03-24 EP EP82430008A patent/EP0089440B1/de not_active Expired
-
1983
- 1983-02-10 CA CA000421287A patent/CA1196729A/en not_active Expired
- 1983-03-11 US US06/474,401 patent/US4593352A/en not_active Expired - Lifetime
- 1983-03-24 JP JP58048066A patent/JPS58207144A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS58207144A (ja) | 1983-12-02 |
CA1196729A (en) | 1985-11-12 |
US4593352A (en) | 1986-06-03 |
EP0089440B1 (de) | 1986-08-13 |
JPH0142415B2 (de) | 1989-09-12 |
EP0089440A1 (de) | 1983-09-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |