DE3210369A1 - Electronic counter in 1-of-10 code - Google Patents

Abstract

The subject-matter of the invention is an electronic modulo-10 counter which also consists of decades and the flip flops of which are only unilaterally activated and in which the flip flop activation circuits and the display AND gates (31 to 34 and 36 to 39) consist of special transistors according to P 3151828.1 which have an accurately dimensioned base bias resistance. In a counter according to Figure 1, the decades consist of five flip flops which are combined with one negating-delay circuit each. In a counter according to Figure 2, the decades consist of five double flip flops each. The flip flop input circuits (21 to 25 and 61 to 65) consist of one NPN transistor each having a corresponding base bias resistance. The display AND gates (31 to 34 and 36 to 39) consist of one PNP transistor each having the corresponding base bias resistance. <IMAGE>

Description

Electronic counter in 1-out-of-10 code

The subject of the invention is the formation of the electronic up counter according to the main patent application as a special counter with a simplified display circuit. This simplified display circuit is required when the counter is not consists of double "'lip-flopps but of flip-flopps with delay circuits are combined that have either only one non-negated output or only one negated output Have exit. In the case of the present electronic meter, all of them tip over Flip-flopps every decade two times in succession in their other switch position, which means the starting position of the decade is reached again. Purpose of extensive simplification of the counter, flip-flopps are used that are only controlled on one side evaluate. This simplified display circuit can also be used for similar double flip flopps existing meters can be used. In this case, however, is the present special display circuit not absolutely necessary, because with all flip-flopps that is always negated Output potential is available. The electronic up counter type A, or its decades consist of flip-flopps with delay circuits are combined. These delay circuits are not normal delay circuits, but negated delay circuits. The electronic up-counter type 3 or its decades consist of double flip flopps The electronic forward number, r Type A, or a decade of this counter, is shown in FIG. The electronic Type 3 forward counter or a deactivation of this counter is shown in FIG. In FIG. 3, the detail F from FIG. 1 is shown in component symbols and in FIG 4 shows the detail F from FIG.

There is a decade of the electronic up counter type A (Figure 1) from 5 flip-flopps 1 to 5 and 5 negate delay circuits 11 to 15 and 5 Flipp-Flopp special input circuits 21 to d5, via which the flip-flopps appear On the same side L-potential and d H-potential are controlled and 8 special display switches 31 to 34 and 36 to 39, which also consist of only one transistor, like the flip-flop input circuits. The number 5 is displayed by a normal AND circuit 35 and the number 0 from a negation circuit 40, the input of which is from the output of an OR circuit 41 is controlled, the special ring input circuits 21 to 25 cause pre-control when the potential is high an H-potential control of the relevant flip-flopp input and with L-potential before Ans control an L-potential control of the relevant Flipp-Fiopp input. These Flip-flop input circuits consist of NPN transistors with a base resistor of appropriate size are combined.

In contrast, there are display circuits 31 to 34 and 36 to 39 made of PNP transistors, which are blocking with H-potential control and are conductive with L-potential control. The display outputs A and B are with the associated numerical values (digits 0 to 9). The counting pulse input has the designation Z and the reset line the designation S. Part 41 is the Decade-carry-and-circuit. The desaden-dbertrag-xusgang has the designation U.

The mode of operation of the type A up counter, consisting of one The number of decades according to FIG. 1 results as follows: The resetting of all decades takes place by charging the control line S with a minus current pulse. To of this total provision are all plipp-flops in their every decade Right position (11 potential at the right-hand exit). In this operating position the line c has L potential and is therefore the flip-flop 1 effectively pre-controlled, because it has H-potential on the right-hand side. When the first counting pulse arrives on Input Z thus only tilts the flip-n-flopp 1 into its left position because the flip-flopps 2 to 5 left-seltig L-Potentlal-vor-sichreuerz are. Afterwards lie has a negating delay circuit 11 at their exit X potential. The display circuit 31 at its main input H-potential and at its base ring L-potential and thus at its output H potential, which thus indicates the number 1. So that is the input circuit 22 H-potential-pre-controlled, whereby oe in the second counting pulse the flip-flop 2 tilts to its left position. In connection there is the negier-delay circuit 12 at its output H potential. The display circuit thus has 32 at its HauDt input H-potential and at its base input L-potential and thus at its output H-potential, which shows the number 2. In this way, the third counting pulse tilts Flipp-Flopp 3 in its left position and has the negation delay circuit in connection 13 at its output H potential.

The output of the circuit 33 thus has H potential and thus shows number 3. With the fourth count, the flip-flop 4 flips over in this way in its left position and then has the negation delay circuit 14 at their output H-potential. The output of the circuit 34 thus has H potential and thus shows the number 4. With the fifth number impulse, this will tip over in this way Flipp-Flopp 5 in its left position and has in connection (also with little time Distance) the negation delay circuit 15 at its output H potential. In order to the output of the normal AND circuit 35 has H potential and thus shows the number 5 at. This means that the line s has H potential, as a result of which the input circuit 21 is pre-activated with H potential is. When the sixth counting pulse arrives at input Z, the flip-flop flips over 1 in its right-hand position and then has the negate delay circuit 11 at its output L potential.

The display circuit 36 thus has H potential at its main input and at its base input L potential and thus at its output H potential and shows the number 6.

The input circuit 22 is thus L-potential-pre-activated, whereby the flip-blopp 2 tilts into its right-hand position with the seventh counting pulse. The negation delay circuit 12 is then on. their output L potential. The display circuit 37 thus has H-redi at its main input and at its Base input L potential and thus at its output H potential and thus shows number 7. At the eighth count this way flips that Flipp-Flopp 3 in its right-hand display and then has the negation delay circuit 13 at its output L potential. The output of the display circuit 38 thus has H potential and thus shows the number 8. At the ninth counting pulse, this flips over in this way Flipp-Flopp 4 in its right-hand position and then has the negation delay circuit 14 at its output L potential. The output of the display circuit 39 thus has 11 potential and shows the number 9. This means that the decade is carried over line e pre-controlled, which means that at the tenth counting pulse a transfer pulse is sent to the next higher decade goes off and the flip-flop 5 flips into its legal position because the Ring input circuit 25 is L-potential pre-activated. Afterwards the negate delay circuit 15 at its output L potential. The OR circuit 41 thus has both inputs L potential and thus the negating circuit 40 at its output H potential and shows thus the number 0. This means that the count of the next higher decade is around Digit 1 has risen and the counter reading has fallen from 9 to zero for the current decade and the next cycle of the current decade begins with the next count pulse.

The decade of the electronic forward Z, ihlers Type B, which in Figure 2 is shown, has instead of negating circuits 11 to 15 normal lip-flopps and thus consists of 5 double-flip-flopps 1-51, 2-52, 3-53, 4-54, r-55, which are only controlled on one side. The display circuits the decade is exactly the same as with the forward counter type A, of which one decade is shown in Figure 1. Figures 3 and 4 also show the operating power supply lines and the zero lines are drawn. The operating current supply lines are labeled m and the null lines are labeled n. In these Figures 3 and 4, the Flip-flop input circuits 22 and 23 and the display circuits 32, 33, 37 and 38 have the same numbers as in Figures 1 and 2. The flip-flop input circuits consist of an NPN transistor and the display circuits 31 to 34 and 36 to 39 from a PNP transistor, which is conductive with L-potential control and with H-potential control is blocking. The transistors of the flip-flop input circuits (NPN transistors) are conductive with H-potential control and with L-potential control locking. In order to achieve the intended control effect (H-potential control and L-potential control) are also base resistors at the line points h arranged, which are not shown.

Claims (7)

Claims Electronic modulo 10 forward counter that consists of one or two or more decades best and its dexads from 5 flip-flopps and 5 delay circuits or 5 flip-flopps and 5 negate delay circuits consist of two consecutive times in their other switch position per decade cycle tilt, characterized in that the display circuit only from the number outputs the flip-flopps or the associated delay circuit outputs will. 2) Electronic counter according to claim 1, characterized in that that the single display circuits for the digits 1 to 4 and 6 to 9 from one There are transistors which are blocking with H-potential control and with L-potential control is conductive (PNP transistor). 3) Electronic counter according to claim 1 and 2, characterized in that that the number 5 is indicated by a normal AND circuit of some kind and that the digit O (zero) via an OR circuit (41) from a negation circuit (40) is displayed. 4) Electronic modulo 10 preheat counter consisting of one or two or several decades and its detades consists of 5 double flip-flopps (master-slave flip-flopps or simplified master-slave flip-flopps), two per decade cycle times in sequence to their other switch position, characterized by that the display circuit is only driven by the number outputs of the flip-flopps will. 5) Electronic counter according to claim 4, characterized in that that the single display circuits for the digits 1 to 4 and 6 to 9 from one There are transistors1 which are blocking when H-PoQerrtisl-Ansteuerurlg and when L-potential-connection is conductive. 6) Electronic counter according to claim 4 and 5, characterized in that that the number 5 is indicated by a normal AND circuit of some kind and the digit O (zero) via an OR circuit (41) of a negation circuit (40) is displayed. 7) Other electronic counters consisting of one or two or more Decades consist and their decades consist of 5 flip-flopps or 5 double flip-flopps consist of two consecutive times in their other switch position per decade cycle tilt, characterized in that the individual display circuits for the digits 1 to 4 and 6 to 9 consist of a transistor, which at H-Potential-Ansteuerurlg is blocking and is conductive with L-potential control, and that! the number 5 is indicated by a normal AND circuit of some kind and that the number O (zero) is indicated by a negative circuit via an OR circuit.