DE3120434A1 - ADAPTIVE ECHOCOMPENSATION DEVICE FOR DIGITAL DUPLEX TRANSFER ON TWO-WIRE CABLES - Google Patents

Description

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S there

STANDARD ELECTRICS LORENZ

SHARED COMPANY

STUTTGART

S. Hentschke - P. Wildenauer 2-1

Adaptive echo compensation device for digital duplex transmission on two-wire lines

State of the art

The invention relates to a device according to the preamble of claim 1.

Such a device is known from frequency 34 (1980) H.2., Pp. 40-45.

The adaptive digital filter there consists of an adaptive one Transversal filter. The adaptation can sometimes be done by a received from the remote peer Signal are impaired, so that inadequate compensation takes place. In addition, there is a transversal filter the length of the compensatable echo is determined by the number of coefficients and is therefore narrowly limited. Longer Echoes can therefore only be fully compensated if the number of filter coefficients is considerable is increased.

task
It is therefore the object of the invention to provide a device

Kg / En
4/30/81

S. Hentschke - P. Wildenauer 2-1

of the type mentioned, with which an improved compensation of the originating from the own source signal Interference signal is possible with the fastest possible adaptation.

solution

The object is achieved as specified in claim 1. Further developments result from the subclaims.

Description of the figures

The invention will now be exemplified with reference to the drawings explained in more detail. Show it:

1 shows a block diagram of the device according to the invention,

2 shows a first exemplary embodiment of the compensation circuit 4 Fig. 1,

Fig. 3 shows a second embodiment of the

Compensation circuit 4 from FIG. 1, in which an error difference correlation takes place.

S. Hentschke - P. Wildenauer 2-1

4 shows an advantageous exemplary embodiment of the transversal filter used, in which an error difference correlation takes place
5

FIG. 5 shows the transversal filter according to FIG. 4, wherein for the error signal function and a time division multiplex circuit for each! Compensations signal is provided, and

6 shows an exemplary embodiment of the adjustment circuits from FIGS. 2, 3, 4 and 5.

The device shown in Fig. 1 for connecting a source 1 and a sink 2 to a two-wire line consists essentially of a hybrid circuit 3 and a compensation circuit 4. The source 1 can be a Be a data source or a source for digitized speech signals, for example a PCM encoder. Corresponding applies to the sink 2. The source 1 is connected to the hybrid circuit 3 via a transmission filter 6. The transmission filter 6 limits the bandwidth of the transmission signal upwards and thus brings the digital source signals in a form suitable for transmission via the two-wire line. The hybrid circuit 3 is connected to the two-wire line connected through which the duplex transmission of messages in the synchronization process between the terminal shown

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S. Hentschke - P. Wildenauer 2-1

and the remote terminal, not shown. From the sink branch of the hybrid circuit 3, a sampling and holding element 8, the output of which is connected to the non-inverting input of an operational amplifier constructed subtraction circuit 7 is connected. The sink 1 is connected to the output of the subtraction circuit 7 connected. The sample-and-hold element includes a receiving filter, not shown, which suppresses the high frequency edge interspersed in the received signal.

The output of the source 1 is connected to the input of a digital filter 10 with adaptive coefficient setting connected, which according to the invention from the parallel connection of an adaptive transversal filter 11 and one adaptive recursive filter 12 exists. The parallel connection a recursive filter to the transversal filter is used to compare the length of the compensatable echo to increase the length limited by the transversal filter.

The second input signal of the digital filter 10, which, like the first input signal, is parallel to the inputs the transversal filter 11 and the recursive filter 12 are supplied is the output signal of an analog-to-digital converter 13, which compensated the analog at its input Sink signal from the output of the subtraction circuit 7 receives. The analog-to-digital converter 13 can in the simplest Case a 1-bit A / D converter, i.e. a comparator. The output signals A and B of the two parallel filters 11 and 12 are combined by a digital adder 14 to form the compensation signal. This controls a digital

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S. Hentschke - P. Wildenauer 2-1

Analog converter 15, the output of which is connected to the non-inverting Input of the subtraction circuit 7 is connected. The subtraction circuit 7 thus subtracts from Sum signal in the drain branch, which is the undesirable Contains interference signal, the output signal of the digital .Filter 10. This is a replica of the to be compensated Be interfering signal, so that with complete compensation only the desired received signal is left remain.

The interference signal is made up of crosstalk components of the own transmission signal, which reach the reception path via the hybrid circuit, and of delayed echoes, caused by reflections of the transmitted signal at more distant line impedance mismatches. If the compensation is incomplete, it is on Output of the subtraction circuit 7 received signal or useful signal superimposed on an error signal, which is correlated with the source signal because of its origin. This error signal is used for adjustment the filter coefficient of the adaptive digital filter

For the adaptive recursive filter, simple below Called a recursive filter, two different embodiments are shown in FIGS. The additional The assemblies shown for the recursive filter 12 bordered by dashed lines are essentially already in FIG of Fig. 1 and are therefore required in connection

S. Hentschke - P. Wildenauer 2-1

with FIGS. 2 and 3 no further explanation of its own.

In both embodiments, the recursive filter consists of two filter sections, one of which is recursive Loop 21, 22, 23 and the other contains a multiplier. In Figure 2 the recursive loop is the multiplier upstream, whereas in Fig. 3 this order is reversed. Another important one Difference will be discussed later.

First, the circuit arrangement of the recursive filter explained according to FIG. The reference signal, which is the same as the source signal, passes inside the recursive filter to an adder 21, the output of which is connected to a delay element 22. That in the delay element 22 delayed by one clock period output signal of the adder 21 is in a multiplier 23, whose Output is connected to the second input of the adder 21, multiplied by a filter coefficient a, the adjustment of which will be explained later. The first filter section contains a recursive filter loop, which consists of the adder 21, the delay element 22 and the multiplier 23. The output of this The first filter section passes from the adder 21 to one input of a multiplier 24, which is connected to the second Filter section heard. The output of this multiplier supplies the contribution B of the recursive filter to the! Compensations -

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S. Hentschke - P. Wildenauer 2-1

signal. At the other input of the multiplier is the filter coefficient b of the second filter section, by which the input signal to be filtered is multiplied. Both filter coefficients are used in readjustment circuits 24, which are explained with reference to FIG. 6, each after a predetermined number of clock periods changed in value. For this purpose, the adjustment circuits use correlation products, which are synchronized with the Recursive filter in multipliers 26 and 27 formed are formed. Both multipliers 26 and 27 * multiply a function of the error signal for this purpose (which is superimposed on the useful signal) with a signal derived from the output signal of the recursive filter or from the Output signal of the first filter section is derived.

The function of the error signal in the filter according to FIG. 2 is that which is digitized in the analog-to-digital converter 13 Error signal. In this context, it should be noted that the received signal is one The sample value of the digital signal sampled in a sample and hold element 8 (FIG. 1) is that of the two-wire line is received here.

The one for adjusting the coefficient a with the function of the error signal to be multiplied in the multiplier 26 is derived from the output of the recursive filter and passes through a delay element 28, which is a delay

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S. Hentschke - P. Wildenauer 2-1

caused by j clock periods of the transversal filter 11, where j is the filter degree of the transversal filter 11. This signal also runs through a recursive loop consisting of an adder 29 and a delay element 30 with the delay time of one clock period and a multiplier 31 exists. That in the delay element 30 delayed by one clock period and in the multiplier 31 The output of the adder 29 multiplied by a variable coefficient becomes its input added, and that by one clock period in the delay element 3O delayed adder output is the input of the multiplier 26 which is multiplied by the function of the error signal. The variable coefficient, which is used in the multiplier 31 is the respective existing filter coefficient a of the first Filter section.

The one to readjust the coefficient b of the second Filter section with the function of the error signal in Multiplier 27 to be multiplied signal is the output signal of the first filter section, which is in a Delay element 32 is delayed by j clock periods of the transversal filter 11, where j, as mentioned above, is the degree of filtering of the transversal filter 11.

The delay elements 28 and 32 are used to adjust the setting of the recursive filter 12 from the setting of the Transversal filter 11 to decouple. The setting of the

S. Hentschke - P. Wildenauer 2-1

Transversal filter 11, however, depends on the setting of the recursive filter 12. But this fact is for the setting of the entire digital filter is advantageous.

To decouple the setting of the recursive filter 12 from that of the transversal filter are the tap signals of the recursive filter in the delay elements 28 and delayed so far that they appear outside the window, which is covered by the transversal filter. For this purpose, the delay time must be equal to j clock periods of the transversal filter, with one clock period being the delay between two successive taps ssignalen of the transversal filter is meant.

With regard to the length of the clock period, a distinction must be made between two cases:

In the normal case, the transversal filter 11 is the same Clock operated like the recursive filter 12, namely in the sampling clock of the sample and hold element 8 (Fig. 1), so that a clock period of the transversal filter is equal to a sampling clock period. The delay of the delay elements 28 and 32 is accordingly indicated by Z ~ 3, since Z-1 means a delay of one sampling clock period.

But if the transversal filter 11 differs from conventional ones Differentiates transversal filters through a multiplex arrangement, which will be explained with reference to FIG. 5, then is the delay between two successive ones Tap signals equal to a bit period, i.e. equal to η

S. Hentschke - P. Wildenauer 2-1

Sample clock periods when η is the number of samples per bit. A delay by j clock periods of the transversal filter, which, as mentioned, is necessary, is ^{indicated in the drawings in the drawings by Z ~ n} J, since Z ~ 1 means a delay by one sampling period.

A recursive filter and a transversal filter, in which there is no error correlation as with the ones described so far, but instead an error difference correlation is carried out, FIGS. 3 and 4 show these embodiments are particularly advantageous when the digital signals are binary coded because of the impairment the compensation by a counter signal is particularly strong with binary coded signals and because this disadvantage can be remedied by an error difference correlation.

First, the recursive filter according to FIG. 3 will be described.

As already mentioned, the recursive filter is 12 after 3 shows the filter section containing the multiplier 24 and the filter section containing the recursive loop 21, 22, 23 Upstream filter section. This reversal of the order with respect to FIG. 2 means for processing the binary coded signals a circuit simplification. An explanation of how the Reference signals in the filter sections are unnecessary here, since they are taken from the description of FIG can.

S. Hentschke - P. Wildenauer 2-1

The filter coefficients a and b are also here in adjustment circuits 25, which are explained with reference to FIG are changed in value after a predetermined number of clock periods. To the In turn, multipliers 40 and 41 are provided to provide the correlation products required for this, which multiply a function of the error signal by a signal received from a filter tap signal is derived. In the case of this recursive filter, it is the one to be multiplied by the function of the error signal Signal for both multipliers 40 and 41 from the same tap signal, namely the filter output signal (or the output signal of the filter section with the recursive loop).

This.Abgriffssignal · is in turn in a delay element 42 delayed by j clock periods of the transversal filter, thus the setting of the recursive filter 12, as explained in connection with FIG. 2, differs from that of the transversal filter 11 is decoupled.

The tap signal passes through the delay element 42 a differentiator consisting of an adder 43 and a delay element 44 with the delay time one clock period. The adder subtracts the value in the delay element from each value of the tap signal 44 value preceding by one clock period. This difference formation of subsequent tap signal values is essential for the error difference correlation.

S. Hentschke - P. Wildenauer 2-1

The output signal of the differentiator 43, 44 is the signal that is generated in the multiplier 40 with the function of the error signal is to be multiplied, and of which that in the multiplier 41 with the function of the error signal signal to be multiplied is derived.

The derivation takes place in that the output signal of the differentiator 43, 44 a recursive filter loop 45, 46, 47 runs through, which is the same as that of FIG explained filter loop 29, 30, 31, and its filter coefficient in turn corresponds to the filter coefficient a of the filter section with the recursive loop 21, 22, 23.

Since the signal to be multiplied by the error signal function, as explained, passes through this recursive filter Difference formation has arisen, as a result, the error signal function must also be generated by difference formation resulting function. This difference formation and the generation of the function of the error signal concerned a special analog-to-digital converter 13 ′, which consists of a differentiating element 48 with a comparator 49 connected downstream consists. The comparator 49 determines the sign of the error signal difference formed in the differentiating element 48, so that the error signal function, which is also fed to the transversal filter 11, is equal to the sign of the temporal Derivative of the error signal is.

α * M 4 λ η

• 0 * 1

β β »ο

S. Hentschke - P. Wildenauer 2-1

The transversal filter 11 is also corresponding to this error signal function compared to the prior art Technique changed in a manner which will now be explained with reference to FIG. With the transversal filter According to FIG. 4, the pick-off signals delayed from one another by one clock period in delay elements 50 are, as usual, variable in multipliers 51 Filter coefficients are multiplied and the products in Adders 52 to the output signal of the transversal filter 52 summarized. The variable filter coefficients are provided by adjustment circuits 25, their input signals are the correlation products formed in the associated multipliers 53 are. The adjustment circuits 25 will be explained later with reference to FIG. The multipliers 53 multiply the error signal function, however, not with the tap signals, as in the case of transversal filters according to the prior art, but with the differences between two successive ones Tap signals. These are used in subtraction circuits 54 formed, which of the tap signal assigned to the respective multiplier 53 the temporal Subtract the previous tap signal at the output of the next delay element 50 appears.

The clock frequency with which this transversal filter operated is the frequency with which the values of the function of the error signal occur, i.e. the sampling

(G

S. Hentschke - P. Wildenauer 2-1

clock frequency of the sample and hold element 8 (Fig. 1). This can mean that the arithmetic operations in the transversal filter 12 must be carried out at a considerably high speed.
5

An embodiment of the transversal filter in which this deficiency is remedied is shown in FIG. 5. This transversal filter differs from that according to FIG. mainly in that not all filter sections process the error signal function at the same time and deliver their contribution to the filter output signal at the same time, but do so in groups one after the other happens. This is ensured by two clock-synchronously working time division multiplex circuit arrangements that control the error signal function in each time segment always only supply one group of filter segments or only ever connect a group to the filter output and operate another group accordingly in the next period. The filter sections are divided into η groups, where η is the ratio of the sampling frequency to the bit rate is. Accordingly, the time division multiplexed circuit arrangements have, for the sake of simplicity, as rotary Switches 55 and 56 are shown, η different switching states and are advanced in the sampling cycle. Since the word repetition frequency of the error signal function, as mentioned, is equal to the sampling clock frequency, means this is that each filter section is not operated in the sampling cycle, as usual, but in the bit cycle. To carry out their arithmetic operations are available to the individual filter sections η times the time, i.e. H. one

S. Hentschke - P. Wildenauer 2-1

The clock period of the transversal filter is equal to a bit period and not equal to a sampling clock period. As a result, the delay time of the delay elements 50 is selected so that it is equal to one bit period, and is indicated ^{by Z ~ n.}

From the lowering of the clock frequency in the transversal filter the clock frequency of the recursive filter is not affected. This is always the same as the sampling clock frequency.

It should also be noted that the time division multiplex mode of operation of the transversal filter is independent of whether the above-explained difference formation of the tap signals is made or not. This time division multiplex circuit arrangements 55 and 56 can therefore also be used in transversal filters according to the prior art if an operation-saving operation is desired.

Another embodiment of the adjustment circuits is shown below 25 explained from the figures described so far with reference to FIG.

As already mentioned, the adjustment circuits process

Correction products X _n -j · e _n , where e _{n is} the value of the error signal function and X _n -j is the value of the one to be multiplied with it

I TO ^

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-Vk- S. Hentschke - P. Wildenauer 2-1

Signal is. These correlation products X _n -j · e _{n are} added by an accumulator 60 over G clock intervals, where G is a suitable predetermined number. After this number of clock intervals, the accumulator 60 is set to zero again and its previously calculated result, called the correlation sum, is taken over by a multiplier 61. This multiplies the correlation sum by a factor of 2 ~ ß, where β is a natural number. The multiplication, which is actually a division, can be accomplished as a result of the binary representation of the correlation sum by a simple shift operation of the correlation sum by 3 places. The result obtained is the readjustment value Aq of the filter coefficient, which is finally added in an accumulator 62 to the currently existing value q ^ of the coefficient so that the subsequent value q ^ + 1 is formed according to qi + i = qi + Aq. The accumulator 62 has a further input at which the initial value qo is entered. The coefficients are thus iteratively readjusted in the readjusting circuits at intervals of G clock periods.

Claims (1)

0A3 4 STANDARD ELECTRICS LORENZ
Aktiengesellschaft
STUTTGART S.Hentschke - P.Wildenauer 2-1 Claims . Device for connecting a source and a sink to a two-wire line for the duplex transmission of digital messages in the synchronization process with a hybrid circuit and with an adaptive digital filter which derives a compensation signal from the source signal to suppress the interference signal caused by its own source signal in the sink signal, wherein the coefficients of the adaptive digital filter are iteratively readjusted as a function of an error signal representing the non-suppressed portion of the interference signal, and the readjustment values for the readjustment of the individual filter coefficients are equal to a function in each case of a sum of correlation products formed over a predetermined number of clock intervals, which are obtained by multiplying Signals which are derived from tap signals of the digital filter, are formed with a function of the error signal, characterized in that the adaptive digital filter (10) from the parallel aging of an adaptive digital transversal filter (11) and an adaptive digital recursive filter (12), the sum of their output signals (A, B) being the compensation signal. ZT / P1-Kg Ό4.Ο5.81 ./· S.Hentschke - P.Wildenauer 2-1 2. Device according to claim 1, characterized in that the recursive filter (12) consists of two filter sections, wherein the one filter section contains a recursive loop (21, 22, 23) which delays its output signal by one clock period (22), with a first variable coefficient (a) multiplied (24) and added to its input signal, and wherein the other filter section contains a multiplier (24) which multiplies its input signal by a second coefficient (b) that to form the adjustment value of the first coefficient (a) with the function of the error signal to be multiplied (26, 41) signal from the output signal of the recursive filter (12) is derived that to form the readjustment value of the second filter coefficient (b) with the function of the error signal to be multiplied (27, 40) signal from the output signal of the one filter section (21, 22, 23) is derived, and that in the transversal filter (11) and in the recursive filter (12) the function of the sum of correlation products (X _n _ ^ · e _n ) is this sum multiplied by 2 ^, where β a natural 2Q is number (Figs. 2, 3, 6). 3- Device according to Claim 2, characterized in that in the recursive filter (12) the tap signals used to form the coefficient readjustment values are each delayed in delay stages (28, 32, 42) by j clock periods of the transversal filter (11), j being the degree of filtering of the transversal filter (11) is. 4. Device according to claim 3 or 2, characterized in that in the recursive filter (12) of the filter section with the recursive loop (21, 22, 23) is connected upstream of the filter section with the multiplier (24), and that the function of the error signal in an analog-to-digital converter (13) is digitized error signal (Fig. 2). S.Hentschke - P.Wildenauer 2-1 5. A device according to claim 3 or 2, characterized in that in the recursive filter (12) the tap signals used to form the coefficient readjustment values pass through a subtractor (43, 44) which, from each of the successive digital values, generates the delayed by one clock period (44), previous digital value is subtracted (43) (Fig. 3). 6. Device according to claim 5, characterized in that the function of the error signal is the sign (49) of the time derivative (48) of the error signal. 7. Device according to claim 5 or 6, characterized in that in the recursive filter (12) the filter section with the recursive loop (21, 22, 23) is connected downstream of the filter section with the multiplier (24), that the difference former (43, 44) as the tap signal of the recursive filter (12) processes its output signal and that the difference between two successive digital values is the signal that is to be multiplied (40) to form the adjustment value of the second coefficient (b) with the function of the error signal and of which the to form the readjustment value of the first coefficient with the function of the error signal to be multiplied (41) signal is derived (Fig. 3). 8. Device according to claim 3 or 7, characterized in that the signal derived from the output of the recursive filter (12) passes through a recursive filter loop (29, 30, 32; 45, 46, 47), the output signal of which is used to form the readjustment value of the first Coefficient (a) with the function of the error signal to be multiplied (26, 41) signal, and that the value of the first filter coefficient (a) is used as the filter coefficient of this recursive filter loop (Fig. 2, 3). S.Hentschke - P.Wildenauer 2-1 9. Device according to one of claims 5 to 7, characterized in that in the transversal filter (11) the signals derived from the tap signals are each the differences (54) of two tap signals occurring at adjacent taps (Fig. 4). 10. Device according to one of the preceding claims, characterized in that the same error signal function is used in the transversal filter as in the recursive filter (Fig. 2,3). 11. Device according to one of the preceding claims, characterized in that the transversal filter (11) and the recursive filter (12) are operated in time with a sample and hold element (8) switched on in the sink branch. 12. Device according to one of claims 1 to 10, characterized in that the transversal filter (Fig. 5) is operated in the bit cycle of the source (1) and the sink (2), whereas the recursive filter (12) in the cycle of one in the sink branch activated sample and hold element (8) is operated. 13. The device according to claim 12, characterized in that in the transversal filter (11) the filter sections are divided into η different groups, where η indicates the number of samples per bit that a first time division multiplex circuit arrangement (56 is present, the function of the sampling clock) Error signal connects to another of the η groups, that a second time division multiplex circuit arrangement (55) is present which connects a different one of the η groups to the output of the transversal filter in the sampling cycle and that the two time division multiplex circuit arrangements are operated synchronously (Fig. 5).