DE3069249D1 - Data processing unit and data processing system comprising a plurality of such data processing units - Google Patents

Data processing unit and data processing system comprising a plurality of such data processing units

Info

Publication number
DE3069249D1
DE3069249D1 DE8080300355T DE3069249T DE3069249D1 DE 3069249 D1 DE3069249 D1 DE 3069249D1 DE 8080300355 T DE8080300355 T DE 8080300355T DE 3069249 T DE3069249 T DE 3069249T DE 3069249 D1 DE3069249 D1 DE 3069249D1
Authority
DE
Germany
Prior art keywords
data processing
processing unit
units
processing system
processing units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080300355T
Other languages
English (en)
Inventor
Howard Robert Chivers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
UK Secretary of State for Defence
Original Assignee
UK Secretary of State for Defence
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by UK Secretary of State for Defence filed Critical UK Secretary of State for Defence
Application granted granted Critical
Publication of DE3069249D1 publication Critical patent/DE3069249D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
DE8080300355T 1979-02-13 1980-02-06 Data processing unit and data processing system comprising a plurality of such data processing units Expired DE3069249D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB7905022 1979-02-13

Publications (1)

Publication Number Publication Date
DE3069249D1 true DE3069249D1 (en) 1984-10-31

Family

ID=10503162

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080300355T Expired DE3069249D1 (en) 1979-02-13 1980-02-06 Data processing unit and data processing system comprising a plurality of such data processing units

Country Status (4)

Country Link
US (1) US4376973A (de)
EP (1) EP0016523B1 (de)
CA (1) CA1135868A (de)
DE (1) DE3069249D1 (de)

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JPS57117027A (en) * 1981-01-13 1982-07-21 Nec Corp Signal sending and receiving circuit
US4736319A (en) * 1985-05-15 1988-04-05 International Business Machines Corp. Interrupt mechanism for multiprocessing system having a plurality of interrupt lines in both a global bus and cell buses
JPH067380B2 (ja) * 1985-08-30 1994-01-26 株式会社日立製作所 マルチプロセッサシステム
US5036453A (en) * 1985-12-12 1991-07-30 Texas Instruments Incorporated Master/slave sequencing processor
IT1184015B (it) * 1985-12-13 1987-10-22 Elsag Sistema multiprocessore a piu livelli gerarchici
AU597980B2 (en) * 1986-05-30 1990-06-14 Honeywell Bull Inc. Apparatus and method for interprocessor communication
US5140680A (en) * 1988-04-13 1992-08-18 Rockwell International Corporation Method and apparatus for self-timed digital data transfer and bus arbitration
US4912633A (en) * 1988-10-24 1990-03-27 Ncr Corporation Hierarchical multiple bus computer architecture
CH677047A5 (de) * 1988-12-16 1991-03-28 Asea Brown Boveri
US5408627A (en) * 1990-07-30 1995-04-18 Building Technology Associates Configurable multiport memory interface
IT1268611B1 (it) * 1994-09-30 1997-03-06 Finmeccanica Spa Coprocessore per riconoscimento caratteri
JP3123413B2 (ja) * 1995-11-07 2001-01-09 株式会社日立製作所 コンピュータシステム
AU6495299A (en) * 1998-09-18 2000-04-10 Computron Multiple operating system controller for a computer
JP2001224003A (ja) * 2000-02-10 2001-08-17 Canon Inc 端末装置及びその制御方法
EP1442359A4 (de) * 2001-10-01 2007-12-26 Benjamin Cooper Vielzweck-prozessoreinheit/-computersystem mit bitslice-rückmeldung und festem anweisungssatz (fis)
US7222251B2 (en) * 2003-02-05 2007-05-22 Infineon Technologies Ag Microprocessor idle mode management system
US7437595B2 (en) * 2005-02-07 2008-10-14 International Business Machines Corporation Row fault detection system
US7506196B2 (en) * 2005-02-07 2009-03-17 International Business Machines Corporation System and method for detecting a faulty object in a system
US7826379B2 (en) * 2005-02-07 2010-11-02 International Business Machines Corporation All-to-all sequenced fault detection system
US7506197B2 (en) * 2005-02-07 2009-03-17 International Business Machines Corporation Multi-directional fault detection system
US7529963B2 (en) * 2005-02-07 2009-05-05 International Business Machines Corporation Cell boundary fault detection system
US8495411B2 (en) * 2005-02-07 2013-07-23 International Business Machines Corporation All row, planar fault detection system
US7451342B2 (en) * 2005-02-07 2008-11-11 International Business Machines Corporation Bisectional fault detection system
CN100361118C (zh) * 2005-03-01 2008-01-09 华为技术有限公司 一种多cpu系统及其控制方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3219980A (en) * 1960-06-30 1965-11-23 Ibm Computer multiplexing apparatus
US3348210A (en) * 1964-12-07 1967-10-17 Bell Telephone Labor Inc Digital computer employing plural processors
US3573736A (en) * 1968-01-15 1971-04-06 Ibm Interruption and interlock arrangement
US3528062A (en) * 1968-07-05 1970-09-08 Ibm Program interlock arrangement,including task suspension and new task assignment
US4558411A (en) 1969-05-19 1985-12-10 Burroughs Corp. Polymorphic programmable units employing plural levels of sub-instruction sets
DD101040A1 (de) * 1972-12-28 1973-10-12
US4099241A (en) * 1973-10-30 1978-07-04 Telefonaktiebolaget L M Ericsson Apparatus for facilitating a cooperation between an executive computer and a reserve computer
US4123794A (en) * 1974-02-15 1978-10-31 Tokyo Shibaura Electric Co., Limited Multi-computer system
US3962685A (en) * 1974-06-03 1976-06-08 General Electric Company Data processing system having pyramidal hierarchy control flow
US3961312A (en) * 1974-07-15 1976-06-01 International Business Machines Corporation Cycle interleaving during burst mode operation
US3962682A (en) * 1974-10-30 1976-06-08 Motorola, Inc. Split low order internal address bus for microprocessor
US3941989A (en) * 1974-12-13 1976-03-02 Mos Technology, Inc. Reducing power consumption in calculators
FR2296221A1 (fr) * 1974-12-27 1976-07-23 Ibm France Systeme de traitement du signal
US4064486A (en) * 1975-05-29 1977-12-20 Burroughs Corporation Data communications loop synchronizer
IT1047329B (it) * 1975-09-30 1980-09-10 C Olivetto E C S P A Ing Dispositivo di teleaccensione e di inizzializzazione di un terminale
FR2329019A1 (fr) * 1975-10-24 1977-05-20 Elsag Multi-ordinateur electronique associatif pour traitements multiples contemporains de donnees en temps reel
DE2641741C2 (de) * 1976-09-16 1986-01-16 Siemens AG, 1000 Berlin und 8000 München Rechenanlage aus mehreren miteinander über ein Sammelleitungssystem verbundenen und zusammenwirkenden Einzelrechnern und einem Steuerrechner
US4149242A (en) * 1977-05-06 1979-04-10 Bell Telephone Laboratories, Incorporated Data interface apparatus for multiple sequential processors
AT354783B (de) * 1978-02-07 1980-01-25 Bruno Dr Buchberger Programmierbare schaltung zur datenverarbeitung

Also Published As

Publication number Publication date
EP0016523B1 (de) 1984-09-26
US4376973A (en) 1983-03-15
CA1135868A (en) 1982-11-16
EP0016523A1 (de) 1980-10-01

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee