DE2706790A1 - METHOD OF ENTRYING AN ELECTRICAL SIGNAL INTO A LOAD SHIFT REGISTER AND ARRANGEMENT EQUIPPED WITH A REGISTER CONTROLLED IN THIS WAY - Google Patents

Description

THOMSON - CSF

173, vol. Haussmann

75008 PARIS / France

Our reference: T 2149

A method for inputting an electrical signal into a charge shift register and having a so controlled register equipped arrangement

The invention relates to a method for inputting an electrical signal into a charge shift register, by means of which a linear input can be achieved without the relevant register to complicate, with the quality of linearity in particular the processing of analog signals

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allowed. The invention also relates to a charge shift register into which an electrical Signal according to this method is input, and any arrangement in which a load shift register controlled in this way is used.

The cargo slide assemblies on which the Invention relates are charge-pinned assemblies (English: "charge coupled devices" or "CCD"). These arrangements are known. They are, for example, in an article by M. F. Tompsett "Charge transfer devices ", described in the journal" Journal on Vacuum and Science Technology " from July / August 1972, Volume 9, No. 4, pp. 1166 to 1181, has been published.

All charge transfer devices of the invention are charge coupled devices regardless the number of their phases (in particular there are two or three phases) and regardless of the technology, which allows an asymmetry to be achieved which has a single direction of displacement along the register requires: more than two phases, two phases, each of which addresses pairs of electrodes that point to different thick oxide layers, ion implantations, etc /. ; all of these techniques are for example in that described above article.

It is known in these arrangements the information

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which they are to store, either by optical parallel input on all cells of the arrangement which then serve as an image scanner, or by an electrical input at one end of the Arrangement, which is then referred to as a charge shift register. The electrical information will be serially fed to one end of the register and shifted along this register in which they get saved. This information can be digital or analog information.

There is a major problem which arises from the known methods and which the invention solves in the linear entry of electrical information into the register. It is a problem which is all the greater when it comes to analog information.

A conventional method of entering information into the input of a charge shift register is to provide this input with a diode that is used to input the minority carriers into the. Register is used, whereby the amount of inputted minority carriers is influenced by an input control electrode which is arranged between the diode and the first cell of the register. The control electrode, to which an electrical signal is applied, the amplitude of which is proportional to the information to be entered is modulated in time with the change of this

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Information the stream of minority carriers entered in the register. This method is; though easy to do, but it has one major drawback. The conversion of the applied to the control electrode Input signal into a stream of minority carriers characterizing the information namely, it is not linear, it is square, as set out in more detail in the following description will be. It is therefore not possible to achieve the maximum dynamics of the Register without causing a non-negligible distortion at the same time. One such distortion is of course incompatible with the use of the registers for storage of analog information.

Various methods have been proposed to overcome this drawback and to provide a Allow linear entry of information into the register. But they complicate the production and the operation of the charge transfer assemblies is considerable, since they require the assemblies Elements are added, such as an additional input control electrode or auxiliary MOS transistors, to correct the linearity error ^

The method according to the invention for inputting an electrical signal into a charge shift register, whose input is a diode and a control electrode

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for the current supplied by this diode, consists mainly in connecting to the control electrode To apply control signal with constant amplitude, which the output of a constant current through controls the diode, the control signal being a pulse signal that is transmitted to the electrodes of the Register shift control signals are in synchronism, and the duration of each Pulse to the amplitude of the electrical to be entered Signal is proportional.

The amount of charge which has been brought into the register at each pulse, d. H. input at each point in time of the sampling of the signal to be input is proportional to the amplitude of this signal as long as one is in the range of good operating conditions the arrangement remains. This linearity of the incoming charges allows distortions of the analog signals within the maximum dynamic range of the arrangement. she will achieved without complicating the register, its input in relation to those who fault the Have non-linearity, is structurally unchanged. Namely, the method according to the invention exists not about correcting a mistake by adding proofing tools, but about prevent it from occurring by always working under conditions under which it will not occur can.

70 9 8 33/0 7 A 2

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Wrvi tore Mo rkina I ο, 'Mrtoile und Frrrln i s'X' of the invention cvt ebon Ki ch from the following, not n Is restrict "711 ν; r. ^C ; t: <hondo.n! '^ ΠγΊιί ·: i! mn; · ', from Λιιγ; rührnM ^r ' * hi; i. ^c ;> i ο J ..τ; '! Ίη- · "Fr Γ irdnri ^ unt: rr P.or'.nr-11; ! (πιο <Ίΐκ the l) f ^; · C fir-1 nn 7eichr.un ~ "'' r :. F?; Ζ e: Ί. P. Ρ η:

Fi; ¹ ;. 1 eino pci 'η ma ti see fchrri t: I .., ns icht:

oinef; Tc i. Ls one? l; i ':) nr><\ r, VP "F, chic> .- berefi rl'.ors, at which electrical equipment entry this procedure is applied according to the invention,

Fig. 2 is an equivalent circuit diagram of the electric

input of the register of Fig. 1,

Fig. 3 curves, soften the course of the Ein

output current in dependence on applied Specify signals,

Fig. 4 curves showing the various

Show control signals (displacement control signals and input signal), which are connected to a register according to the invention,

5 shows a functional diagram of a scarf

that the stress-time conversion allows, which is required for the register according to the invention

709833/0742 ORIGINAL INSPECTED

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borrowed is:, and

Ftf ;. 6 Kiη · νου, which the course dor

Signals in el cn different Points of the circuit of fi; / ;. raise.

Fig. 1 shows schematically a sectional view of a Ladunfsver.sc.ilieberegisters in an embodiment with two phases 0 and 0 ». The Betriebsv. ^T else of such a register is known, both in terms of its shift function as well as to its Speieherfunktion, and will therefore not be described here. It should be noted, however, that although the invention is described using a two-phase register in which the asymmetry of the shift is achieved by different oxide thicknesses, the invention is equally applicable to the other types of shift registers operating with charge coupling, for example Example with other types of 2-phase registers or 3-phase registers.

The semiconductor substrate 1, which is, for example, N-conductive, is covered by an oxide layer 2, on which storage and shift control electrodes 3, 4 and 5 are arranged. The control takes place through the two complementary phases 0. and 0 ", which address the electrode pairs, such as

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For example the pair of electrodes 4, 5, of which the electrode 4 rests on a thin oxide layer, while the electrode 5 rests on a thick oxide layer. The shift takes place unilaterally in the Direction of arrow F.

Since the substrate 1 is an N-conductive substrate here, are the stored and shifted charges Q positive charges, i.e. the carrier of the linearity of this Type of substrate.

The arrangement for entering these charges into the register contains a in a manner known per se Input diode D, which consists of a P -conductive zone 6, which diffuses into the N -conductive substrate and sends positive charges to the first electrode 3. A control electrode or input steerelek trode G receives a control voltage through which the strength of the current passed under the electrode 3 Charges O is set. The so entered Charges O are stored in the inversion layers, which correspond to the potentials (here compared to ground are negative), which are indicated by phases 0, and 0- the electrodes are applied at the semiconductor-oxide interfaces that lie under these electrodes. These inversion layers are conventional Wise generated by causing an impoverishment of majority carriers in space charge zones whose limit is indicated by the dashed line 8

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is shown. The charges Q conducted under the first electrode 3 when that is on the phase 0. applied potential creates a potential well there in relation to the neighboring zones, are then along the cells of the register with the clock frequency of the potentials of the phases 0- and 0_ shifted.

As mentioned earlier, is. the input structure described here, consisting of the diode D and the input control electrode G exists, at the same time that of the state of the art and that for carrying out the process structure used according to the invention.

Fig.2 shows how this input structure as the equivalent of a MOS transistor, the source electrode of which is the diode D, the gate electrode of which the input control electrode G and its drain electrode the semiconductor - oxide interface I below of the first electrode 3 of the register.

The potential of the source electrode is thus the ground to which the diode D- is connected; the potential of the gate electrode is V ", i.e. that to the control electrode G ant> e e

laid potential; the potential of the drain electrode is the potential Ψ of the interface I below the

Electrode 3 of the register. This interface potential Ψ, which characterizes the depth of the potential wells, depends on the potential f., Which over the phase

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applied to the electrode 3, and on the amount of charge Q accumulated in the inversion layer which corresponds to the electrode 3. It can thus be written Ψ (^ i »Q).

In a conventional manner and as shown by the curves of Fig. 3, in a MOS transistor, the current I _c between the source electrode and the drain

YOU

electrode for a constant gate voltage V with the value of the potential difference between the drain electrode and the source electrode, here V _n - V- I

'I Drain Source |

= | ψ L since V ₀ = 0 and V_. = ψ applies until I sr Source Dram s ⁶

Saturation of the transistor too. When the transistor is in saturation, the source-drain current I remains constant, regardless of the value of Ψ ₅ · this

Saturation is reached as soon as IV ₁ ^ - V_ I = ⁰⁵ 'Drain Source

fill
ψ J is equal to V - V ", | and is retained as long as Ιψ 1 ^ 1 V - VI remains, where V is the threshold voltage under the input control electrode G, ie the value from which the semiconductor-oxide interface below this Control electrode is in inversion.

Under this saturation condition, the current I _{cn is given} by the following equation:

¹ SD - ^{n (V} Ge - V ² and does not depend on ψ. It changes quadratically

* S

with V, which proves that in the known systems

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the amount of charges Q entered into the register is not proportional to the electrical signal which V modulates. This amount of charge is in fact proportional to the current I_ _n and thus proportional to the square of V.

The method according to the invention consists in placing the charges Q under the first electrode 3 of the register to conduct by applying a constant voltage V to the input control electrode G, which is carried out by

Go
but is modulated over time.

the input signal ν no longer has an amplitude,

If one always stays in the saturation range, i.e. on the horizontal part of the curves of Fig. 3, then the following applies namely for the amount of

2 given charges: Q = I _c _ · t = ß (V ₀ - V_J .t.

OU CjO 1

This amount of charge is proportional to the time t during which the voltage V_ is applied to the control electrode

O ο

G is applied. Since this time t according to the method according to the invention is proportional to the amplitude of the input signal is, the input charge is in turn proportional to this signal and it takes place no distortion, which is particularly beneficial when dealing with analog signals.

The method according to the invention thus consists in a voltage-time conversion of the input signal ν make which to synchronous samples of phase 0 .., to which the first electrode 3 of the register

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heard, leads, with constant amplitude V-, and with variable duration t, the duration t being proportional to the amplitude of the sampled signal ν is.

The voltage V is, for example, the voltage «o

V_ ~ by Fip. 3 be. During each Ab-Ge3 ^{b J}

sample, there is a shift from A to B on the horizontal part of this curve.

Fig. 4 shows the course of the curves of the various potentials as a function of time.

The first two curves show the potential changes * f. and f_ of the two complementary phases 0- and 0_ on. These two phases are synchronous and complementary; the potential of one is zero / while that of the other is negative, and vice versa. The negative potential corresponds to the lowest potential wells into which the shifts take place.

The curve (c) shows the profile of the voltage V applied to the input control electrode G. It is either zero and then no charge passes through the MOS transistor it controls, or negative and equal to the constant value V «, which controls _{the passage of the current I« D.} The samples are with the voltage H *, synchronous, curve (a), so that the

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-13

Charges which the input steady electrode lets through are "accepted" by the potential wells which the phase 0 generates under the electrode 3. _{Their duration t 1} , t_ and t, is here proportional to the amplitude V 1, v_ and v_ of the input signal ν, which is represented symbolically as curve (d).

The conversion of the voltage ν into the time t takes place in conventional circuits, which are shown in FIG the block 7 are shown symbolically and of which an example is given below.

It is clear that, thanks to this procedure, and as long as one does not go beyond point B, the quantity Q increases Charges which are conducted under the electrode 3 at each period of phase 0 .., and thus at each Period of the clock that synchronizes both the phases and the circuits 7, proportional to ν will be, since Q = I .t and since I

Ol) O ο L) O

is constant.

In order to remain in this linearity range, in which the current I is constant, it is sufficient to

o L)

plitude V to choose as a function of the amplitude of the input signal ν such that for his maximum instantaneous amplitude applies:

V - V Go T

It should also be noted that entering the

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- VC-

Charging takes place all the faster, the stronger the current I _n and thus ^v the higher the voltage

V _{n is} chosen. Your amplitude is thus in Go

Dependence on the period T of the clock chosen such that the maximum charge to be entered is maximum during the clock half cycle T / 2 can be.

In order for the method according to the invention to be carried out properly, it is necessary that the MOS input transistor that works in saturation, a real current generator with infinitely large Internal resistance is. As is well known, it is sufficient for this purpose if the drain electrode (here the interface I) is sufficiently far away from the source electrode (diode D) in order to have a retroactive effect avoiding one to the other, which would reduce the output impedance. To this Purpose it is advantageous to have a sufficiently large length of the input control electrode G.

This retroactive effect is also eliminated, when a heavily doped substrate (e.g. 10 / cm) is used. In general, the Charge shifting arrangements made on substrates with weak doping (5.10 / cm). Under Under these conditions, it may be advisable to discretely overdop under the input control electrode

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to implant. -

The linearity of the input stage of a register to which the method according to the invention is applied is only limited by the circuits that perform the voltage-time conversion. Since their linearity can be very good, the advantage achieved by the invention is very clear.

Fig. 5 shows an example of a circuit by means of which an analog input signal ν in samples can be converted that are synchronous with the phase clock 50 and their duration to the Amplitude of the signal ν is proportional. It is solely an exemplary embodiment the circuit arrangement 7 for the voltage-time conversion of FIG. 1. Other conventional circuits can be used in the context of the invention.

FIG. 6 shows the form of the signals at the various points in the circuit of FIG. 5.

The clock 50 supplies the signal a with the period T. This signal is integrated in a capacitor 51 during the sampling period, ie during T / 2 (see FIG. 4), which is charged with a constant current thanks to a current generator 52. During the next half-cycle T / 2 (ie during the shifting time of phase 0 ^) this capacitance is discharged thanks to a zero reset circuit 53. At point b, the sawtooth signal b of FIG. 6 results. This signal b becomes

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added in an adding circuit 54 with the analog input signal ν, in order to obtain the signal d. The signal d is then fed into a 2-value amplitude limiting circuit 55 entered, which supplies the signal e. The signal e consists of a sequence of trapezoidal pulses whose base width is proportional to the amplitude of the analog input signal ν is. A shaping circuit 56 supplies a signal f, the square pulses of which have the same width as the Have the basis of the pulses of the signal e. Between this width and the amplitude of the input signal

ν there is proportionality.
e

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Claims (6)

E. Prince - Dr. G. Hauser - G. Leiser THOMSON - CSP February 17, 1977 173, vol. Haussmann 75008 PARIS / France Our reference: T 2149 PATENT CLAIMS: Method for inputting an electrical signal ν into a charge shift register with η charge-coupled Cells and with an input arrangement which has a diode and a control electrode for the Contains current supplied by this diode, characterized in that the control electrode (G) a Control signal (V ,,) with constant amplitude (V) de CjO which controls the delivery of a constant current (I _cn ) through the diode (0) and is a pulse signal which is synchronous with the displacement control signals of the Pvegister, the duration of each of its square-wave pulses being proportional to the amplitude of the electrical signal , which is to be entered at the time of the sampling carried out in this way. 2. The method according to claim 1, characterized in that the conversion of the input signal ν into one Pulse, the duration of which is proportional to its amplitude at the time of this conversion, synchronously with the displacement control signal, which is applied to the first electrode (3) of the register, which is behind 709833/0742 ORIGINAL INSPECTED of the input control electrode (G), and while that part of the displacement control signal is applied is made on this electrode, which is actually a state of displacement is equivalent to. 3. The method according to claim 2, characterized in that the constant anrolitude (V) of the pulses IjO of the control signal (V_) sent to the input control electrode (G) is applied, depending on the maximum amplitude of the input signal (v) is chosen so that the current (Ln) supplied by the input diode during the duration of each pulse remains constant regardless of the amount of charge (Q) entered into the register. 4. The method according to claim 3, characterized in that the constant amplitude (V) of the pulses of the control signal (V) also as a function of the period (T) of the displacement control signals of the register is chosen such that the constant Current (Ι _ΡΓ .) T resulting from it, sufficiently strong buo is so that the duration of the pulses of the control signal (V _Ge ) is less than the half-cycle (T / 2) of the shift signals of the register, regardless of the duration of the pulses. 5. Charge shift register with η charge-coupled cells and with an input arrangement which has a 709833/0742 Diode and a control electrode for the current supplied by this diode, characterized in that that an electrical input signal ν in the register according to the method according to one of the claims 1 to 4 is entered. 6. Arrangement with a charge shift register according to claim 5, characterized in that the
input signal ν to be entered into the register is applied to a voltage-time conversion circuit which supplies the control signal (V) of the input control electrode, the circuit being controlled by the clock generator which controls the output of the displacement control signals. 709833/0742