DE2610177C2 - Fühlerverstärker mit wenigstens zwei Betriebszuständen - Google Patents
Fühlerverstärker mit wenigstens zwei BetriebszuständenInfo
- Publication number
- DE2610177C2 DE2610177C2 DE2610177A DE2610177A DE2610177C2 DE 2610177 C2 DE2610177 C2 DE 2610177C2 DE 2610177 A DE2610177 A DE 2610177A DE 2610177 A DE2610177 A DE 2610177A DE 2610177 C2 DE2610177 C2 DE 2610177C2
- Authority
- DE
- Germany
- Prior art keywords
- input
- transistor
- current
- circuit
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000000903 blocking effect Effects 0.000 claims description 13
- 238000005516 engineering process Methods 0.000 claims description 9
- 238000007599 discharging Methods 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 230000036039 immunity Effects 0.000 description 2
- 240000004808 Saccharomyces cerevisiae Species 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0021—Modifications of threshold
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017581—Coupling arrangements; Interface arrangements programmable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
- H03K19/0823—Multistate logic
- H03K19/0826—Multistate logic one of the states being the high impedance or floating state
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/557,597 US3980898A (en) | 1975-03-12 | 1975-03-12 | Sense amplifier with tri-state bus line capabilities |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE2610177A1 DE2610177A1 (de) | 1976-09-30 |
| DE2610177C2 true DE2610177C2 (de) | 1984-12-13 |
Family
ID=24226103
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2610177A Expired DE2610177C2 (de) | 1975-03-12 | 1976-03-11 | Fühlerverstärker mit wenigstens zwei Betriebszuständen |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US3980898A (cg-RX-API-DMAC7.html) |
| JP (1) | JPS51111044A (cg-RX-API-DMAC7.html) |
| CA (1) | CA1044334A (cg-RX-API-DMAC7.html) |
| DE (1) | DE2610177C2 (cg-RX-API-DMAC7.html) |
| FR (1) | FR2304226A1 (cg-RX-API-DMAC7.html) |
| GB (1) | GB1532856A (cg-RX-API-DMAC7.html) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4158891A (en) * | 1975-08-18 | 1979-06-19 | Honeywell Information Systems Inc. | Transparent tri state latch |
| US4096398A (en) * | 1977-02-23 | 1978-06-20 | National Semiconductor Corporation | MOS output buffer circuit with feedback |
| US4131808A (en) * | 1977-08-04 | 1978-12-26 | Fairchild Camera And Instrument Corporation | TTL to MOS driver circuit |
| US4350906A (en) * | 1978-06-23 | 1982-09-21 | Rca Corporation | Circuit with dual-purpose terminal |
| JPS582437B2 (ja) * | 1978-11-25 | 1983-01-17 | 富士通株式会社 | スリ−ステイト出力回路 |
| DE3062480D1 (en) * | 1979-01-11 | 1983-05-05 | Western Electric Co | Tri-state logic buffer circuit |
| US4417162A (en) * | 1979-01-11 | 1983-11-22 | Bell Telephone Laboratories, Incorporated | Tri-state logic buffer circuit |
| US4280221A (en) * | 1979-05-31 | 1981-07-21 | The Boeing Company | Digital data communication system |
| US4339676A (en) * | 1979-08-13 | 1982-07-13 | Texas Instruments Incorporated | Logic circuit having a selectable output mode |
| US4339675A (en) * | 1979-08-13 | 1982-07-13 | Texas Instruments Incorporated | Logic circuit having an improved disable circuit |
| US4745308A (en) * | 1983-02-18 | 1988-05-17 | Motorola, Inc. | Non-inverting three state TTL logic with improved switching from a high impedance state to an active high state |
| US4585959A (en) * | 1983-12-29 | 1986-04-29 | Motorola, Inc. | Tri-state logic gate having reduced Miller capacitance |
| JPS60177723A (ja) * | 1984-02-24 | 1985-09-11 | Hitachi Ltd | 出力回路 |
| US4791312A (en) * | 1987-06-08 | 1988-12-13 | Grumman Aerospace Corporation | Programmable level shifting interface device |
| DE69223776T2 (de) * | 1992-06-26 | 1998-07-16 | Discovision Associates, Irvine, Calif. | Logikausgangstreiber |
| US6282138B1 (en) | 1999-02-25 | 2001-08-28 | Micron Technology, Inc. | Latched sense amplifier with tri-state outputs |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3602733A (en) * | 1969-04-16 | 1971-08-31 | Signetics Corp | Three output level logic circuit |
| US3736572A (en) * | 1970-08-19 | 1973-05-29 | Cogar Corp | Bipolar driver for dynamic mos memory array chip |
| US3743855A (en) * | 1971-06-10 | 1973-07-03 | Allen Bradley Co | Fault detecting and fault propagating logic gate |
| US3792292A (en) * | 1972-06-16 | 1974-02-12 | Nat Semiconductor Corp | Three-state logic circuit |
-
1975
- 1975-03-12 US US05/557,597 patent/US3980898A/en not_active Expired - Lifetime
- 1975-11-27 JP JP50141805A patent/JPS51111044A/ja active Pending
-
1976
- 1976-02-26 CA CA246,620A patent/CA1044334A/en not_active Expired
- 1976-03-11 DE DE2610177A patent/DE2610177C2/de not_active Expired
- 1976-03-11 GB GB9784/76A patent/GB1532856A/en not_active Expired
- 1976-03-11 FR FR7606919A patent/FR2304226A1/fr active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| FR2304226A1 (fr) | 1976-10-08 |
| DE2610177A1 (de) | 1976-09-30 |
| FR2304226B3 (cg-RX-API-DMAC7.html) | 1978-12-29 |
| GB1532856A (en) | 1978-11-22 |
| JPS51111044A (en) | 1976-10-01 |
| US3980898A (en) | 1976-09-14 |
| CA1044334A (en) | 1978-12-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8110 | Request for examination paragraph 44 | ||
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8328 | Change in the person/name/address of the agent |
Free format text: RICHTER, J., DIPL.-ING., 1000 BERLIN GERBAULET, H., DIPL.-ING., PAT.-ANWAELTE, 2000 HAMBURG |