DE2517978A1 - LIGHT EMITTING DIODE ARRANGEMENT - Google Patents

Description

Böblingen, April 17, 1975 bu / bs

Applicant: International Business Machines

Corporation, Armonk, N.Y. 10504

Official file number: New registration file number of the applicant PI 973 084

! light emitting diode array

The invention relates to a light-emitting diode (LED) component, consisting of an N-conducting GaAs ₁ P semiconductor with values of χ between 10 and 42%, preferably above 35 %, and at least one built-in without destroying or damaging the corresponding surface area of the semiconductor PN junction, with all electrodes ensuring a good galvanic connection to the semiconductor zones, in particular by using an Ag _{Q 99} Te _{0 Q} ^ alloy for contacting the N semiconductor _{zones and an Ag Q 98} 3n _{0 QO} alloy for contacting the P- Semiconductor zones, on one side, namely the P-55on side, of the semiconductor component forming the LED component.

lU:, ^ SQlo: -e arrangement is under äem Tital ^il L · Monolithic I-irrfc « _; . : ^. ... '"", "r» ^ _{0 <} 4 _e display ¹ » i _n " TESE Transactions on ELectrcn n & -v ^A. "- vä": ■:,; $ Ψ>20.;; £, 11, November 1973 on pages 1068 to 1073 L- ^ i 3λζ ^? Ϊ & ϊχ, whereupon - ηζ'ύ - ^r is expressly accepted for the description of the invention, The half ",: .-, i 'used for LSD structures learned. They usually consist of III-V compounds, where for - ■ .i .- 't. " afc ment in the visible range gallium arsenide phosphide _x GaÄs?)

./iisnerweis^ is used and for radiation in the infrared ; "c, ic :: usually use a gallium arsenia (GaAs) compound

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will be. Galliura arsenide phosphide has a large band gap, so that a radiative recombination can take place in the visible part of the spectrum. It also has gallium arsenide phosphide the great advantage that the wavelength of the emitted light by adjusting the phosphorus content of the ternary alloy can be matched.

The literature cited above is accordingly based on the use of a gallium arsenide phosphide LED component the end. The starting material for the production of LED components is usually relatively lightly doped N-conductive GaAsP in epitaxial layer form that for introducing the PN junctions accordingly the intended luminescence areas or »-points is subjected to the usual process steps. In an advantageous manner a diffusion process can take place in a closed chamber with the help of the GaAs introduced there and with Zn ge ** - mixed powder as shown in the above referenced reference will, perform *

in order to achieve a good yield when operating the LED components, An important prerequisite must be met, namely that of good ohmic contact between the electrodes. Appropriate measures this can also be found in the literature cited above. Just like as a ternary connection, other III- and / or! / - elements of the invention can be used as a basis other electric alloys can also be used, such as 3. B. Gold- = liar ™ oeer Gold-Germani ^ m-Kiekel for contacting the N-zones

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contacts can be soldered.

It is generally disadvantageous when using GaAsP as an LED component the low sheet resistance in the N-zone, since, for reasons of a satisfactory light yield, there is no doping here

17th
may be greater than 10. On the other hand, the zone should not be too thick either, since otherwise the light absorption would be detrimental to the radiation. In addition, the arrangement according to the above-mentioned reference is made such that the light is emitted via the substrate, so that the semiconductor wafer is soldered; that is, the substrate must necessarily be transparent. This is a considerable disadvantage insofar as if the compatibility of LED components with monolithically integrated semiconductor circuits is required, this must be taken into account, so that two different types of substrate, namely glass and ceramics, have to be used.

Another disadvantage is that it is difficult to provide a GaAsP epitaxial layer at a reasonable cost.

The object of the invention is therefore to avoid it the disadvantages listed above, a light emitting diode component, to provide the several luminescent areas contains, which can be produced in a simple manner and in operation a provides good luminous efficiency.

The inventive solution to the above problem can be found in claim 1. Thanks to the invention it is achieved that the light emission takes place in an advantageous manner via the N-zone, so that the semiconductor wafer on a ceramic substrate can be attached. In addition, the production of the LED semiconductor component according to the invention can be carried out in an advantageous manner Ensure further development of the invention by the GaAsP semiconductor from an over an intermediate epitaxial layer with up to applied epitaxial layer on a P component decreasing to zero

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nem GaAs substrate, which is at least each in areas below the P-zones introduced into the GaAsP epitaxial layer is etched away. In this way the difficulty is avoided that because / gallium arsenide and gallium arsenide phosphide are different Have lattice constants, associated mechanical stresses can lead to damage to the component.

Advantageous refinements of the invention can be found in the subclaims remove,

The invention is explained in more detail below in an exemplary embodiment with reference to the drawings listed below,
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Show it;

Fig. 1 is a partial cross section of an inventive Semiconductor structure,

FIGS. 2A to 2E detail cross-sections through semiconductor structures to explain the production of the component according to the invention,

3A shows a plan view of an LED arrangement with the j associated wiring pattern,

! Fig. 3B is a perspective view with a cross-sectional view of the LED structure shown in FIG. 3A;

Fig. 4 is a perspective view for assembling the

LED structure in Fig. 3A on a carrier substrate,

FIG. 5A shows a schematic cross-sectional detail of the arrangement according to FIG. 4,

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Pig. 5B shows a partial cross section of the FIG.

The structure shown in FIG. 5A to explain the method of manufacture according to the invention,

5C shows a partial cross section of the arrangement

according to Fig. 5A to explain the manufacturing

j according to a modified embodiment

game of invention.

The semiconductor component shown in FIG. 1 in a partial cross-sectional layer can be produced by placing an N-conducting raonocrystalline layer 1 of a ternary III-V connection over a zone 2 which decreases in a proportion on an N-conducting substrate 3 of a III-V connection is deposited with the aid of an epitaxy process. The production of such structures is known per se. Preferably for the purposes of the present invention the epitaxial layer 1 consists of GaAs _{1 V} P _V wherein

I - JX Λ

x is in the range between 0.10 to 0.42 and preferably in the range from 0.35 to 0.42. With a proportion X of approximately 0.40, the ternary gallium arsenide phosphide epitaxial layer 1 has an emission line at approximately 6500 R with for electroluminescent diode !! (LED) suitable transitions. The epitaxial layer 1 can be deposited on gallium arsenide substrates, which have a lattice constant of A of 5.64 8, with the aid of conventional methods from the vapor phase. The resulting semiconductor structure is formed by adding an increasing proportion of phosphorus, starting from substrate 3 in the decreasing zone 2, until the desired composition is reached in the epitaxial layer 1, the final composition then being maintained until the desired layer thickness in the Zone 1 is reached. When producing the exemplary embodiments according to the invention, the semiconductor structure has a decreasing zone 2 in the range from 30 to 50 μm and an epitaxial layer 1 with a constant composition in the range from 30 to 100 μm. Typically, the epitaxial

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layer doped with a suitable N-conductive impurity component:

16 17 '

be, such as B. Tellurium in the range from 8 χ 10 to 5 χ 10 Atoms / cm.

In the representations according to FIGS. 2A to 2E, the various production stages in the production of an LED semiconductor structure are j door shown. With these manufacturing processes it goes without saying that |

: I.

that, although only a single diffusion is mentioned, immediately-! a larger number of correspondingly diffused Zo-, NEN is formed so that a plurality of LED components are formed in one production process. Accordingly, when manufacturing ίof embodiments according to the invention that shown in FIG The structure is first cleaned in a cleaning solution consisting of phosphoric acid and then subsequently an aluminum oxide diffusion mask 5 to be applied by sputtering onto the epitaxial layer as shown in FIG. 2A. Then will Oxide layer converted into a corresponding mask by photolithographic processes, through which PN junctions in the underlying semiconductor regions can be diffused, although aluminum oxide layer masks especially at this point are mentioned, it goes without saying that other mask materials can be used just as well as, for. B, silicon monoxide, Silicon dioxide and silicon nitride or a combination of such oxides, as a result of these indicated process steps itself a semiconductor die that is an array of a contains larger, number of LED structures.

In the next process step, a photoresist coating is applied to the oxide layer 5, which is exposed and treated accordingly in order to obtain defined diffusion windows in a 5 × 7 matrix arrangement which is suitable for an alphanumeric display (FIG. 3A). To create the diffusion window, the aluminum oxide (Al ₃ O ₃ ) is etched with dilute phosphoric acid in the surface areas provided for this purpose. After this etching process, the remaining photoresist layer residue is peeled off and

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the semiconductor wafer carefully cleaned in appropriate solutions and ^{dried at about 500 °} C. before the diffusion process is used.

To the named PN-transition with the help of the diffusion process To obtain a procedure using a completed one Used container. In preparation for such a diffusion process, the container, the semiconductor holder, the The stopper and the other objects involved are heated at about 850 C for several hours, in order to be safe under all circumstances remove remaining water residues. Powdered GaAs (Zn) in which approximately the zinc content is used then serves as the diffusion source 20 3

2.45 χ 10 atoms / cm. This substance is also ^{dried at about 180 °} C. for one hour before the diffusion process. 600 mg of this substance are placed in a small crucible at the end of the quartz semiconductor wafer holder. The semiconductor wafer provided for diffusion and the diffusion source are then sealed in the container, the pressure being reduced to 2 × 10 Torr, and the container volume after sealing being approximately 15 cm. This container is then heated in an oven to about 650 ^° C. for one hour so that the zinc can diffuse into the gallium arsenide phosphide in order to form the PN junctions of the resulting P zone 7; one of them is shown in Fig. 2A. The depth distance of the transition when using such a diffusion path is in each case in the order of magnitude of x. = 1.8 to 1.9 µm. Although not specifically shown here, if necessary, a quarter-wavelength-thick anti-reflective coating layer 6, such as e.g. B. silicon nitride or silicon monoxide or the like. Be deposited on the semiconductor wafer in order to protect both the junctions and to increase the total amount of light emitted by a junction, so that an increased efficiency is achieved. Such a quarter-wavelength optical coating can also be used for passivation purposes. However, is the oxide applied

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no passivation coating, then the refractive index of this quarter-wavelength layer should be approximately η = 1.9; wherein satisfy both silicon oxide and silicon nitride, this condition \ although alumina and silica can be equally applied, but indistinguishable so effectively. In any case, however, a passivating coating 6 is deposited on the semiconductor wafer, specifically above the diffusion mask coating 5. The resulting structure is shown in FIG. 2A, from which the diffused zone 7 in the gallium arsenide phosphide epitaxial layer 1 is clearly shown can be found.

In contrast to conventional LED structures where the N connections are formed on the rear side of the semiconductor wafer, the N connections according to the present invention are located on the front side of the semiconductor wafer. For this purpose, an N connection mask is applied to the semiconductor wafer, wherein in A photoresist layer holes such as 7A are provided, through which corresponding holes are etched into the dielectric layers 5 and 6. After the etching process, a silver tellurium (AgTe) layer 8A together with connections 8 is vapor-deposited at a pressure of 2 × 10 Torr, the substrate being kept at a temperature of about 200 ^° C., in order to subsequently remove the photoresist and metal coating thereon The contacts 8 are then sintered at 575 ^° C. for about 20 minutes in a forming gas. In FIG. 2B, the position of the N connection in relation to the PN junction at zone 7 is shown.

The semiconductor wafer is then again marked with a positive Photoresist layer 50 coated and exposed in such a way that parallel connection windows 11 and 12 to the P-zone 7 result, namely by successive etching through the dielectric layers 5 and 6. After completion of the etching process for the Connection openings 11 and 12 become the AgZn connections 13 and 14 together with the metal layer 51 on the semiconductor wafer at a pressure of 2 10 Torr and at a substrate temperature

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from about 200 ⁰ C applied. Followed by removal of the photoresist layer remains and the excess parts of the layer takes place of AgZn and then sintering the P-terminals 13 and 14 at about 575 ⁰ C during 30 minutes in a Formi "forming structure shown in Fig. 2D.

575 ^° C. for 30 minutes in a forming gas. The

The structure thus obtained and shown in FIG. 2D can be coated with a 7000 Å thick layer of aluminum in an evaporation process, the semiconductor being held at a pressure of 2 10 Torr to a substrate temperature ^{of 200 ° C.} This metal coating is coated with a positive photoresist which is then exposed and developed to obtain the desired wiring pattern. Subsequently, the aluminum is undercut using a dilute solution of phosphoric acid and acetic acid, followed by a cleaning cycle with the aid of water, in order to subsequently ^{sinter the aluminum for 20 minutes at 450 °} C. in a forming gas. The resulting exemplary embodiment of the invention is shown in simplified form in plan view in FIG. 3A in order to clearly emphasize the line run pattern with the peripheral connection points 15.

LED structures made in this way are effective and easy to accomplish attachment of semiconductor wafers to transparent or non-transparent substrates depending suitable for the intended purpose. The use of transparent substrates is particularly expedient because it is herewith at the same time a protective front cover is provided. The "flip-chip" technique, as used to advantage, uses solder ball connections as in the United States patent 3,495,133. The solder ball termination technique is done on a trace pattern of the substrate, as is it is described in this United States patent. However, to use the connection method described there for the purposes of the present Adapting the invention, new contact metallurgical techniques have been developed. However, it is emphasized that the LED

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Structure according to the present invention is out of the ordinary in that it is unilaterally oriented; That is, all PN junctions, connections, line pattern and connection contacts are located on one and the same side of the semiconductor die, so that the N connection is to be attached to the lowest doped GaAsP epitaxial layer 1. In order to apply good ohmic connection contacts to the structure according to the invention, gold connections cannot be used, since this metal is not compatible with aluminum. Accordingly, the contact alloys used consist of silver tellurium (1%), i. h, AgTe _Q _ .., for the N connection and silver-zinc (2%), d, h, AgZn_ _ _o , for the P connection.

In contrast to assembled components, which are correspondingly more conventional Technique are made and usually consist of discrete components, the production of course a considerable Requires effort, the structure according to the invention can be produced with the aid of "flip-chip" techniques, which can Can easily be adapted to monolithic integrated semiconductor circuits, since all LED structures are in the same semiconductor wafer are formed. Such light displays can be used for display purposes, numerical data displays, data display devices, etc. in that alphanumeric characters or other symbols can be represented by suitable arrangement of PN junctions in a grid.

Using the method according to the invention, an alphanumeric display semiconductor wafer with a 5 × 7 matrix can be produced of PN junctions as shown in Fig. 3A, where the display of the letter E is represented by corresponding hatching of the terminal metallurgy is indicated by the associated LED structures being biased accordingly. The perspective Cross-sectional view in FIG. 3E shows a cross-section along the line 3B-3B of FIG. 3A. In Fig. 4 is the LED die on a transparent substrate e.g. B. Glass attached using the flip attachment technique of the aforementioned U.S. patent 3 495 133 applies.

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In certain applications it may be necessary to use the semiconductor plate to be attached to a substrate either directly or in a grid form. Will z. B. large grids of LED structures provided, then it may be desirable to use a multilayer ceramic as the substrate to the grid arrangement appropriately equip with electrical connections if X-Y matrix addressing is not applicable; on the other hand can only be used in the case of larger grid arrangements nontransparent, heat-dissipating substrates are used. This applies to both discrete and monolithically integrated LED semiconductor structures. In the case of monolithic structures, a large LED matrix, for example with the dimensions Place 10 χ 10 or 15 χ 15 on a relatively small semiconductor wafer by making the connection solder points as shown in Fig, 2E, are accommodated directly below the N contacts 21 and the solder terminals 22 and 23 directly above a metallic transition, instead of as shown in Fig. 3A, around the periphery of the semiconductor wafer. In this way, using multilayer ceramics, a Easily connect a larger number of input-output orders, or have easy access to them, which otherwise not at all it is possible. However, this means that the light is emitted from the rear of the LED semiconductor wafer. According to the present In the invention, methods have been developed to achieve this with the aid of discrete and monolithic semiconductor wafers achieve.

It will be understood that light does not come from the back of a gallium arsenide phosphor LED device can be emitted because the light is absorbed in the stepped zone and in the gallium arsenide substrate will. The method of achieving light emission from the back is to either the gallium arsenide substrate area and to completely remove the stepped zone in that area or selectively etched gallium arsenide substrate and stepped zone areas on the back of the substrate in the form

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appropriate recesses to be attached. This can be done with the help of achieve a number of mechanically-chemically carried out process steps. In addition, this can also be done Dismantle the semiconductor wafers and after mounting the semiconductor wafers in their respective position,

5A shows a semiconductor wafer which has been mounted on a substrate, the semiconductor wafer having a gallium-arsenide-phosphide zone 1, which is epitaxially deposited on the stepped zone 2, which in turn is on a gallium ^ Arsenide substrate 3 is located. The semiconductor device is on the The substrate 31 is mounted over the solder terminals 32 in the manner of the method described in US Pat. No. 3,495,133,

Fig. 5B shows an embodiment of the invention in which the original gallium arsenide substrate 3 and the stepped zone 2 as well as corresponding parts of the epitaxy gallium-arsenide-phosphide layer 1 'have been removed. The removal of this Layer portions happen to such an extent that the distance between the PN junction on the underside of the zone 7 with the Gallium arsenide phosphide epitaxial layer 1 'and the back of the Layer satisfies the relationship χ = 0.5 / α, where α is the absorption coefficient of the ternary gallium-arsenide-phosphide alloy at wavelengths up to 70OO S.

5C illustrates another exemplary embodiment of the invention, in which recesses are made through the rear side of the LED component, in each case in the area that opposes the diffused zones 7! is overlaid, etched away; whereby these recesses are characterized by the! original gallium arsenide substrate 3 * of the graded zone 2 ' and corresponding areas of the gallium arsenide phosphide layer! T 'extend through it. Here again the distance between the diffused zone 7 and the bottom of the recess ¹ Removing sufficient to provide at least the relationship χ = 0.5 / α to satisfy, in which the absorption coefficient α of the gallium arsenide phosphide-ternary

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Alloy layer, at a wavelength of 7000 8.

Gallium arsenide can be chemically removed or etched using a number of known etching techniques. In the case of gallium arsenide phosphide ternary epitaxial semiconductor wafers, there are process technologies which have the particular advantage that the etching can be carried out selectively, that is to say that the gallium arsenide phosphide is not attacked. A suitable etchant for this purpose consists of a composition of AgNO _3, CrO _3, and HF at 65 ⁰ C. On the other hand, the layer removal can be initially carried out with a mixture of Chlornatron or sodium carbonate for initial rapid layer removal, the application of a solution of hydrogen peroxide and Ammonia for the subsequent slow layer removal and final refinement takes place. A similar method can be used for the selective etching of recesses in the rear side by using a sputtered silicon oxide etching mask which is provided with holes above the diffused zone.

The effective light-emitting area can also be increased by the rear-side emission according to the present invention, specifically for visual presentations. In a manufactured embodiment, a PN junction is in a central

2 area with the dimensions 0.28 mm χ 0.28 mm of a 0.2 cm large component has been diffused, which with forward bias shows an enlarged effective light-emitting area in the case of the rear-side emission, due to an edge emission, which does not occur in this way with normal front emission. This results in an approximately tenfold increase in the effective radiating area. This is beneficial in the construction of large display assemblies at high density so that the total number of LED components required is reduced to reduce the grid requirements. Essentially because of this enlarged emission area,

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- 14 - 2517973

push the LED components further apart. In addition, monolithic or discretely produced LED components with rear emission according to the invention can be used together with monolithically integrated semiconductor circuits in order to obtain the necessary control voltages for operating the LED components. Since the LED components and the drivers required for them consist of different substances, e.g. III ^j V ™ materials and silicon, there is fundamentally an incompatibility. However, thanks to the rear LED emission according to the invention, this fundamental incompatibility is overcome. When using rear emitting LED components with the solder connection points as shown in FIG. 2E, the driver circuits can be integrated into silicon substrates, the input and output connection contacts of which come to lie on the surface of the substrate whose position corresponds to the input and output solder connections of the LED component is equivalent to. In this way, the input and output soldering connections of the LED component can be connected to the terminal lugs of the respective monolithically integrated silicon driver circuit with the aid of "flip-chip" technology,

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Claims (5)

.-is- 2517973 PATENT CLAIMS Light-emitting diode (LED) component, consisting of an N-conducting GaAs ^ "P -semiconductor with values of X between 10 and 42%, preferably above 35%, and at least one PN built-in without destroying or damaging the corresponding semiconductor surface area Transition, with all electrodes ensuring a good galvanic connection to the semiconductor zones _f, in particular by using an Ag _{Q g gTe 0 0} alloy for contacting the N semiconductor zones and an Ag _{Q g8} Zn _{Q O2} alloy for contacting the P semiconductor zones one and the same side, namely the P-zone side of the LED device-forming semiconductor die Hegen, characterized _f that in each case the distance b between the PN junction and this of parallel, serving for light radiation and in the GaAsP HaIbleiter (1 ) introduced P-zone (7) opposite semiconductor wafer surface of the equation b / lcmj ⁼ 0.5 / a is sufficient, where adem absorption coefficient the coefficient of the GaAsP semiconductor (1) corresponds to up to 7000 8, 2. LED component according to claim 1, characterized in that that the GaAsP semiconductor consists of an over an intermediate epitaxial layer (2) with an epitaxial layer (1) applied on a GaAs substrate with the P component decreasing to 0 (3) consists, at least in each case in areas below the P-zones introduced into the GaAsP epitaxial layer (1) (7) is etched away. 3. LED component according to claim and / or claim 2, characterized in that the diffusion depth of the P-zone (7) is approximately Is 1.8 to 1.9 µm. 4. LED component according to one of claims 1 to 3, characterized in that that the surface side of the semiconductor wafer FI 973 084 509881/0697 chens (1 ¹ ) with diffused P-zone (7) with an anti-reflective coating (6), such as a silicon nitride or silicon monoxide layer / with λ / 4 thickness, based on the wavelength of the emitted light, is coated. 5. LED component according to claim 2, characterized by completely removed substrate material. FI 973 084 50988 1/0697