DE19983793T1 - Pufferspeicherverwaltung in einem System mit mehreren Ausführungseinheiten - Google Patents

Pufferspeicherverwaltung in einem System mit mehreren Ausführungseinheiten

Info

Publication number
DE19983793T1
DE19983793T1 DE19983793T DE19983793T DE19983793T1 DE 19983793 T1 DE19983793 T1 DE 19983793T1 DE 19983793 T DE19983793 T DE 19983793T DE 19983793 T DE19983793 T DE 19983793T DE 19983793 T1 DE19983793 T1 DE 19983793T1
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DE
Germany
Prior art keywords
execution units
cache management
multiple execution
cache
management
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19983793T
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English (en)
Other versions
DE19983793B4 (de
Inventor
Zhong-Ning Cai
Tosaku Nakanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
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Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE19983793T1 publication Critical patent/DE19983793T1/de
Application granted granted Critical
Publication of DE19983793B4 publication Critical patent/DE19983793B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0848—Partitioned cache, e.g. separate instruction and operand caches
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE19983793T 1998-12-08 1999-09-22 System mit einem Prozessor, auf dem mehrere, gleichzeitig aktive Ausführungsentitäten ausgeführt werden, und mit einem mehrere, den Ausführungsentitäten zugewiese Cache-Abschnitte aufweisenden Cache-Speicher Expired - Fee Related DE19983793B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/207,278 1998-12-08
US09/207,278 US6349363B2 (en) 1998-12-08 1998-12-08 Multi-section cache with different attributes for each section
PCT/US1999/021249 WO2000034870A1 (en) 1998-12-08 1999-09-22 Buffer memory management in a system having multiple execution entities

Publications (2)

Publication Number Publication Date
DE19983793T1 true DE19983793T1 (de) 2001-11-29
DE19983793B4 DE19983793B4 (de) 2013-02-07

Family

ID=22769873

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19983793T Expired - Fee Related DE19983793B4 (de) 1998-12-08 1999-09-22 System mit einem Prozessor, auf dem mehrere, gleichzeitig aktive Ausführungsentitäten ausgeführt werden, und mit einem mehrere, den Ausführungsentitäten zugewiese Cache-Abschnitte aufweisenden Cache-Speicher

Country Status (7)

Country Link
US (2) US6349363B2 (de)
CN (1) CN1179276C (de)
AU (1) AU6497199A (de)
DE (1) DE19983793B4 (de)
GB (1) GB2359163B (de)
HK (1) HK1036662A1 (de)
WO (1) WO2000034870A1 (de)

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GB2359163B (en) 2003-07-30
US6349363B2 (en) 2002-02-19
GB2359163A (en) 2001-08-15
CN1179276C (zh) 2004-12-08
US6470422B2 (en) 2002-10-22
AU6497199A (en) 2000-06-26
GB0111896D0 (en) 2001-07-04
CN1334938A (zh) 2002-02-06
US20020046325A1 (en) 2002-04-18
WO2000034870A1 (en) 2000-06-15
HK1036662A1 (en) 2002-01-11
DE19983793B4 (de) 2013-02-07
US20010049770A1 (en) 2001-12-06

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