DE19680525T1 - Changeable delay circuit - Google Patents

Changeable delay circuit

Info

Publication number
DE19680525T1
DE19680525T1 DE19680525T DE19680525T DE19680525T1 DE 19680525 T1 DE19680525 T1 DE 19680525T1 DE 19680525 T DE19680525 T DE 19680525T DE 19680525 T DE19680525 T DE 19680525T DE 19680525 T1 DE19680525 T1 DE 19680525T1
Authority
DE
Germany
Prior art keywords
delay circuit
changeable delay
changeable
circuit
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19680525T
Other languages
German (de)
Inventor
Hiroo Suzuki
Toshiyuki Okayasu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE19680525T1 publication Critical patent/DE19680525T1/en
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H03K5/134—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices with field-effect transistors

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Logic Circuits (AREA)
DE19680525T 1995-06-02 1996-05-31 Changeable delay circuit Ceased DE19680525T1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7136408A JPH08330921A (en) 1995-06-02 1995-06-02 Variable delay circuit
PCT/JP1996/001482 WO1996038912A1 (en) 1995-06-02 1996-05-31 Variable delay circuit

Publications (1)

Publication Number Publication Date
DE19680525T1 true DE19680525T1 (en) 1997-07-24

Family

ID=15174470

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19680525T Ceased DE19680525T1 (en) 1995-06-02 1996-05-31 Changeable delay circuit

Country Status (5)

Country Link
JP (1) JPH08330921A (en)
KR (1) KR970705234A (en)
DE (1) DE19680525T1 (en)
TW (1) TW307955B (en)
WO (1) WO1996038912A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100489587B1 (en) * 1997-12-29 2005-08-23 주식회사 하이닉스반도체 Time delay circuit
CN100340062C (en) * 2003-02-25 2007-09-26 松下电器产业株式会社 Semiconductor integrated circuit
US20050083095A1 (en) * 2003-10-16 2005-04-21 Tsvika Kurts Adaptive input/output buffer and methods thereof
JP4729251B2 (en) * 2003-11-28 2011-07-20 株式会社アドバンテスト High frequency delay circuit and test apparatus
US7382117B2 (en) * 2005-06-17 2008-06-03 Advantest Corporation Delay circuit and test apparatus using delay element and buffer
JP4928097B2 (en) * 2005-07-29 2012-05-09 株式会社アドバンテスト Timing generator and semiconductor test apparatus
KR100955682B1 (en) * 2008-04-28 2010-05-03 주식회사 하이닉스반도체 Sensing Delay Circuit and Semiconductor Memory Device using the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5352945A (en) * 1993-03-18 1994-10-04 Micron Semiconductor, Inc. Voltage compensating delay element

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62272619A (en) * 1986-05-21 1987-11-26 Hitachi Ltd Delay circuit
JPS63246916A (en) * 1987-04-02 1988-10-13 Mitsubishi Electric Corp Inverter circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5352945A (en) * 1993-03-18 1994-10-04 Micron Semiconductor, Inc. Voltage compensating delay element

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
JP 4-3 39 411 A, in: Patents Abstr. of Japan, Sect. E, Vol. 17 (1993), Nr. 192 (E-1350) *
JP 7-1 15 351 A, in: Patents Abstr. of Japan *

Also Published As

Publication number Publication date
JPH08330921A (en) 1996-12-13
KR970705234A (en) 1997-09-06
TW307955B (en) 1997-06-11
WO1996038912A1 (en) 1996-12-05

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection