DE1250533B - Arrangement for monitoring or regulation with means for a signed comparison of two pulse frequencies - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Int. Cl .:

G05b

G05f
German class: 21c-46/50

Number:
File number:
Registration date:
Display day:

L 53020 VIII b / 21c
March 5, 19 6 j6 ^ m
21st SeprermTer "1967

Ui

kissJf

A- Ot

The invention relates to an arrangement for monitoring or controlling means for sign-rated comparing two pulse rates and output of output pulses is exceeded emer switching $ chweUe;. 'VQN ~ ^ Piffe re "ff !! ^ ^ ggg CfeJ> ZerteTnKeit.

"Such an arrangement is already known in which the pulse frequencies with an up-down counter can be compared with two inputs. Run into the two inputs of the up / down counter If the number of pulses per unit of time is not the same, it is switched on according to the difference between the pulses. When exceeded A switching threshold of +2 differential pulses controls an actuator and the up / down counter reset to its original state.

In the up / down counter, however, disruptive, scattered errors can occur when the two pulse frequencies are counted in almost simultaneously. During a certain switching time of; _w , no pulses may be fed in forwards or backwards operation. In addition, an up / down counter is relatively expensive, since gate circuits are required to switch the counting direction.

Another known arrangement works with two presettable counters, one before and one downward-counting differential counter and a control unit. The two pulse rates to be compared are fed into one meter each. After a measuring time, which is due to the full counting of the a counter is given, a difference number with the correct sign is in the difference counter counted in integrating. Then both counters are reset and the process is repeated themselves.

In this case, no unsystematic error can occur in the difference counter, since the pulse frequencies not output immediately, but as numbers from the counters at the end of longer measuring periods will. However, it can be disadvantageous in the case of very high demands on the control dynamics, that the counting time appears in the control loop as dead time. The effort of the arrangement is with two counters, a difference counter and a control part are quite high.

The prior art also includes a device for monitoring or regulation in which the signal of the controlled variable is a pulse frequency. This pulse frequency is applied to a monostable multivibrator with an adjustable tilting length. The output arrangement for monitoring or regulation with means for a signed comparison
two pulse rates

Applicant:

Licentia Patent-Verwaltungs-G. m. b. H.,

Frankfurt / M., Theodor-Stern-Kai 1

Named as inventor:

Dipl.-Ing. Hermann Ragnar Eggers,

Klaus Schlömer, Heiligenhaus

size of the flip-flop and the half-cycle duration of the pulse frequency are compared in AND gates, the Generate control pulses that are dependent on the size and direction of the difference.

Since with this device only the signal of the controlled variable is fed in as a pulse frequency while the reference variable is to be set by the tilting length of the monostable tilting stage, are the Uses limited. For example, a ratio control with a second pulse frequency can be used do not perform as a reference variable. Apart from that, you have to deal with errors Fluctuations in the adjustable tilt length of the monostable multivibrator can be expected, so that the high accuracy aimed for with digital technology is not easily achieved.

The invention is based on the object of an arrangement for monitoring or regulating to create the two pulse frequencies without disturbing errors even with critical frequency conditions and compares phase positions. The time units for carrying out a comparison should as far as possible be short. In addition, the arrangement with these properties should be easy to use distinguish.

The invention consists in that two pulse memories are provided for three memory states each, each of which has an input input counting in one direction, a priority clear input and have an output emitting an output pulse in the third memory state, and that the Input input of one pulse memory as well as the delete input of the other pulse memory with the a pulse frequency and the delete input of one pulse memory as well as the input input of the other

709 648/257

3 4

ren pulse memory is connected to the other pulse frequency other dynamic inputs, are acted upon. In the commercially available flip-flops, the additional advantage is achieved that the dynamic input is usually present, which when switching from forward-backward, so that the desired characteristic does not require multiple counters for certain frequency and phase ratios due to components,
As already mentioned, the following possible errors are avoided when the subject is the problem. In the invention, the reliable erasure of the pulse memories of the arrangement according to the invention is in fact essential for the advantageous effects to be essential for a defined erasure period in order to obtain each sign of the pulse frequency difference. This pulse memory is provided, which works independently of the io is facilitated by two pulse amplifiers to the other pulse memory. The total cost of the arrangement is relatively low, since each pulse memory is only fed into the static erase inputs of the pulse memory.

One direction counting three memory states to- Embodiments of the invention are in the

need to take and by deletion only shown on 15 drawing and are shown in the following

a memory state can be reset, described in more detail. It shows

therefore it is uncomplicated. A special FIG. 1, an arrangement for regulating with a control device, is omitted because the pulse memory of two pulse frequencies Z ₁ and Z ₂ .
rather are designed so that in a pulse memory Fig. 2 a substantial part of the arrangement in a rather automatically in each case between two pulses of the ao detailed representation,

lower pulse rate the comparison with the F i g. 3 timing diagrams of the course of action for

higher pulse rate expires. Z _{1 is} greater than Z ₂ and

Because in the case of frequency deviations in the one Fig. 4 time diagrams of the course of action for

and in the other sense only a certain Im- Z ₁ smaller than f _r

pulse memory emits an output pulse, the 25 corresponding parts are shown in FIGS. 1

Sign-weighted output pulses. You can use and 2 identical reference symbols,

in the simplest way, e.g. B. in a Grenzwertmel- In F i g. 1 with Ifi, 11 are two pulse memories for

the or an interlocking for a servomotor, denotes three memory states "0", "1", "2",

be processed. Each pulse memory has one in one direction

If the difference frequency reaches a certain 30-counting input input 12 or 13, a priority

Falls below the value, arise as a result of the priority extinguishing input 14 or 15 as well as an output

If there are clear inputs and the duration of the erasure, no fault 16 or 17, which is stored in the third memory status »2«

Alternate output pulses with undefined - emits an output pulse. The entrance 12 of the

the sign. Pulse memory lfi is connected to the output of a pulse

In order to predefine the deletion duration, the invention former 18 is connected, which operates at a frequency Z ₁

appropriate arrangement expediently designed so that it is acted upon. In addition, there is the output of the

the pulses at the input input only with a pulse shaper 18 in connection with the delete

Switch the edge dynamically and feed the pulses at gear 15 of the pulse memory 11. Analogue to this

A further pulse shaper 19 for the frequency Z _{2 is static for a longer period of time}

are effective. 40 memory input 13 of the pulse memory 11 and the

The effort for the arrangement according to the Erfin delete input 14 of the pulse memory Ifi. Of the

application is to be kept particularly low that both outputs 16 and 17 of the pulse memory

each pulse memory using a bista- lead connections to an interlocking 20 one

bil flip-flop with a dynamic input to the stepping motor 21 serving as a servomotor.

Memory and a static input to the 45 The mode of operation of this arrangement is as follows

Delete as well as another bistable multivibrator:

Each pulse of the pulse frequency Z ₁ switches the storage and a static input to the pulse memory 10 to the next higher memory erase one to the output of the other breakdown state and at the same time deletes the preparatory input connected to the pulse supply stage 50 rather 11. In a similar way, a pulse influences memory, and that the dynamic inputs of the pulse frequency f _{t place} the pulse memory U to the inputs and the static inputs are connected to each other of the next higher memory state and are connected. Pulse memory 10 to be cleared to "0".

For the two pulse memories it is possible to use cheap flip-flops at the output of the one in the retail trade if their input pulse memory generates an output pulse which, as a result of the inputs, is formed in the required manner and pulses are linked to the one-way counting device. input input reaches the memory state "2", which in the case of the arrangement according to the invention does not correspond to a pulse that was previously reset to its for a ratio of the pulse frequencies of 1: 1 to the clear input. Basically 2: 1 the number of output pulses over a long 60 must therefore for an output pulse during a longer section directly the difference between the pulse frequencies of a time unit, which zen through two at the reset input. For higher pulse frequency ratios successive pulses are given, two Im, it may be desirable for further output pulses to occur at the input input. Output the second signal at the input input and the nis between pulses with a certain reduction ratio. This is achieved by the further measurement of the following pulse at the reset input, so that the output 16 or 17 emits an output pulse in each pulse memory. second flip-flop in addition with a dynamic one. It is easy to see that an output pulse input is equipped for deletion, which can only arise with the output 16 if Z _{1 is} greater

5 6

as Z ₂ , and that conversely the output pulse to chert, so that the output 27 will occur with a small terminal 17 when Z _{1 is} less than Z ₂ switching delay from L to 0 switches. In the tilt The output pulses are thus the sign stage 25, but this pulse is not evaluated as being fed. as its preparatory input for storing

Due to the construction of the signal box 20, 5 can only be reached on the, because of the switching delay, that for the stepper motor 21 z. B. a required zero potential is when the L-0 edge Output pulse at output 16 a step in the pulse at the dynamic input to Clockwise and an output pulse at the store has already decayed. The reinforced Output 17, one step counterclockwise, positive pulse at the static reset input 14 speaks. ίο is ineffective because the flip-flops 22 and 23 are already

Are deleted in place of the signal box or in addition to it.

In other versions, a monitoring function can be used for the subsequent pulse of the pulse frequency

device connected to terminals 16, 17 Z ₁ , which is applied as a positive pulse to the reset input 15

that occurs at an output pulse, the flip-flop 24 with the output 27

Terminal 16 the exceeding of a limit value and 15 reset again. The edge of the pulse

in the event of an output pulse at terminal 17, the flip-flop 22 with output 26 switches over

Signaled falling below a limit value. and thereby prepares the flip-flop 23 for storage

The effect of the priority deletion of the im- before.

Pulse memory 10, 11 is opened after the explanation. The next pulse of the pulse frequency Z ₁ calls in

der F i g. 2 described. 20 the completely erased pulse memory 11 none

From Fig. 2 shows in particular the structure of the effect. In the pulse memory 10 tilts

Pulse memory M and H out: but the prepared flip-flop 23, and its signal on

Both pulse memories have output 16, which changes from L to 0, which results in two bistable flip-flops 22, 23 and 24, 25. Each output pulse indicates that in a trigger stage two differential pulses have occurred with a time unit marked by a peak, recorded dynamic input for storage, and that Z _{1 is} greater than /. The second amplified, equipped with a static input for deletion and a positive pulse of the pulse frequency Z ₂ at the static output. In connection with the extinguishing input 14, the original output 26 or 27 of the flip-flop 22 or 24 is restored to a state of the pulse memory 10.
preparatory input of the flip-flop 23 or 25. 30 In Fig. 4 is different from Fig. 3, puis-The outputs 16,17 of the flip-flops 23, 25 provide frequency Z ₁ is smaller than the pulse frequency Z _2, and also the outputs of the entire pulse memory 10, L-0 edges of the first pulse of both frequencies 11 represent. The dynamic inputs of the trigger stages are in phase. Since these impulses are amplified before the 22, 23 are applied to the input input 12 of the subordinate clearing inputs 14,15, verpulsspeichers 10 and the dynamic inputs of the 35 wait for all flip-flops of the two pulse memories 10, flip-flops 24, 25 to the input input 13 des 11 in its original, deleted state.
Pulse memory 11 summarized. The static If the pulse of the pulse frequency Z ₂ within inputs for deleting the flip-flops 22, 23 lags behind the duration of the amplified pulse of the pulse frequency to the _{delete input 14 of the pulse memory 10 and Z 1} , it calls because of the priority of the static the static inputs to delete the Tilting 40 see extinguishing input 14 also no effect stages 24, 25 led to extinguishing input 15. While in the pulse memory 10 emerges. If the pulse occurs directly from the pulse frequency Z _a, on the other hand, before the L-0 edge of the pulse shapers 18, 19 assigned to them, the pulse of the pulse frequency Z _{1 is} fed, then the are switched between the static delete input output of the flip-flop 27 although briefly up to the gene and the pulse formers pulse amplifiers 28, 29 45 arrival of the pulse of the pulse frequency Z ₁ from L arranged. to 0; but there is no output pulse because the

The pulse amplifiers give for each pulse to flip-flop 25 maintains their quenching state,
But now the next pulse comes from the pulse pulse of constant length. The bistable flip-flop frequency Z ₂ , after the amplified, positive pulse in the pulse memory two switching states 50 of the pulse frequency Z _{1 has} decayed, then the assumption flips: flip-flop 24 in the pulse memory 11 and prepares the

A flip-flop 25 appears at the exits under consideration. The following pulse of the PuIs-L-Signal, if the flip-flop is deleted, and a frequency Z ₂ switches the flip-flop 25, and at the O-Signal, if it stores a value. The static output 17 produces an output signal that indicates the inputs for deleting the multivibrators are 55 exceeding the switching threshold of two differences during the entire duration of a positive pulse for Z ₂ greater than Z ₁ ,
This is effective, on the other hand the dynamic ones. By a further pulse of the pulse frequency Z ₂ inputs only respond to the edges of the pulses when the flip-flop 25 is reset dynamically, so L-0 transition. that the signal is L again at the output 17th

The signed comparison of two pulse 60 comes in before a pulse with the pulse frequency Z ₁

frequencies in the arrangement according to FIG. 2 is switched to another pulse of the pulse frequency Z ₂ , ^so

Hand of fig. 3 and 4 explained. At the beginning of the flip-flop back to storage position, there

Consideration should always be given to all pulse buffers or toggle the preparatory input for saving

levels must be deleted. is still applied with a zero signal. At

In Fig. 3 it is assumed that the pulse 65 arises after the output 17 accordingly

frequency Z _{1 is} higher than the pulse frequency Z ₂ . first output pulse after two additional im-

First, a pulse of the pulse frequency Z _{2 is} pulsed with the pulse frequency Z ₂ a second output

the input input 13 in the flip-flop 24 stored pulse.

Claims (5)

The flip-flops 24, 25 in the pulse memories are statically reset only by a further positive pulse at the pulse frequency Z1 at the clear input 15. Patent claims: 1. An arrangement for monitoring or control with means for the signed comparison of two pulse frequencies and for the output of output pulses when a switching threshold of + 2 differential pulses per unit of time is exceeded, characterized in that two pulse memories (10, U) are provided for three memory states each, each of which an input input (12 or 13) counting in one direction, a priority clear input (14 or 15) and an output (16 or 17) which emits an output pulse in the third memory state, and that the input input ao (12) of the one pulse memory as well as the delete input (15) of the other pulse memory with one pulse frequency (Z ₁ ) and the delete input (14) of the »one pulse memory and the input input (13) of the other pulse memory as with the other pulse frequency (/ ₂ ). 2. Arrangement according to claim 1, characterized by pulse memory with such a design Input and delete inputs that the pulses at the input input only with one Switch edge dynamically and the pulses at the reset input for a longer duration are statically effective (Fig. 2). 3. Arrangement according to claim 2, characterized in that each pulse memory (10 or 11) using a bistable multivibrator (22 or 24) with a dynamic input for storing and a static input for deletion as well as another bistable Flip-flop (23 or 25) is built, which apart from a dynamic input for storing and a static input to delete one to the output (26 or 27) of the other flip-flop connected preparatory input for storing, and that the dynamic Inputs and the static inputs are interconnected (Fig. 2). 4. Arrangement according to claim 3, characterized in that in each pulse memory the second flip-flop (23 or 25) additionally equipped with a dynamic input for deletion which is connected to the other dynamic inputs (Fig. 2). 5. Arrangement according to one of claims 1 to 4, characterized by two pulse amplifiers (28, 29) to reinforce the two in the static delete inputs (15, 14) of the pulse memory injected pulse frequencies (Fig. 2). Considered publications:
German Auslegeschrift No. 1077 307,
861; "ETZ-A", Vol. 82, H. 18, 1961, p. 575. 1 sheet of drawings 709 648/257 9. 67 © Bundesdruckerei Berlin