DE112011103563T8 - Verfahren und System zum Identifizieren von seltenen Fehlerraten - Google Patents

Verfahren und System zum Identifizieren von seltenen Fehlerraten Download PDF

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Publication number
DE112011103563T8
DE112011103563T8 DE112011103563T DE112011103563T DE112011103563T8 DE 112011103563 T8 DE112011103563 T8 DE 112011103563T8 DE 112011103563 T DE112011103563 T DE 112011103563T DE 112011103563 T DE112011103563 T DE 112011103563T DE 112011103563 T8 DE112011103563 T8 DE 112011103563T8
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error rates
identifying rare
rare error
identifying
rates
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DE112011103563T5 (de
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Trent Lorne McConaghy
Joel Cooper
Jeffrey Dyck
Kyle Fisher
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Mentor Graphics Canada ULC
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Solido Design Automation Inc
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/36Circuit design at the analogue level
    • G06F30/367Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2111/00Details relating to CAD techniques
    • G06F2111/08Probabilistic or stochastic CAD

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Data Mining & Analysis (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Algebra (AREA)
  • Pure & Applied Mathematics (AREA)
  • Databases & Information Systems (AREA)
  • Software Systems (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)
DE112011103563T 2010-10-27 2011-10-27 Verfahren und System zum Identifizieren von seltenen Fehlerraten Active DE112011103563T8 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US40723010P 2010-10-27 2010-10-27
US61/407,230 2010-10-27
PCT/CA2011/050673 WO2012055045A2 (en) 2010-10-27 2011-10-27 Method and system for identifying rare-event failure rates

Publications (2)

Publication Number Publication Date
DE112011103563T5 DE112011103563T5 (de) 2013-08-22
DE112011103563T8 true DE112011103563T8 (de) 2013-11-21

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DE112011103563T Active DE112011103563T8 (de) 2010-10-27 2011-10-27 Verfahren und System zum Identifizieren von seltenen Fehlerraten

Country Status (6)

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US (1) US9483602B2 (de)
JP (1) JP5860054B2 (de)
KR (1) KR101904518B1 (de)
DE (1) DE112011103563T8 (de)
TW (1) TWI559156B (de)
WO (1) WO2012055045A2 (de)

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EP3340129B1 (de) * 2016-12-21 2019-01-30 Axis AB Künstliches neuronales netzwerk klassenbasierte ausdünnung
US11340977B2 (en) 2017-01-11 2022-05-24 International Business Machines Corporation Predictive analytics for failure detection
US10776548B1 (en) * 2017-03-28 2020-09-15 Cadence Design Systems, Inc. Parallel Monte Carlo sampling for predicting tail performance of integrated circuits
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JP6874238B2 (ja) * 2017-06-30 2021-05-19 日本電気株式会社 光学系設計支援システム、光学系設計支援方法および光学系設計支援プログラム
US10658841B2 (en) 2017-07-14 2020-05-19 Engie Storage Services Na Llc Clustered power generator architecture
KR102578644B1 (ko) 2017-08-30 2023-09-13 삼성전자주식회사 반도체 집적회로의 수율 예측 장치, 및 이를 이용한 반도체 장치 제조 방법
US11507846B2 (en) * 2018-03-26 2022-11-22 Nvidia Corporation Representing a neural network utilizing paths within the network to improve a performance of the neural network
DE102019106996A1 (de) 2018-03-26 2019-09-26 Nvidia Corporation Darstellen eines neuronalen netzwerks unter verwendung von pfaden innerhalb des netzwerks zum verbessern der leistung des neuronalen netzwerks
US10853550B1 (en) * 2018-07-03 2020-12-01 Cadence Design Systems, Inc. Sampling selection for enhanced high yield estimation in circuit designs
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KR102103578B1 (ko) * 2018-11-28 2020-04-23 (주)밸류파인더스 몬테카를로 유전자 알고리즘을 사용한 포트폴리오 자산 선택방법
CN111584063B (zh) * 2019-02-15 2023-11-10 宏碁股份有限公司 不同分组集合下的评估统计效能的方法
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US11487917B2 (en) * 2019-04-22 2022-11-01 Autodesk, Inc. Automatic design of mechanical assemblies using estimation of distribution algorithm
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JP2023517512A (ja) * 2020-03-05 2023-04-26 コーニンクレッカ フィリップス エヌ ヴェ 3次元超音波画像データのコンテキストマルチプラナー再構成、ならびに関連する装置、システム、及び方法
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Also Published As

Publication number Publication date
US20130226544A1 (en) 2013-08-29
US9483602B2 (en) 2016-11-01
TWI559156B (zh) 2016-11-21
JP5860054B2 (ja) 2016-02-16
TW201237647A (en) 2012-09-16
DE112011103563T5 (de) 2013-08-22
WO2012055045A2 (en) 2012-05-03
KR101904518B1 (ko) 2018-10-04
WO2012055045A3 (en) 2012-06-21
JP2013542526A (ja) 2013-11-21
KR20140024252A (ko) 2014-02-28

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