DE112008003643A5 - Rekonfigurierbare Fliesskomma- und Bit- ebenen Datenverarbeitungseinheit - Google Patents
Rekonfigurierbare Fliesskomma- und Bit- ebenen Datenverarbeitungseinheit Download PDFInfo
- Publication number
- DE112008003643A5 DE112008003643A5 DE112008003643T DE112008003643T DE112008003643A5 DE 112008003643 A5 DE112008003643 A5 DE 112008003643A5 DE 112008003643 T DE112008003643 T DE 112008003643T DE 112008003643 T DE112008003643 T DE 112008003643T DE 112008003643 A5 DE112008003643 A5 DE 112008003643A5
- Authority
- DE
- Germany
- Prior art keywords
- bit
- point
- processing unit
- data processing
- plane data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
Landscapes
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- General Engineering & Computer Science (AREA)
- Advance Control (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102007055131 | 2007-11-17 | ||
DE102007055131.4 | 2007-11-17 | ||
DE102007056806.3 | 2007-11-23 | ||
DE102007056806 | 2007-11-23 | ||
DE102008014705.2 | 2008-03-18 | ||
DE102008014705 | 2008-03-18 | ||
PCT/DE2008/001892 WO2009062496A1 (de) | 2007-11-17 | 2008-11-17 | Rekonfiguri erbare fliesskomma- und bit- ebenen datenverarbeitungseinheit |
Publications (1)
Publication Number | Publication Date |
---|---|
DE112008003643A5 true DE112008003643A5 (de) | 2010-10-28 |
Family
ID=40384208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE112008003643T Withdrawn DE112008003643A5 (de) | 2007-11-17 | 2008-11-17 | Rekonfigurierbare Fliesskomma- und Bit- ebenen Datenverarbeitungseinheit |
Country Status (5)
Country | Link |
---|---|
US (1) | US20100281235A1 (de) |
EP (1) | EP2220554A1 (de) |
JP (1) | JP2011503733A (de) |
DE (1) | DE112008003643A5 (de) |
WO (1) | WO2009062496A1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9465578B2 (en) * | 2013-12-13 | 2016-10-11 | Nvidia Corporation | Logic circuitry configurable to perform 32-bit or dual 16-bit floating-point operations |
US10409614B2 (en) | 2017-04-24 | 2019-09-10 | Intel Corporation | Instructions having support for floating point and integer data types in the same register |
US10474458B2 (en) * | 2017-04-28 | 2019-11-12 | Intel Corporation | Instructions and logic to perform floating-point and integer operations for machine learning |
US11934342B2 (en) | 2019-03-15 | 2024-03-19 | Intel Corporation | Assistance for hardware prefetch in cache access |
EP3938888A1 (de) | 2019-03-15 | 2022-01-19 | INTEL Corporation | Systolische disaggregation innerhalb einer matrixbeschleunigerarchitektur |
WO2020190802A1 (en) | 2019-03-15 | 2020-09-24 | Intel Corporation | Compression techniques |
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-
2008
- 2008-11-17 US US12/743,356 patent/US20100281235A1/en not_active Abandoned
- 2008-11-17 EP EP08850421A patent/EP2220554A1/de not_active Ceased
- 2008-11-17 WO PCT/DE2008/001892 patent/WO2009062496A1/de active Application Filing
- 2008-11-17 DE DE112008003643T patent/DE112008003643A5/de not_active Withdrawn
- 2008-11-17 JP JP2010533431A patent/JP2011503733A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
WO2009062496A1 (de) | 2009-05-22 |
EP2220554A1 (de) | 2010-08-25 |
JP2011503733A (ja) | 2011-01-27 |
US20100281235A1 (en) | 2010-11-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
R082 | Change of representative |
Representative=s name: VOSSIUS & PARTNER PATENTANWAELTE RECHTSANWAELT, DE |
|
R082 | Change of representative |
Representative=s name: VOSSIUS & PARTNER PATENTANWAELTE RECHTSANWAELT, DE |
|
R082 | Change of representative |
Representative=s name: VOSSIUS & PARTNER PATENTANWAELTE RECHTSANWAELT, DE |
|
R081 | Change of applicant/patentee |
Owner name: PACT XPP TECHNOLOGIES AG, DE Free format text: FORMER OWNERS: KRASS, MAREN, ZUERICH, CH; RICHTER, THOMAS, 04703 BOCKELWITZ, DE Effective date: 20141103 Owner name: PACT XPP TECHNOLOGIES AG, DE Free format text: FORMER OWNER: MAREN KRASS,THOMAS RICHTER, , CH Effective date: 20141103 |
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R082 | Change of representative |
Representative=s name: VOSSIUS & PARTNER PATENTANWAELTE RECHTSANWAELT, DE Effective date: 20140312 Representative=s name: VOSSIUS & PARTNER PATENTANWAELTE RECHTSANWAELT, DE Effective date: 20140123 Representative=s name: VOSSIUS & PARTNER PATENTANWAELTE RECHTSANWAELT, DE Effective date: 20141103 |
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R005 | Application deemed withdrawn due to failure to request examination |