DE10296980T5 - Verfahren und Einrichtung zum Zuweisen eines Thread-Vorrangs bei einem mehrfädigen Prozessor - Google Patents

Verfahren und Einrichtung zum Zuweisen eines Thread-Vorrangs bei einem mehrfädigen Prozessor Download PDF

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Publication number
DE10296980T5
DE10296980T5 DE10296980T DE10296980T DE10296980T5 DE 10296980 T5 DE10296980 T5 DE 10296980T5 DE 10296980 T DE10296980 T DE 10296980T DE 10296980 T DE10296980 T DE 10296980T DE 10296980 T5 DE10296980 T5 DE 10296980T5
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DE
Germany
Prior art keywords
threaded processor
thread priority
assigning thread
assigning
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10296980T
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English (en)
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DE10296980B4 (de
Inventor
Darrell Boggs
David Sager
Michael Upton
James Allen
David Burns
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
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Intel Corp
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Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE10296980T5 publication Critical patent/DE10296980T5/de
Application granted granted Critical
Publication of DE10296980B4 publication Critical patent/DE10296980B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
DE10296980T 2001-06-22 2002-04-18 Multi-Threaded-Prozessor und Verfahren zum Zuweisen eines Thread-Vorrangs in einem Multi-Threaded-Prozessor Expired - Fee Related DE10296980B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/888,273 US7454600B2 (en) 2001-06-22 2001-06-22 Method and apparatus for assigning thread priority in a processor or the like
US09/888,273 2001-06-22
PCT/US2002/012339 WO2003001367A1 (en) 2001-06-22 2002-04-18 Method and apparatus for assigning thread priority in a multi-threaded processor

Publications (2)

Publication Number Publication Date
DE10296980T5 true DE10296980T5 (de) 2004-10-07
DE10296980B4 DE10296980B4 (de) 2010-04-22

Family

ID=25392895

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10296980T Expired - Fee Related DE10296980B4 (de) 2001-06-22 2002-04-18 Multi-Threaded-Prozessor und Verfahren zum Zuweisen eines Thread-Vorrangs in einem Multi-Threaded-Prozessor

Country Status (8)

Country Link
US (4) US7454600B2 (de)
CN (1) CN100517218C (de)
BR (1) BRPI0209387B1 (de)
DE (1) DE10296980B4 (de)
GB (1) GB2392751B (de)
HK (1) HK1068434A1 (de)
TW (1) TWI304181B (de)
WO (1) WO2003001367A1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7454600B2 (en) 2001-06-22 2008-11-18 Intel Corporation Method and apparatus for assigning thread priority in a processor or the like
US7657893B2 (en) * 2003-04-23 2010-02-02 International Business Machines Corporation Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor
JP3892829B2 (ja) * 2003-06-27 2007-03-14 株式会社東芝 情報処理システムおよびメモリ管理方法
US7748001B2 (en) * 2004-09-23 2010-06-29 Intel Corporation Multi-thread processing system for detecting and handling live-lock conditions by arbitrating livelock priority of logical processors based on a predertermined amount of time
US9626194B2 (en) 2004-09-23 2017-04-18 Intel Corporation Thread livelock unit
US8141087B2 (en) * 2006-03-31 2012-03-20 International Business Machines Corporation Resolving computing resource deadlocks based on priority and dependent processes
EP1862898B1 (de) * 2006-05-29 2011-12-14 Panasonic Corporation Informationsverarbeitungsvorrichtung, Informationsverarbeitungsverfahren und mit einem Informationsverarbeitungsprogramm aufgenommenes computerlesbares Informationsaufzeichnungsmedium zur Steuerung von Threadpriorität
US20080077727A1 (en) * 2006-09-25 2008-03-27 Baca Jim S Multithreaded state machine in non-volatile memory devices
US8024731B1 (en) * 2007-04-25 2011-09-20 Apple Inc. Assigning priorities to threads of execution
US8285973B2 (en) * 2008-08-04 2012-10-09 International Business Machines Corporation Thread completion rate controlled scheduling
WO2010052679A1 (en) * 2008-11-10 2010-05-14 Nxp B.V. Resource controlling
US8386753B2 (en) * 2009-04-14 2013-02-26 International Business Machines Corporation Completion arbitration for more than two threads based on resource limitations
US8175759B2 (en) * 2009-06-22 2012-05-08 Honeywell International Inc. Systems and methods for validating predetermined events in reconfigurable control systems
US8695002B2 (en) * 2009-10-20 2014-04-08 Lantiq Deutschland Gmbh Multi-threaded processors and multi-processor systems comprising shared resources
CN104011703B (zh) * 2011-12-22 2017-04-12 英特尔公司 用于指定应用线程性能状态的指令的指令处理装置及相关方法
US20140208074A1 (en) * 2012-03-30 2014-07-24 Boris A. Babayan Instruction scheduling for a multi-strand out-of-order processor
US9229721B2 (en) * 2012-09-10 2016-01-05 Qualcomm Incorporated Executing subroutines in a multi-threaded processing system
US10360063B2 (en) * 2015-09-23 2019-07-23 Qualcomm Incorporated Proactive resource management for parallel work-stealing processing systems
CN108021597B (zh) * 2016-10-28 2022-02-08 阿里巴巴集团控股有限公司 一种并行计数器、服务器和一种计数方法
US11068274B2 (en) * 2017-12-15 2021-07-20 International Business Machines Corporation Prioritized instructions in an instruction completion table of a simultaneous multithreading processor
CN108279927B (zh) * 2017-12-26 2020-07-31 芯原微电子(上海)股份有限公司 可调整指令优先级的多通道指令控制方法及系统、控制器

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5220653A (en) 1990-10-26 1993-06-15 International Business Machines Corporation Scheduling input/output operations in multitasking systems
US5956722A (en) * 1997-09-23 1999-09-21 At&T Corp. Method for effective indexing of partially dynamic documents
US6076157A (en) 1997-10-23 2000-06-13 International Business Machines Corporation Method and apparatus to force a thread switch in a multithreaded processor
US6212544B1 (en) 1997-10-23 2001-04-03 International Business Machines Corporation Altering thread priorities in a multithreaded processor
US6105051A (en) 1997-10-23 2000-08-15 International Business Machines Corporation Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor
FR2782422B1 (fr) * 1998-08-13 2000-09-15 St Microelectronics Sa Circuit de mesure d'intervalles de temps auto-calibre
US6542921B1 (en) * 1999-07-08 2003-04-01 Intel Corporation Method and apparatus for controlling the processing priority between multiple threads in a multithreaded processor
US6834315B2 (en) * 2001-03-26 2004-12-21 International Business Machines Corporation Method, system, and program for prioritizing input/output (I/O) requests submitted to a device driver
US7454600B2 (en) 2001-06-22 2008-11-18 Intel Corporation Method and apparatus for assigning thread priority in a processor or the like

Also Published As

Publication number Publication date
US8850165B2 (en) 2014-09-30
BR0209387A (pt) 2004-07-06
DE10296980B4 (de) 2010-04-22
US20020199088A1 (en) 2002-12-26
US20090070562A1 (en) 2009-03-12
US7987346B2 (en) 2011-07-26
US7454600B2 (en) 2008-11-18
TWI304181B (en) 2008-12-11
CN100517218C (zh) 2009-07-22
CN1518691A (zh) 2004-08-04
HK1068434A1 (en) 2005-04-29
US20110239221A1 (en) 2011-09-29
BRPI0209387B1 (pt) 2016-05-31
GB2392751B (en) 2005-11-02
GB0323746D0 (en) 2003-11-12
WO2003001367A1 (en) 2003-01-03
GB2392751A (en) 2004-03-10
US7877583B2 (en) 2011-01-25
US20110113222A1 (en) 2011-05-12

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