DE102018204376A1 - Silicon carbide devices and methods of making the same - Google Patents

Abstract

A semiconductor device comprises a silicon carbide layer, a metal carbide layer disposed on the silicon carbide layer, and a solder layer disposed directly on the metal carbide layer.

Description

TECHNICAL FIELD

The present disclosure relates to semiconductor technology. More particularly, the present disclosure relates to silicon carbide devices and methods of making same.

BACKGROUND

Silicon carbide devices belong to the so-called large bandgap semiconductor group. These devices offer a number of attractive properties for high voltage power semiconductors compared to conventional silicon. Electrical contacts of silicon carbide devices, e.g. Schottky diodes or MOSFETs may need to be electrically connected to other components, e.g. Ladder frames or clips. Manufacturers of silicon carbide devices are constantly striving to improve their products and the methods of making same. It may therefore be desirable to develop silicon carbide devices and associated manufacturing methods that provide improved and cost-efficient electrical connections between the silicon carbide devices and the other components.

SUMMARY

One aspect of the present disclosure relates to a semiconductor device. The semiconductor device comprises a silicon carbide layer. The semiconductor device further includes a metal carbide layer disposed on the silicon carbide layer. The semiconductor device further includes a solder layer disposed directly on the metal carbide layer.

The silicon carbide layer may be a part of a silicon carbide wafer, a silicon carbide chip or a silicon carbide die. The following notes regarding wafers may apply to chips or dies and vice versa. The silicon carbide layer may include active device regions of the semiconductor device. For example, an active device region may include a channel region of a field effect transistor, a base region of a bipolar transistor, a pn junction of a diode, and so on.

The semiconductor device may be soldered to a metal component via the solder layer, wherein the metal carbide layer may be at least partially formed during the soldering process. In one example, backside contact of a silicon carbide chip may be soldered to a die pad. In another example, a front side contact of a silicon carbide chip may be soldered to a clip. For multiple chips, the soldering process may be performed as a parallel batch process on the entire wafer surface or as a sequential chip solder on each front or back.

The solder layer may contain an active solder material. In particular, the solder layer may contain a tin-silver solder alloy. The solder layer may additionally contain a carbide-forming metal and a rare earth metal, as will be explained in more detail later. A thickness of the solder layer may e.g. in the range of 1 micron to 30 microns, more specifically 5 microns to 30 microns, more specifically 1 micron to 20 microns, more specifically 5 microns to 20 microns.

An arrangement in accordance with the present disclosure may provide for directly soldering a front and / or back of a chip to a metal component without the need for additional expensive metallization stacks disposed on the front and / or back of the chip. In this regard, the front side of the silicon carbide chip may be specified as the side of the chip where active device regions may be formed. The metal carbide layer may be electrically conductive. In particular, the metal carbide layer may be free of voids and may provide a mechanically stable connection between the chip and the metal component. The solder joint may have reduced mechanical stresses compared to conventional solder joints with metallization stacks. The risk of horizontal cracks can thus be significantly reduced.

In one embodiment, the semiconductor device further comprises a carbonaceous layer disposed between the silicon carbide layer and the metal carbide layer, wherein the carbonaceous layer is in direct contact with the silicon carbide layer and in direct contact with the metal carbide layer. The carbonaceous layer may be formed directly on a surface of the silicon carbide layer. The metal carbide layer may be formed of the carbide-forming metal of the solder layer and carbon of the carbon-containing layer. When the carbonaceous material is only partially used to form the metal carbide layer, the remaining portion of the carbonaceous layer may be in direct contact with the formed metal carbide layer.

According to one embodiment, the metal carbide layer is disposed directly on the silicon carbide layer. When the entire carbonaceous layer is used to form the metal carbide layer, the formed Metallcarbidschicht come into direct contact with the silicon carbide layer.

In one embodiment, the carbonaceous layer has a graphite crystal structure or a graphitic crystal structure. That is, the carbon of the carbonaceous layer may have a layered planar structure. In each layer, the carbon atoms may be arranged in a honeycomb lattice forming hexagonal carbon rings. The carbon atoms in the planes may be covalently bound, with only three out of four possible binding sites being satisfied. The fourth electron is free to migrate in the plane so that the carbonaceous layer can be electrically conductive.

According to one embodiment, the metal carbide layer comprises at least one of titanium carbide, nickel carbide, tungsten carbide, vanadium carbide. For example, the carbide-forming metal of the solder layer may include at least one of titanium, nickel, tungsten, vanadium. The metal carbide formed from the carbide-forming metal of the solder layer and carbon of the carbon-containing layer may thus comprise at least one of titanium carbide, nickel carbide, tungsten carbide, vanadium carbide. In further examples, the carbide-forming metal may also comprise at least one of tantalum, boron, aluminum, scandium, such that the formed metal carbide layer may also contain carbides of these metals.

In one embodiment, the solder layer comprises a carbide-forming metal corresponding to the metal of the metal carbide layer. The carbide-forming metal used to form the metal carbide layer may be provided by the carbide-forming metal atoms of the solder layer.

In one embodiment, a thickness of the metal carbide layer is in a range of 50 nanometers to 1 micrometer. In particular, the thickness can range from 50 nanometers to 800 nanometers, more specifically from 50 nanometers to 600 nanometers, more specifically from 50 nanometers to 400 nanometers, more specifically from 50 nanometers to 200 nanometers.

According to an embodiment, the semiconductor device further comprises an ohmic contact formed between the silicon carbide layer and the carbonaceous layer or between the silicon carbide layer and the metal carbide layer. The carbonaceous layer may be formed by evaporating silicon atoms from the silicon carbide layer, as will be explained in more detail later. Hereby, voids in the silicon carbide layer adjacent to the formed carbonaceous layer may increase electrical carrier concentrations and an ohmic contact may be formed. The thickness of the carbonaceous layer may be adjusted to form an ohmic contact with a resistance that is sufficiently low for silicon carbide diode applications. Depending on the process used to form the carbonaceous layer, the carbonaceous layer may provide various electrical resistances with a linear ohmic electrical power. The electrical resistance of the carbonaceous layer may range from about 70 ohms (using a laser process to form the carbonaceous layer) to about 200-300 ohms (using a micro electrical discharge machining process to form the carbonaceous layer). , The formed ohmic contact may be disposed between the silicon carbide layer and the metal carbide layer when the entire carbonaceous layer is used to form the metal carbide layer, i. when the metal carbide layer is in direct contact with the silicon carbide layer.

According to an embodiment, the semiconductor device further comprises a solder contact formed between the solder layer and a metal component, the metal component of at least one of a lead frame, a die pad, a lead, or pin, a clip or a metal foil. The metal component may be made of a metal or associated metal alloy, for example copper, nickel, aluminum, stainless steel, etc. For example, the metal component may be configured to provide an electrical connection between internal circuits or active device regions of the semiconductor device and external components.

According to one embodiment, the semiconductor device comprises a silicon carbide diode or a silicon carbide transistor. In particular, the silicon carbide diode may be a silicon carbide Schottky diode and the silicon carbide transistor may be a silicon carbide MOSFET. The active device regions of the diode or the transistor may be formed in the silicon carbide layer of the semiconductor device.

Another aspect of the present disclosure relates to a method. The method includes forming a carbonaceous layer on a silicon carbide layer. The The method further comprises forming a solder layer on the carbonaceous layer, wherein the solder layer comprises a carbide-forming metal. The method further includes forming a metal carbide layer between the carbonaceous layer and the solder layer, wherein the metal carbide layer is formed of the carbide-forming metal of the solder layer and the carbon of the carbon-comprising layer.

According to one embodiment, the method further comprises forming a solder contact between the solder layer and a metal component. For example, a silicon carbide wafer or a silicon carbide chip containing the silicon carbide layer may be soldered to a metal component via the solder layer. The metal component may e.g. a lead frame, a diepad, a lead, a clip, a metal foil.

According to one embodiment, the metal carbide layer is formed at least partially by forming the solder contact. During the soldering process, the metal carbide layer may be at least partially formed of the carbide-forming metal of the solder layer and carbon of the carbon-comprising layer. Carbide-forming metal atoms of the solder layer may diffuse to the reaction interface and react with carbon of the carbon-containing layer to form the metal carbide layer.

In one embodiment, the metal carbide layer is formed at least partially by forming the solder layer on the carbonaceous layer. A portion of the metal carbide layer may be formed prior to forming the solder contact when the solder layer may be applied to the carbonaceous layer. Carbide-forming metal atoms in the solder layer may diffuse to the interface between the solder layer and the carbon-comprising layer and react with carbon atoms of the carbon-containing layer to form metal carbide molecules.

In one embodiment, forming the carbonaceous layer includes applying a laser process or a spark erosion process to the silicon carbide layer. In particular, such a heat treatment process can be applied directly to a surface of the silicon carbide layer. The heat treatment process may be applied to the front and / or the back of a silicon carbide wafer or chip. By applying the process to the silicon carbide layer, the temperatures of the silicon carbide material can be increased locally for short periods of time. Due to the elevated temperatures, a thermal (or pyrolytic) decomposition of the silicon carbide may occur. Chemical bonds between silicon atoms and carbon atoms of silicon carbide molecules can be broken, so that the silicon atoms can be removed from the silicon carbide crystal lattice. The removed silicon atoms can be evaporated. As a result, a thin electrically conductive carbon layer may remain on the silicon carbide surface. In general, the local temperatures on the silicon carbide layer must be increased so that pyrolysis of the silicon carbide can take place. In particular, the temperatures generated may be greater than 800 ° C, more specifically greater than 900 ° C, more specifically greater than 1000 ° C, more specifically greater than 1100 ° C. In particular, the laser process may include a laser annealing process in which the silicon carbide material may be annealed using laser light from a laser. In this case, the surface of the silicon carbide material can be heated quickly by the laser light and then cool itself. Spark eroding (Micro Electrical Discharge Machining) can also be referred to as micro spark machining or micro spark eroding. Here, the surface of the silicon carbide material may be processed by rapidly recurring electrical discharges (sparks) between the silicon carbide surface and an electrode which may be subjected to electrical voltage and separated by a dielectric fluid during the process.

According to one embodiment, forming the carbonaceous layer comprises vaporizing silicon atoms from the silicon carbide layer. The silicon atoms may be evaporated after chemical bonds between silicon atoms and carbon atoms of silicon carbide molecules have been broken by a laser process or a spark erosion process. The vaporized silicon atoms may be from the surface of the silicon carbide material and / or silicon carbide material located below the surface. Since the vapor pressure of silicon in silicon carbide is higher than the vapor pressure of carbon in silicon carbide, an excess of carbon atoms may be left as the silicon atoms on the surface of the silicon carbide material evaporate. The evaporation of the silicon atoms may in particular be carried out in a vacuum or in an inert gas atmosphere, i. in the atmosphere of a gas, which does not react chemically with silicon carbide at the temperatures used. For example, argon can be used as an inert gas.

In one embodiment, the solder layer comprises a rare earth metal prior to forming the metal carbide layer. In particular, the rare earth element may contain cerium. In particular, the radius of the rare earth metal atoms may be smaller than the radius of the metal carbide-forming atoms in the solder layer. Therefore, when the metal carbide layer is formed on the reaction surface between the solder material and the carbonaceous layer, the rare earth metal atoms can diffuse to the reaction surface faster than the atoms of the carbide-forming metal. At the reaction surface, the rare earth metal atoms can react with oxygen (if present) before the carbide-forming metal atoms can reach the reaction surface. Accordingly, the carbide-forming metal atoms which reach the reaction surface may react with carbon of the carbon-containing layer (instead of oxygen), so that the metal carbide layer may be properly formed. When the amount of rare earth metal atoms in the solder layer is too small, not all of the oxygen can be bound by the rare earth metal. In this case, the formed metal carbide layer may be partially oxidized.

According to one embodiment, the solder layer comprises residual portions of the carbide-forming metal after forming the metal carbide layer. The carbide-forming metal of the solder layer can not be used completely to form the metal carbide layer, so that residual parts of the carbide-forming metal can remain in the solder layer. For example, the entire carbonaceous layer may have been used to form the metal carbide layer so that excess carbide-forming metal in the solder layer can not react further due to the carbon deficiency.

In one embodiment, a thickness of the carbonaceous layer is in the range of 1 nanometer to 10 micrometers prior to forming the metal carbide layer. In particular, the thickness may range from 10 nanometers to 10 micrometers, more specifically from 100 nanometers to 10 micrometers, more specifically from 1 micrometer to 10 micrometers. The thickness of the carbonaceous layer may depend on the method used to form the layer. In particular, the thickness of the carbonaceous layer may be adjusted by varying the laser dose in a laser process or the spark erosion performance in a spark erosion process.

In one embodiment, the silicon carbide layer is part of a silicon carbide wafer.

list of figures

• 1 veranschaulicht schematisch eine Querschnittsseitenansicht einer Halbleitervorrichtung 100 gemäß der Offenbarung.
• 2 enthält die 2A bis 2C, die schematisch eine Querschnittsseitenansicht eines Verfahrens zum Herstellen einer Halbleitervorrichtung 200 gemäß der Offenbarung zeigen.
• 3 enthält die 3A bis 3J, die schematisch eine Querschnittsseitenansicht eines Verfahrens zum Herstellen von Siliziumcarbidvorrichtungen 300 gemäß der Offenbarung zeigen.
• 4 enthält die 4A bis 4F, die schematisch eine Querschnittsseitenansicht eines Verfahrens zum Herstellen von Siliziumcarbidvorrichtungen 400 gemäß der Offenbarung zeigen.
• 5 enthält die 5A bis 51, die schematisch eine Querschnittsseitenansicht eines Verfahrens zum Herstellen von Siliziumcarbidvorrichtungen 500 gemäß der Offenbarung zeigen.
• 6 veranschaulicht ein Flussdiagramm eines Verfahrens zum Herstellen einer Halbleitervorrichtung gemäß der Offenbarung.

The accompanying drawings are included to provide a further understanding of aspects, and are incorporated in and constitute a part of this specification. The drawings illustrate aspects and, together with the description, serve to explain principles of aspects. Other aspects and many of the intended advantages of aspects will be readily appreciated as they become better understood by reference to the following detailed description. The elements of the drawings are not necessarily to scale. Like reference numerals may designate corresponding like parts.

• 1 schematically illustrates a cross-sectional side view of a semiconductor device 100 according to the disclosure.
• 2 contains the 2A to 2C 12 schematically illustrates a cross-sectional side view of a method of manufacturing a semiconductor device 200 according to the disclosure show.
• 3 contains the 3A to 3J 12 schematically shows a cross-sectional side view of a method for producing silicon carbide devices 300 according to the disclosure show.
• 4 contains the 4A to 4F 12 schematically shows a cross-sectional side view of a method for producing silicon carbide devices 400 according to the disclosure show.
• 5 contains the 5A to 51 12 schematically shows a cross-sectional side view of a method for producing silicon carbide devices 500 according to the disclosure show.
• 6 FIG. 12 illustrates a flowchart of a method of manufacturing a semiconductor device according to the disclosure.

DETAILED DESCRIPTION OF THE DRAWINGS

In the following detailed description, reference is made to the accompanying drawings, which show, by way of illustration, specific aspects in which the disclosure may be practiced. In this regard, directional terminology such as "top,""bottom,""front,""rear," etc. may be used with respect to the orientation of the figures to be described. Because the components of the described devices may be positioned in a number of different orientations, the directional terminology may be used for purposes of illustration and is in no way limiting. Other aspects may be utilized and structural or logical changes may be made without departing from the concept of the present disclosure. Therefore, the following detailed description is not to be understood in a limiting sense, and the concept of The present disclosure is defined by the appended claims.

1 schematically illustrates a cross-sectional side view of a semiconductor device 100 according to the disclosure. The semiconductor device 100 is presented in a general way to qualitatively specify aspects of the disclosure. The semiconductor device 100 may contain other components that are not shown for the sake of simplicity. For example, the semiconductor device 100 be extended by each of the aspects described in connection with other devices according to the disclosure.

The semiconductor device 100 contains a silicon carbide layer 2 and a metal carbide layer 4 on the silicon carbide layer 2 is arranged. In one example, the metal carbide layer 4 directly on the silicon carbide layer 2 be arranged. In another example, a carbonaceous layer (not shown) may be interposed between the silicon carbide layer 2 and the metal carbide layer 4 be arranged. The semiconductor device 100 also contains a solder layer 6 which directly on the metal carbide layer 4 is arranged.

2 contains the 2A to 2C 12 schematically illustrates a cross-sectional side view of a method of manufacturing a semiconductor device 200 according to the disclosure show. The manufactured semiconductor device 200 may be the semiconductor device 100 of the 1 be similar to. The procedure of 2 is presented in a general way to qualitatively specify aspects of the disclosure. The method may include other aspects that are not shown for the sake of simplicity. For example, the method may be extended to any of the aspects described in connection with other methods in accordance with the disclosure.

In 2A becomes a carbon-containing layer 8th on a silicon carbide layer 2 educated. For example, the carbonaceous layer may 8th a graphite layer formed by a laser annealing process (laser annealing) or by a spark erosion process.

In 2 B becomes a solder layer 6 on the carbonaceous layer 8th educated. The solder layer 6 contains a carbide-forming metal 10 ,

In 2C becomes a metal carbide layer 4 between the carbonaceous layer 8th and the solder layer 6 educated. The metal carbide layer 4 is made of the carbide-forming metal 10 the solder layer 6 and the carbon of the carbon-containing metal. In one example, the carbon-comprising layer 8th partially for forming the metal carbide layer 4 be used so that part of the carbonaceous layer 8th between the silicon carbide layer 2 and the metal carbide layer 4 can remain (see, eg 2C ). In another example, the carbonaceous layer may 8th completely for forming the metal carbide layer 4 be used so that the metal carbide layer 4 in direct contact with the silicon carbide layer 2 can stand (see eg 1 ).

3 contains the 3A to 3J 12 schematically shows a cross-sectional side view of a method for producing silicon carbide devices 300 according to the disclosure show. The manufactured silicon carbide devices 300 can be considered as a more detailed implementation of the semiconductor device 100 of the 1 be considered. Additionally, the procedure of the 3 as a more detailed implementation of the method of 2 be considered.

In 3A may be a silicon carbide wafer 12 provided with a silicon carbide layer. In one example, the silicon carbide wafer 12 a silicon carbide diode wafer, ie, a wafer in which a plurality of diode structures may be formed. A laser process can be on the front 14 of the silicon carbide wafer 12 be applied to carbonaceous layers, in particular graphite layers 16A to train. In the example of 3A can the graphite layers 16A by a laser annealing process by applying laser light of a laser 18 be formed. In another example, the graphite layers 16A be formed by a spark erosion process. For example, any of the graphite layers 16A over one of the diode structures in the silicon carbide wafer 12 be arranged. The graphite layers 16A may form front side contacts of diode chips made of the silicon carbide wafer 12 to be produced.

In 3B may be a similar laser process or a spark erosion process on the back side 20 of the silicon carbide wafer 12 be applied to a carbonaceous layer, in particular a graphite layer 16B to train. In one example, the graphite layer 16B the entire back 20 of the silicon carbide wafer 12 cover. The graphite layer 16B can later form backside contacts of diode chips made of the silicon carbide wafer 12 to be produced.

In 3C may be the silicon carbide wafer 12 on a metal component 22A be attached. In the example of 3C For example, the metal component may be a carrier film 22A be, which may be made of copper, for example. In particular, the graphite layer 16B over a layer of solder 6A to the carrier film 22A be soldered. In the example of 3C can the solder layer 6A contain an active tin-silver solder alloy. In addition, the solder layer 6A a carbide-forming metal and a rare earth metal. In particular, the carbide-forming metal may be titanium and the rare earth metal may be cerium. By forming the solder contact, at least partially, a titanium carbide layer 24A between the graphite layer 16B and the solder layer 6A be formed. The titanium carbide layer 24A can be made of the titanium of the solder layer 6A and carbon of the graphite layer 16B be formed. It should be noted that part of the titanium carbide layer 24A can be formed before the soldering process, when the solder layer 6A on the graphite layer 16B is applied. The cerium of the solder layer 6A may be adapted to be during the soldering process and / or during the application of the solder layer 6A on the graphite layer 16B reacts with (ambient) oxygen, causing oxidation of the titanium carbide layer 24A can be avoided.

In 3D may be a spark erosion process (micro electrical discharge machining process) (or micro spark erosion process) on the carrier film 22A , the solder layer 6A and the titanium carbide layer 24A be applied. In this context, a sinking electrode 26 with a comb-like structure and multiple sub-electrodes. During the process, the sinking electrode 26 in the direction of the Siliziumcarbidwafers 12 be moved (see arrows), with material of the carrier film 22A , the solder layer 6A and the titanium carbide layer 24A can be eroded at the positions of the sub-electrodes. The sub-electrodes of the sinking electrode 26 may be arranged in particular at the positions at which later a plurality of silicon carbide devices of the silicon carbide wafer 12 be separated. The spark erosion process can be performed in a polar (dielectric) liquid. As an alternative to the spark erosion process, the carrier foil 22A , the solder layer 6A and the titanium carbide layer 24A by using a wet chemical etching process or a laser dicing process.

In 3E can the spark erosion process in the graphite layer 16B being stopped. For example, the spark erosion performance may be selected to be the material of the graphite layer 16B through the sinking electrode 26 not eroded.

In 3F can make more solder layers 6B on the graphite layers 16A on the front side 14 of the silicon carbide wafer 12 be applied. The solder layers 6B may contain an active tin-silver solder alloy. In addition, the solder layers 6B carbide-forming titanium and the rare earth metal cerium.

In 3G can be a metal component 22B on the silicon carbide wafer 12 be attached. In particular, the metal component 22B over the solder layers 6B to the graphite layers 16A be soldered. In the example of 3G the metal component may be a metal foil 22B be, which may be made of copper, for example. Similar in the 3C can more titanium carbide layers 24B between the solder layers 6B and the graphite layers 16A be formed. The titanium carbide layers 24B can be made of the titanium of the solder layers 6B and carbon of the graphite layers 16A be formed. It should be noted that the titanium carbide layers 24B may have been at least partially formed when the solder layers 6B on the graphite layers 16A in the 3F were applied.

In 3H can the arrangement of 3G optional on a tape & frame (tape & frame) 28 be mounted. Additionally, a micro electrical discharge machining process (or micro spark erosion process) can be applied to the metal foil 22B be applied. Similar in the 3E can be a sinking electrode 26 with a comb-like structure and multiple sub-electrodes. The material of the metal foil 22B can be eroded at the locations of the sub-electrodes. The sub-electrodes can move completely through the metal foil 22B move (see arrows). The spark erosion process can be performed in a polar (dielectric) liquid. As an alternative to the spark erosion process, the metal foil 22B by using a wet chemical etching process or a laser cutting process.

In 31 may be the silicon carbide wafer 12 into several silicon carbide devices. In particular, dicing may be performed by the silicon carbide wafer 12 be carried out (see arrows). In this connection, a plasma dicing process, a mechanical ultrasonic dicing process, a laser dicing process, or a combined process of, for example, a laser annealing process and a plasma dicing process may be used. A plasma dicing process may include a plasma etching process using high plasma energy FCI ₃ , Ar, O ₂ , and / or CF ₆ plasma and chamber pressure.

In 3J can the separation process of 3I be finished. Several separate silicon carbide devices 300 Can on the band & frame 28 be arranged. In the non-limiting example of 3J are three silicon carbide devices 300 shown. In other examples, the number of silicon carbide devices produced 300 be arbitrary and different from the example of 3J differ.

4 contains the 4A to 4F 12 schematically shows a cross-sectional side view of a method for producing silicon carbide devices 400 according to the disclosure show. The manufactured silicon carbide devices 400 can be considered as a more detailed implementation of the semiconductor device 100 of the 1 be considered. Additionally, the procedure of the 4 as a more detailed implementation of the method of 2 be considered.

In 4A Can a laser process on the front 14 a silicon carbide wafer 12 be applied to graphite layers 16A train. The plot of the 4A can be similar to the plot of the 3A be.

In 4B may be the silicon carbide wafer 12 on a temporary carrier 30 to be assembled. In an optional step, the back can be 20 of the silicon carbide wafer 12 to be thinned. In addition, a laser process similar to the 4A on the back 20 of the silicon carbide wafer 12 be applied to graphite layers 16B train. In the example of 4B can the graphite layers 16B on the back side 20 of the silicon carbide wafer 12 to the graphite layers 16A on the front side 14 of the silicon carbide wafer 12 be aligned.

In 4C may be the silicon carbide wafer 12 on a band & frame 28 to be assembled. Furthermore, the temporary carrier 30 from the silicon carbide wafer 12 be removed (see arrows).

In 4D may be the silicon carbide wafer 12 into several silicon carbide chips (or dies) 32 be separated. In one example, the silicon carbide chips 32 Be silicon carbide diode chips. The singling process of 4D can do that in conjunction with the 31 be similar to the described singulation process. Each of the separate silicon carbide chips 32 may have a contact on its front side and a contact on its back side, formed by the graphite layers 16A respectively. 16B , The separate silicon carbide chip 32 can be delivered to the backend.

In 4E can be a silicon carbide chip 32 on a ladder frame 34 be attached, which may be made of copper, for example. In particular, the graphite layer 16B over a layer of solder 6A to the ladder frame 34 be soldered. The solder layer 6A may contain an active tin-silver solder alloy. In addition, the solder layer 6A carbide-forming titanium and the rare earth metal cerium. During the soldering process, a titanium carbide layer 24A between the solder layer 6A and the graphite layer 16B be formed. The titanium carbide layer 24A can be made of the titanium of the solder layer 6A and carbon of the graphite layer 16B be formed.

In 4F can use more silicon carbide chips 32 similar to the 4E on the ladder frame 34 be attached. In addition, a clip 36 at the front of a silicon carbide chip 32 be attached. In particular, the clip 36 over a layer of solder 6B to the graphite layer 16A be soldered. Similar to 4E can be another titanium carbide layer 24B between the solder layer 6B and the graphite layer 16A be formed. The titanium carbide layer 24B can be made of titanium of the solder layer 6B and carbon of the graphite layer 16A be formed. Other clips (not shown) may be attached to the further silicon carbide chip 32 be mounted in a similar manner, so that several Siliziumcarbidvorrichtungen 400 can be provided.

5 contains the 5A to 51 12 schematically shows a cross-sectional side view of a method for producing silicon carbide devices 500 according to the disclosure show. The manufactured silicon carbide devices 500 can be considered as a more detailed implementation of the semiconductor device 100 of the 1 be considered. Additionally, the procedure of the 5 as a more detailed implementation of the method of 2 be considered.

The 5A to 5C show actions that are the actions of the 4A to 4C may be similar.

In 5D may be the processed silicon carbide wafer 12 be transported to the backend.

In 5E can be a metal component 34A on the front side 14 of the silicon carbide wafer 12 be attached. In the example of 5E The metal component may be a lead frame 34A be, which may be made of copper, for example. In particular, the lead frame 34A over solder layers 6A to the graphite layers 16A be soldered. The solder layers 6A may contain an active tin-silver solder alloy. In addition, the solder layers 6A carbide-forming titanium and the rare earth metal cerium. The titanium carbide layers 24A can be between the solder layers 6A and the graphite layers 16A from the titanium of the solder layers 6A and carbon of the graphite layers 16A be formed.

In 5F can be a metal component 34B at the back 20 of the silicon carbide wafer 12 be attached. In the example of 5F The metal component may be a lead frame 34B be, which may be made of copper, for example. A soldering process in the 5F can be used, the soldering process of 5E be similar to.

In 5G can the ladder frame 34A be structured by applying a sawing process, a wet etching process or a spark erosion process. The plot of the 5G can the plot of the 3H be similar to.

In 5H may be the silicon carbide wafer 12 into several silicon carbide devices. The plot of the 5H can the plot of the 31 be similar to.

In 51 can the die-separation process of 5H to be ended. Several separate silicon carbide devices 500 can on the lead frame 34B be arranged. In the non-limiting example of 51 are three silicon carbide devices 500 shown. In other examples, the number of silicon carbide devices produced 500 be arbitrary and different from the example of 5I differ.

6 FIG. 12 illustrates a flowchart of a method of manufacturing a semiconductor device according to the disclosure. The method may be the method of 2 be similar to.

at 38 For example, a carbonaceous layer is formed on a silicon carbide layer. at 40 For example, a solder layer is formed on the carbon-containing layer, the solder layer containing a carbide-forming metal. at 42 For example, a metal carbide layer is formed between the carbon-containing layer and the solder layer, wherein the metal carbide layer is formed of the carbide-forming metal of the solder layer and the carbon of the carbon-containing layer.

As used in this specification, the terms "connected," "coupled," "electrically connected," and / or "electrically coupled" may not necessarily mean that elements must be directly connected or coupled together. Intermediate elements may be provided between the "connected", "coupled", "electrically connected" or "electrically coupled" elements.

Further, the word "over" used with respect to e.g. a material layer formed or disposed "above" a surface of an article may be used herein to mean that the material layer is "directly on," e.g. in direct contact with the implied surface (e.g., formed, deposited, etc.). The word "over" may be used in reference to e.g. a material layer formed or disposed "above" a surface may also be used herein to mean that the material layer is disposed "on indirectly" of the implied surface (e.g., formed, deposited, etc.) with e.g. one or more additional layers disposed between the implied surface and the material layer.

To the extent that the terms "having," "including," "including," "having," or variants thereof are used either in the detailed description or in the claims, these terms are intended to be in a similar manner to the term "comprising." be inclusive. That is, as used herein, the terms "have," "include," "including," "with," "include," and the like, open-ended terms that indicate the presence of specified elements or features, but additional elements or features Do not exclude functions. The articles "a", "an" and "the" are intended to include both the plural and the singular, unless the context clearly indicates otherwise.

In addition, the word "exemplary" is used herein to serve as an example, instance or illustration. Any aspect or design described herein as "exemplary" need not necessarily be interpreted as advantageous over other aspects or designs. Rather, the use of the word "exemplary" should concretely represent concepts. As used in this application, the term "or" is intended to mean an inclusive "or" rather than an exclusive "or". That is, unless otherwise stated or understood from the context, "X uses A or B" shall mean any of the natural enclosing permutations. That is, if X uses A; X B used; or X uses both A and B, then "X uses A or B" is satisfied in each of the above cases. In addition, the articles "a" and "an" as used in this application and the appended claims may be generically referred to as "one or more", unless otherwise stated or clearly understood, to a singular form to be. In addition, at least one of A and B or the like generally means A or B or both A and B.

Devices and methods for making devices are described herein. Comments made in connection with a described device may also apply to a corresponding method and vice versa. For example, when describing a specific component of a device, a corresponding method of manufacturing the device may include an act of providing the component in a suitable manner, even if such an action is not explicitly described or illustrated in the figures. In addition, the features of the various exemplary aspects described herein may be combined with each other unless specifically stated otherwise.

Although the disclosure has been shown and described with respect to one or more implementations, equivalent changes and modifications will occur to those skilled in the art, based, at least in part, on reading and understanding this specification and the accompanying drawings. The disclosure includes all such modifications and alterations, and is limited only by the concept of the following claims. In particular, with regard to the various functions performed by the above-described components (eg, elements, resources, etc.), the terms used to describe such components, unless otherwise indicated, are intended to correspond to any component having the specified function of those described Component (which, for example, is functionally equivalent), although not structurally equivalent to the disclosed structure, which performs the function in the exemplary implementations of the disclosure set forth herein. While a particular feature of the disclosure may be disclosed with respect to only one of several implementations, such feature may also be combined with one or more other features of the other implementations, as may be desired and advantageous for any given or particular application.

LIST OF REFERENCE NUMBERS

2

silicon carbide

4

metal carbide

6

solder layer

8th

carbon-containing layer

10

carbide-forming metal

12

silicon carbide wafer

14

Wafer front

16

graphite layer

18

laser

20

Wafer backside

22

support film

24

titanium carbide

26

sinking electrode

28

Band & frame

30

temporary carrier

32

Siliziumcarbidchip

34

leadframe

36

clip

100

Semiconductor device

200

Semiconductor device

300

Siliziumcarbidvorrichtung

400

Siliziumcarbidvorrichtung

500

Siliziumcarbidvorrichtung

Claims (20)

A semiconductor device, comprising: a silicon carbide layer; a metal carbide layer disposed on the silicon carbide layer; and a solder layer disposed directly on the metal carbide layer. Semiconductor device according to Claim 1 , further comprising: a carbonaceous layer disposed between the silicon carbide layer and the metal carbide layer, wherein the carbonaceous layer is in direct contact with the silicon carbide layer and in direct contact with the metal carbide layer. Semiconductor device according to Claim 1 wherein the metal carbide layer is disposed directly on the silicon carbide layer. A semiconductor device according to any one of the preceding claims, wherein the carbonaceous layer has a graphite crystal structure or a graphitic crystal structure. A semiconductor device according to any one of the preceding claims, wherein the metal carbide layer comprises at least one of titanium carbide, nickel carbide, tungsten carbide, vanadium carbide. A semiconductor device according to any one of the preceding claims, wherein the solder layer comprises a carbide-forming metal corresponding to the metal of the metal carbide layer. A semiconductor device according to any one of the preceding claims, wherein a thickness of the metal carbide layer is in a range of 50 nanometers to 1 micrometer. Semiconductor device according to one of the preceding claims, further comprising: an ohmic contact formed between the silicon carbide layer and the carbonaceous layer or between the silicon carbide layer and the metal carbide layer. The semiconductor device according to claim 1, further comprising: a solder contact formed between the solder layer and a metal component, wherein the metal component has at least one of Includes lead frame, a die pad, a connecting conductor, a clip, a metal foil. A semiconductor device according to any one of the preceding claims, wherein the semiconductor device comprises a silicon carbide diode or a silicon carbide transistor. Method, comprising: Forming a carbonaceous layer on a silicon carbide layer; Forming a solder layer on the carbonaceous layer, the solder layer comprising a carbide-forming metal; and Forming a metal carbide layer between the carbon-comprising layer and the solder layer, wherein the metal carbide layer is formed of the carbide-forming metal of the solder layer and carbon of the carbon-containing layer. Method according to Claim 11 , further comprising: forming a solder contact between the solder layer and a metal component. Method according to Claim 12 wherein the metal carbide layer is formed at least partially by forming the solder contact. Method according to one of Claims 11 to 13 wherein the metal carbide layer is formed at least partially by forming the solder layer on the carbonaceous layer. Method according to one of Claims 11 to 14 wherein forming the carbonaceous layer comprises applying a laser process or a spark erosion process to the silicon carbide layer. Method according to one of Claims 11 to 15 wherein forming the carbonaceous layer comprises: vaporizing silicon atoms from the silicon carbide layer. Method according to one of Claims 11 to 16 wherein the solder layer comprises a rare earth metal before the metal carbide layer is formed. Method according to one of Claims 11 to 17 wherein the solder layer comprises residual portions of the carbide-forming metal after forming the metal carbide layer. Method according to one of Claims 11 to 18 wherein a thickness of the carbonaceous layer before forming the metal carbide layer is in a range of 1 nanometer to 10 micrometers. Method according to one of Claims 11 to 19 wherein the silicon carbide layer is part of a silicon carbide wafer.

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