DE102010063021A1 - Electronic assembly with improved sintered connection - Google Patents
Electronic assembly with improved sintered connection Download PDFInfo
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- DE102010063021A1 DE102010063021A1 DE102010063021A DE102010063021A DE102010063021A1 DE 102010063021 A1 DE102010063021 A1 DE 102010063021A1 DE 102010063021 A DE102010063021 A DE 102010063021A DE 102010063021 A DE102010063021 A DE 102010063021A DE 102010063021 A1 DE102010063021 A1 DE 102010063021A1
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- sintered
- recesses
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Abstract
Die vorliegende Erfindung betrifft eine elektronische Baugruppe, umfassend ein Basisteil (2), insbesondere ein Substrat, wenigstens ein elektronisches Bauelement (3), insbesondere einen Chip, welches auf dem Basisteil (2) angeordnet ist, und eine Sinterverbindung (4), welche das elektronische Bauelement (3) mit dem Basisteil (2) verbindet, wobei die Sinterverbindung (4) flächig zwischen dem Basisteil (2) und dem elektronischen Bauelement (3) ausgebildet ist, und wobei eine Bauelementkante (3) zumindest teilweise frei von der Sinterverbindung (4) ist.The present invention relates to an electronic assembly comprising a base part (2), in particular a substrate, at least one electronic component (3), in particular a chip, which is arranged on the base part (2), and a sintered connection (4), which connects the electronic component (3) to the base part (2), the sintered connection (4) being flat between the base part (2) and the electronic component (3), and wherein a component edge (3) is at least partially free of the sintered connection ( 4) is.
Description
Stand der TechnikState of the art
Die vorliegende Erfindung betrifft eine elektronische Baugruppe mit einer verbesserten Sinterverbindung zwischen einem Basisteil, z. B. einem Substrat, und einem elektronischen Bauelement, z. B. einem Chip.The present invention relates to an electronic assembly having an improved sintered connection between a base part, e.g. As a substrate, and an electronic component, for. B. a chip.
Elektronische Baugruppen werden im Stand der Technik in vielfältigen Ausgestaltungen auf verschiedenste Einsatzzwecke verwendet. Hierbei müssen verschiedenste elektronische Bauelemente auf einem Basisteil, z. B. Substrat. oder Ähnlichem, fixiert werden. Hierbei ist es bekannt, dass die elektronischen Bauelemente beispielsweise mittels Löten am Substrat fixiert werden. Es ist ferner bekannt, elektronische Bauelemente mittels einer Sinterverbindung auf einem Substrat zu befestigen. Hierbei schlägt die
Offenbarung der ErfindungDisclosure of the invention
Die erfindungsgemäße elektronische Baugruppe mit den Merkmalen des Anspruchs 1 weist demgegenüber den Vorteil auf, dass eine Zuverlässigkeit und Lebensdauer der Baugruppe mit einem Basisteil, z. B. einem Substrat, und daran angesinterten elektronischen Bauelementen signifikant gesteigert werden kann. Erfindungsgemäß werden die auf das elektronische Bauelement wirkenden mechanischen Spannungsspitzen durch eine geometrische Veränderung an der Fügestelle zwischen der Sinterverbindung und dem elektronischen Bauelement verringert. Dies wird erfindungsgemäß dadurch erreicht, dass eine Bauelementkante zumindest teilweise frei von der Sinterverbindung verbleibt. Durch diese Maßnahme kann eine deutlich verbesserte Temperaturwechselbeständigkeit der elektronischen Baugruppe erreicht werden. Das zumindest teilweise Freilassen der Bauelementkante von dem Sintermaterial ermöglicht einen geometrisch sanften Übergang von der Sinterschicht auf das elektronische Bauelement. Ebenfalls wird ein sanfter Übergang zwischen Sinterverbindung und dem Basisteil erreicht. Lokale Spannungsspitzen, welche eine Bruchspannung des elektronischen Bauelements überschreiten würden, werden verringert, indem sie über einen größeren Flächenbereich verteilt werden.The electronic assembly according to the invention with the features of
Die Unteransprüche zeigen bevorzugte Weiterbildungen der Erfindung.The dependent claims show preferred developments of the invention.
Vorzugsweise umfasst die Sinterverbindung einen Randbereich mit einer Vielzahl von Ausnehmungen, welche zu einer Außenseite der Sinterverbindung offen gestaltet sind. Hierdurch wird eine Randkontaktzone zwischen der Sinterverbindung und dem elektronischen Bauelement und/oder dem elektronischen Basisteil deutlich vergrößert. Die Sinterverbindung weist dabei eine Briefmarkenform auf.Preferably, the sintered connection comprises an edge region with a plurality of recesses which are designed to be open to an outside of the sintered connection. As a result, an edge contact zone between the sintered connection and the electronic component and / or the electronic base part is significantly increased. The sintered compound has a stamp form.
Alternativ umfasst die Sinterverbindung eine Vielzahl von umlaufend geschlossenen Ausnehmungen, welche mit einem Randabstand entlang eines Randbereichs der Sinterverbindung vorgesehen sind.Alternatively, the sintered connection comprises a plurality of circumferentially closed recesses, which are provided with an edge distance along an edge region of the sintered connection.
Die offenen oder geschlossenen Ausnehmungen in der Sinterverbindung sind vorzugsweise gleichmäßig entlang des gesamten Randumfangs der Sinterverbindung vorgesehen. Eine Form der offenen und/oder geschlossenen Ausnehmungen ist dabei vorzugsweise halbkreisförmig bzw. kreisförmig. Alternativ kann die Form auch halbovalförmig oder ovalförmig oder rechteckig oder dreieckig sein.The open or closed recesses in the sintered connection are preferably provided uniformly along the entire edge circumference of the sintered connection. A form of the open and / or closed recesses is preferably semicircular or circular. Alternatively, the shape may also be semi-oval or oval-shaped or rectangular or triangular.
Besonders bevorzugt weisen jeweils benachbarte Ausnehmungen einen Abstand von 50 bis 300 μm, vorzugsweise 100 bis 250 μm, besonders bevorzugt 150 bis 200 μm und weiter bevorzugt ca. 175 μm auf.Particularly preferably, adjacent recesses each have a spacing of 50 to 300 .mu.m, preferably 100 to 250 .mu.m, more preferably 150 to 200 .mu.m and more preferably about 175 .mu.m.
Wenn die Ausnehmungen halbkreisförmig bzw. kreisförmig sind, weisen die Ausnehmungen vorzugsweise einen Durchmesser von ca. 300 bis 700 μm, vorzugsweise 400 bis 600 μm und besonders bevorzugt ca. 500 μm auf.If the recesses are semicircular or circular, the recesses preferably have a diameter of about 300 to 700 .mu.m, preferably 400 to 600 .mu.m and more preferably about 500 microns.
Gemäß einer weiteren bevorzugten Ausgestaltung der Erfindung ist die Bauelementkante vollständig frei von der Sinterverbindung. D. h., die Sinterverbindung reicht nicht bis zur Bauelementkante, sondern endet mit einem gewissen Abstand davor. Der Abstand zur Bauelementkante ist dabei vorzugsweise gleich einem Maß der Ausnehmungen in der Sinterverbindung, z. B. dem Durchmesser.According to a further preferred embodiment of the invention, the component edge is completely free of the sintered connection. In other words, the sintered connection does not reach the component edge, but ends at a certain distance in front of it. The distance to the component edge is preferably equal to a measure of the recesses in the sintered connection, for. B. the diameter.
Gemäß einem weiteren bevorzugten Ausführungsbeispiel der Erfindung weist die Sinterverbindung am Randbereich einen umlaufenden, an der zum Bauelement gerichteten Seite der Sinterverbindung vorgesehenen Rücksprung auf. Der Rücksprung stellt dabei sicher, dass die Sinterverbindung nicht mit der Bauelementkante in Kontakt kommt. Diese Ausführungsform ist dabei sehr einfach und kostengünstig herstellbar. According to a further preferred embodiment of the invention, the sintered connection at the edge region on a circumferential, provided on the side facing the component of the sintered connection on the return. The return ensures that the sintered connection does not come into contact with the component edge. This embodiment is very simple and inexpensive to produce.
Der Rücksprung weist dabei vorzugsweise eine Länge von der Außenkante nach innen auf, welche gleich oder größer als eine Höhe der Sinterverbindung ist und/oder welche gleich oder kleiner als eine Dicke der Sinterverbindung ist. Besonders bevorzugt beträgt der Rücksprung dabei ca. 100 μm.The recess preferably has a length from the outer edge to the inside, which is equal to or greater than a height of the sintered connection and / or which is equal to or smaller than a thickness of the sintered connection. Particularly preferably, the return is about 100 microns.
Gemäß einer weiteren bevorzugten Alternative der Erfindung ist im Basisteil wenigstens eine Ausnehmung vorgesehen, wobei die Sinterverbindung bis an einen Rand der Ausnehmung heranreicht und das elektronische Bauelement über die Sinterverbindung vorsteht. Hierdurch kann insbesondere die Sinterverbindung einfach und flächig ohne Ausnehmung vorgesehen werden und trotzdem eine reduzierte Spannungseinleitung bei Temperaturänderungen am elektronischen Bauelement erreicht werden. Dabei ist vorzugsweise eine Bauelementkante des elektronischen Bauelements derart angeordnet, dass die Bauelementkante über der Ausnehmung im Basisteil angeordnet ist. Vorzugsweise sind im Basisteil eine Vielzahl von Ausnehmungen angeordnet, welche benachbart zueinander entsprechend der Form des Bauelements angeordnet sind. Die Vielzahl der Ausnehmungen bilden somit ungefähr eine Projektion des elektronischen Bauelements auf dem Basisteil. Die Form der Ausnehmungen kann dabei kreisförmig, halbkreisförmig, oval, halboval oder viereckig sein. Alternativ könnten auch beispielsweise bei einem viereckigen elektronischen Bauelement vier Gräben entlang den Bauteilkanten vorgesehen sein oder alternativ ein komplett umlaufender Graben im Basisteil vorgesehen sein.According to a further preferred alternative of the invention, at least one recess is provided in the base part, wherein the sintered connection extends up to an edge of the recess and the electronic component projects beyond the sintered connection. As a result, in particular the sintered connection can be provided simply and flatly without a recess, and nevertheless a reduced voltage introduction can be achieved with temperature changes at the electronic component. In this case, a component edge of the electronic component is preferably arranged such that the component edge is arranged above the recess in the base part. Preferably, a plurality of recesses are arranged in the base part, which are arranged adjacent to each other according to the shape of the component. The plurality of recesses thus form approximately a projection of the electronic component on the base part. The shape of the recesses may be circular, semicircular, oval, semi-oval or quadrangular. Alternatively, four trenches could for example also be provided along the component edges in the case of a quadrangular electronic component, or alternatively a completely circumferential trench could be provided in the base part.
Gemäß einer weiteren bevorzugten Ausgestaltung der vorliegenden Erfindung umfasst die Sinterverbindung zusätzlich ein flächiges Zwischenelement, welches elektrisch und thermisch sehr gut leitende Eigenschaften aufweist, wobei Sintermaterial zu beiden Seiten des flächen Zwischenelements vorgesehen ist. Das flächige Zwischenelement ist beispielsweise eine Metallfolie, insbesondere eine Silberfolie. Besonders bevorzugt weist das flächige Zwischenelement einen Randbereich mit offenen Ausnehmungen auf (Briefmarkenform) und/oder das Zwischenelement umfasst eine Vielzahl von umlaufend geschlossenen Ausnehmungen, welche mit etwas Abstand zum Randbereich des Zwischenelements angeordnet sind.According to a further preferred embodiment of the present invention, the sintered compound additionally comprises a planar intermediate element, which has very good electrically and thermally conductive properties, wherein sintered material is provided on both sides of the surface intermediate element. The planar intermediate element is, for example, a metal foil, in particular a silver foil. Particularly preferably, the two-dimensional intermediate element has an edge region with open recesses (stamp shape) and / or the intermediate element comprises a multiplicity of peripherally closed recesses which are arranged at some distance from the edge region of the intermediate element.
Weiter bevorzugt umfasst die Sinterverbindung Silber. Das Ausgangsmaterial für die Sinterverbindung ist vorzugsweise eine Paste, welche Metallkolloide sowie stabilisierende Bestandteile aufweist. Die stabilisierenden Bestandteile werden dann unter Temperaturbeaufschlagung ausgebrannt, so dass die Metallkolloide untereinander und mit dem Material der angrenzenden Fügepartner in direkten Kontakt kommen. Das Material der Fügepartner ist einerseits vorzugsweise ein Bauelement, z. B. Silizium, und das Material des anderen Fügepartners ist vorzugsweise ein Metall, insbesondere Kupfer bzw. Cu-Legierungen.More preferably, the sintered compound comprises silver. The starting material for the sintered compound is preferably a paste comprising metal colloids and stabilizing components. The stabilizing constituents are then burned out with application of temperature, so that the metal colloids come into direct contact with one another and with the material of the adjacent joining partners. The material of the joining partner is on the one hand preferably a component, for. As silicon, and the material of the other joining partner is preferably a metal, in particular copper or copper alloys.
Erfindungsgemäß wird somit verhindert, dass eine Sinterverbindung entlang eines gesamten Umfangs einer Bauelementkante eines elektronischen Bauteils verläuft. Hierbei kann die Sinterverbindung beispielsweise eine Briefmarkenstruktur als Randbereich aufweisen oder eine Lochstruktur nahe dem Randbereich, wobei die Bauelementkante über der Lochstruktur liegt. Weiter alternativ kann ein Rücksprung in der Sinterverbindung zum elektronischen Bauelement vorgesehen sein.According to the invention, it is thus prevented that a sintered connection runs along an entire circumference of a component edge of an electronic component. In this case, the sintered connection can have, for example, a stamp structure as an edge region or a hole structure near the edge region, wherein the component edge lies above the hole structure. Further alternatively, a return can be provided in the sintered connection to the electronic component.
Die Erfindung kann bei allen elektronischen Baugruppen eingesetzt werden, welche elektronische Bauelemente auf einem Basisteil mittels Sinterverbindungen fixieren. Ein Einsatzbeispiel ist beispielsweise eine Gleichrichterdiode, bei der ein Siliziumchip auf einem Kupfersubstrat mittels Sinterverbindung fixiert wird. Als Basisteil kann neben Substraten auch ein Stanzgitter verwendet werden.The invention can be used in all electronic assemblies which fix electronic components on a base part by means of sintered connections. An application example is, for example, a rectifier diode, in which a silicon chip is fixed on a copper substrate by means of sintering. As a base part, in addition to substrates and a stamped grid can be used.
Zeichnungendrawings
Nachfolgend werden bevorzugte Ausführungsbeispiele der Erfindung unter Bezugnahme auf die begleitende Zeichnung im Detail beschrieben. In der Zeichnung ist:Hereinafter, preferred embodiments of the invention will be described in detail with reference to the accompanying drawings. In the drawing is:
Bevorzugte Ausführungsformen der ErfindungPreferred embodiments of the invention
Nachfolgend wird unter Bezugnahme auf die
Wie aus
Wie weiter aus
Durch die Briefmarkenstruktur des Randbereichs
Es sei angemerkt, dass die Sinterverbindung
Nachfolgend wird unter Bezugnahme auf die
Wie aus
Die Sinterverbindung
In den
Nachfolgend wird unter Bezugnahme auf die
Im Unterschied zu den vorherigen Ausführungsbeispielen weist die elektronische Baugruppe
Zu allen beschriebenen Ausführungsbeispielen sei angemerkt, dass die Sinterverbindungen
ZITATE ENTHALTEN IN DER BESCHREIBUNG QUOTES INCLUDE IN THE DESCRIPTION
Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
Zitierte PatentliteraturCited patent literature
- EP 0275433 B1 [0002] EP 0275433 B1 [0002]
Claims (17)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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DE102010063021A DE102010063021A1 (en) | 2010-12-14 | 2010-12-14 | Electronic assembly with improved sintered connection |
PCT/EP2011/069662 WO2012079855A2 (en) | 2010-12-14 | 2011-11-08 | Electronic assembly comprising an improved sinter connection |
EP11788397.5A EP2652784A2 (en) | 2010-12-14 | 2011-11-08 | Electronic assembly comprising an improved sintered connection |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE102010063021A DE102010063021A1 (en) | 2010-12-14 | 2010-12-14 | Electronic assembly with improved sintered connection |
Publications (1)
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DE102010063021A1 true DE102010063021A1 (en) | 2012-06-14 |
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DE102010063021A Withdrawn DE102010063021A1 (en) | 2010-12-14 | 2010-12-14 | Electronic assembly with improved sintered connection |
Country Status (3)
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EP (1) | EP2652784A2 (en) |
DE (1) | DE102010063021A1 (en) |
WO (1) | WO2012079855A2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102014217938A1 (en) | 2014-09-08 | 2016-03-10 | Robert Bosch Gmbh | Electronic component |
EP3618586A1 (en) * | 2018-08-31 | 2020-03-04 | Siemens Aktiengesellschaft | Circuit carrier comprising a mounting place for electronic components, electronic circuit and manufacturing method |
EP3618585A1 (en) * | 2018-08-31 | 2020-03-04 | Siemens Aktiengesellschaft | Circuit carrier comprising a mounting place for electronic components, electronic circuit and manufacturing method |
US11059018B2 (en) | 2018-05-16 | 2021-07-13 | Dresser-Rand Company | Turbomachine chemical reactor and method for cracking hydrocarbons in a process fluid |
US11123702B2 (en) | 2018-09-20 | 2021-09-21 | Dresser-Rand Company | Turbomachine type chemical reactor |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2014129626A1 (en) * | 2013-02-22 | 2014-08-28 | 古河電気工業株式会社 | Connecting structure, and semiconductor device |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3414065C2 (en) * | 1984-04-13 | 1989-07-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen, De | |
EP0275433B1 (en) | 1986-12-22 | 1992-04-01 | Siemens Aktiengesellschaft | Method for mounting electronic components on a substrate, foil to carry out the method and method to produce the foil |
DE10009678C1 (en) * | 2000-02-29 | 2001-07-19 | Siemens Ag | Heat conducting adhesive joint between two workpieces used in the production of electronic components comprises a layer of heat conducting material having two flat sided surfaces with openings on each surface |
US20030041947A1 (en) * | 2001-08-31 | 2003-03-06 | International Business Machines Corporation | Method for sinter distortion control |
DE102009000192A1 (en) * | 2009-01-14 | 2010-07-15 | Robert Bosch Gmbh | Sintered material, sintered compound and method for producing a sintered compound |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IN168174B (en) * | 1986-04-22 | 1991-02-16 | Siemens Ag | |
JP4649027B2 (en) * | 1999-09-28 | 2011-03-09 | 株式会社東芝 | Ceramic circuit board |
JP4969738B2 (en) * | 2001-06-28 | 2012-07-04 | 株式会社東芝 | Ceramic circuit board and semiconductor module using the same |
JP2005093803A (en) * | 2003-09-18 | 2005-04-07 | Toshiba Corp | Ceramic circuit board and its manufacturing method |
JP4506692B2 (en) * | 2006-03-03 | 2010-07-21 | 株式会社デンソー | Double-sided cooling type semiconductor device |
JP4945319B2 (en) * | 2007-05-25 | 2012-06-06 | 昭和電工株式会社 | Semiconductor device |
DE102007063308A1 (en) * | 2007-12-28 | 2009-07-02 | Robert Bosch Gmbh | diode |
EP2284883A4 (en) * | 2008-04-25 | 2014-12-10 | Kyocera Corp | Heat dissipating base body and electronic device using the same |
-
2010
- 2010-12-14 DE DE102010063021A patent/DE102010063021A1/en not_active Withdrawn
-
2011
- 2011-11-08 WO PCT/EP2011/069662 patent/WO2012079855A2/en active Application Filing
- 2011-11-08 EP EP11788397.5A patent/EP2652784A2/en not_active Ceased
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3414065C2 (en) * | 1984-04-13 | 1989-07-27 | Siemens Ag, 1000 Berlin Und 8000 Muenchen, De | |
EP0275433B1 (en) | 1986-12-22 | 1992-04-01 | Siemens Aktiengesellschaft | Method for mounting electronic components on a substrate, foil to carry out the method and method to produce the foil |
DE10009678C1 (en) * | 2000-02-29 | 2001-07-19 | Siemens Ag | Heat conducting adhesive joint between two workpieces used in the production of electronic components comprises a layer of heat conducting material having two flat sided surfaces with openings on each surface |
US20030041947A1 (en) * | 2001-08-31 | 2003-03-06 | International Business Machines Corporation | Method for sinter distortion control |
DE102009000192A1 (en) * | 2009-01-14 | 2010-07-15 | Robert Bosch Gmbh | Sintered material, sintered compound and method for producing a sintered compound |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102014217938A1 (en) | 2014-09-08 | 2016-03-10 | Robert Bosch Gmbh | Electronic component |
US9508643B2 (en) | 2014-09-08 | 2016-11-29 | Robert Bosch Gmbh | Electronic component |
DE102014217938B4 (en) | 2014-09-08 | 2022-11-03 | Robert Bosch Gmbh | electronic component |
US11059018B2 (en) | 2018-05-16 | 2021-07-13 | Dresser-Rand Company | Turbomachine chemical reactor and method for cracking hydrocarbons in a process fluid |
EP3618586A1 (en) * | 2018-08-31 | 2020-03-04 | Siemens Aktiengesellschaft | Circuit carrier comprising a mounting place for electronic components, electronic circuit and manufacturing method |
EP3618585A1 (en) * | 2018-08-31 | 2020-03-04 | Siemens Aktiengesellschaft | Circuit carrier comprising a mounting place for electronic components, electronic circuit and manufacturing method |
WO2020043543A1 (en) * | 2018-08-31 | 2020-03-05 | Siemens Aktiengesellschaft | Circuit carrier having an installation place for electronic components, electronic circuit and production method |
CN112640593A (en) * | 2018-08-31 | 2021-04-09 | 西门子股份公司 | Circuit carrier with mounting locations for electronic components, electronic circuit and method of manufacture |
US11123702B2 (en) | 2018-09-20 | 2021-09-21 | Dresser-Rand Company | Turbomachine type chemical reactor |
Also Published As
Publication number | Publication date |
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WO2012079855A3 (en) | 2012-09-20 |
WO2012079855A2 (en) | 2012-06-21 |
EP2652784A2 (en) | 2013-10-23 |
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