DD156308A1 - BEGINNING FOR PHASE RULES - Google Patents

Abstract

The invention relates to a capture circuit for phase locked loops with sampling phase demodulator and implementation in the intermediate frequency position. The phase-locked loop should engage the receiving frequency f low HF at the input E so that the frequency f low VCO of the voltage-controlled oscillator (VCO) 4 is exactly offset by the reference frequency f low ref. This is achieved by inserting an "on-off" switch 11 and a change-over switch 12 into the line of the sampling pulses in the phase-locked loop 1. The "on-off" switch 11, periodically switched from the voltage at the input "reference voltage" E deep ref, allows the sampling pulses pass only in the case of the desired detent gapless, which is why only this one detent is stable. To catch are generated via the switch 12 to the phase demodulator 2 in the comparator 17 and Impulsverkuerzer 18 generated auxiliary pulses, the phase position of the output voltage of the Differenzintergrators 13 is changed so that the frequency f low VCO of the voltage controlled oscillator 4 hinlaeuft to Einrastpunkt. With sufficient approximation causes the frequency difference evaluating circuit differential integrator 13, differentiator with magnitude 14 and Schmitt trigger 15 via the switch 12, the closure of the phase locked loop.

Description

Title of the invention Phase-locked loop capture circuit D Field of application of the invention

The invention relates to a phase-locked loop circuit with a sampling phase demodulator and conversion to the intermediate frequency position, these phase locked loops preferably being intended to demodulate those signals which are frequency modulated at a low 17ЪЬЪЬ₁ and a higher measurement frequency such that an intermediate frequency signal with the fully obtained measurement signal information and Ms The use of a sampling phase demodulator is necessary in order to be able to dimension the loop filter, which is critical in terms of its dimensioning for maintaining the stability of the phase-locked loop, only according to the requirements of the demodulation task. D, h., The loop filter is free from the requirements of the screening properties, which inevitably arise when using other phase demodulators.

Characteristic of the known technical solutions

A phase excitation circuit is known which consists of the absolutely necessary punctuation groups phase demodulator, loop filter

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f% J C ,. ^ J

and clock-controlled oscillator ordered. In order to achieve an almost infinite capture range, the loop filter is designed to have a pole in the transfer function at ω = 0 (integrator). In addition, the phase demodulator has two pulse outputs connected to the loop filter. The circuit arrangement is both frequency and phase sensitive, it is disadvantageous here that the loop filter from the large pulses of the phase demodulator with the period of the reference signal must filter out the DC component and thus the dimensioning of the loop filter is completely influenced by the task of the necessary large screening and the phase locked loop makes it unsuitable for fast dynamic operation.

It is also known in the aforementioned phase-locked loop that the voltage-controlled oscillator is slowly pushed through an outer, usually sawtooth-shaped voltage in its frequency until the proximity of the binary interrogation point is recognized. First, this search circuit needs a special circuit that detects the equality of the frequencies to be pushed together and performs the switching after the search process and secondly, there is the risk of Falscheastungen after switching.

Another possibility is to replace the phase demodulator with a pre-Z backward counter, with the receive and oscillator frequencies each being applied to one of the two inputs of the pre-Z backward counter and the counter reading via a resistor network to an analog value for tuning the voltage controlled one Oscillator implemented? / Ird. This circuit arrangement can be thought of as a phase demodulator with a phase range increased by the divider factor. This also makes the catch area considerably larger. In addition, here is the cutoff frequency

the loop filter initially set to catch and lowered in operation. For catching this circuit arrangement is suitable, but not to hold, when in dynamic operation, the characteristic is at least partially traversed. The characteristic of this phase demodulator has as many discontinuities as divisors; because whenever the phase difference of the two control pulses of the up / down counter comes below a certain value, the counter switches undefined.

Furthermore, a phase-locked loop, consisting of a phase demodulator, a loop filter, a voltage-controlled oscillator and possibly a mixer is known. The cutoff frequency of the loop filter is first set very high (thus the catch area is greatly expanded) and switched to the value adapted to the technical requirements after latching. This method does not lead to any certainty with digital phase demodulators, especially if the input and thus also the oscillator frequency are variable over a wide range. The phase-locked loop can also lock in place if the signals controlling the phase demodulator, the reception frequency and the frequency of the voltage-controlled oscillator, or the intermediate frequency and the reference frequency, are in the ratio of small integers (eg 8: 7, 2: 1, 3: 4) (locking to harmonics). When switching to the lower cut-off frequency of the loop filter then, since the voltage-controlled oscillator changes its frequency by compensating operations, there is a second danger of being latched onto the wrong frequency.

All these circuits are not suitable for phase locked loops with dynamic operation and implementation in the intermediate frequency. There are always difficulties in acquiring and evaluating the frequency offset before snapping.

If the intermediate frequency and the reference frequency are used for this purpose, then there is no protection against latching on the image frequency; if the input and the oscillator frequency are processed for this purpose, the difficulty arises that both frequencies are not equal at the snap-in point, which makes the evaluation complicated.

Object of the invention

The object of the invention is to bring a phase-locked loop by means of a capture circuit quickly and only with the desired frequency of a voltage-controlled oscillator for locking to a possible / even swept receiving frequency and to provide any conditions for the dimensioning of the loop filter.

Explanation of the essence of the invention

The invention has for its object to provide a capture circuit for phase locked loops with implementation in the intermediate frequency position and a Abtastphasendemodulator with triangular characteristic, from the comparison of the intermediate and the reference frequency in the phase locked loop, a criterion should arise, which triggers the capture, d. H. causes a shift of the SPAM to the lock point with a shift speed that increases with the offset from the lock point.

Upon reaching a predetermined point in Einrastbereich the phase locked loop is to be switched in a relation to the period of the Wobbeifrequenz short time from sliding to Closed. It should continue to be ensured that a locking on "harmonics" of the intermediate and the reference frequency or on the received mirror frequency is made impossible.

According to the invention the object is achieved in that in the phase-locked loop in the line on which the sampling pulses with the intermediate frequency of a first pulse shortener to a first input of a phase demodulator arrive, in series first an "on-off" switch and then a switch with the first transfer port is inserted as input. The "on-off" switch is controlled by the rectangular reference signal to ensure that only those scanning pulses are transmitted, which arrive in the times in which either the rising or the falling part of the Phasendemodulatorkennlinie is traversed Locking on the receive frequency either only with an oscillator frequency that is exactly above the intermediate frequency above the transmit frequency, or only with an oscillator frequency that is exactly at the intermediate frequency below the receive frequency, may only work in the first pass the stability of the phase-locked loop is retained in the rising part of the characteristic curve, in the second case only working on the falling part. * In addition, snapping to an intermediate frequency, which is related to the reference frequency in the ratio of small integers, is impossible, because in this case sampling pulses be effective on both branches of the triangular characteristic n need.

The control input of the switch is connected to the output of a Schmitt trigger, which receives its drive signal from a differential integrator with a subsequent differentiator with magnitude. At the first input of the differential integrator are the sampling pulses with the intermediate frequency from the first pulse shortener and at its second input the pulses from a second pulse shortener, wherein the second pulse shortener is driven by the reference voltage. The switch should, so that it comes to latching, first open the phase locked loop and the '.Yeg for the auxiliary pulses to control the phase

demodulators free. The criterion for switching is formed as follows: If the identically shaped pulses at the differential integrator have different frequencies, then the output voltage of the differential integrator changes. The rate of change of the output voltage sets the following differentiator with magnitude in a proportional voltage, which then controls the switch with the interposition of the Schmitt trigger such that it opens at a large filing of the intermediate of the reference frequency the Phasenrege! Circle and the auxiliary pulses to the Phase demodulator sets, but if the shelf falls below a certain value, the lock phase lock loop closes. To generate the auxiliary pulses is a comparator, which is driven at its first input by the output signal of the differential integrator and at its second input by a Breieckspannung. This triangular voltage is also at the second input of the phase demodulator. It is formed from the reference-shaped reference voltage by means of a square-wave converter. The converted in a third pulse shortener output of! Comparator gives the auxiliary pulses and is fed to the second changeover terminal of the switch. The auxiliary pulses have the frequency of the reference signal, but are compared to this in phase shifted so that at the output of the phase demodulator, a control voltage is produced, which pushes the voltage controlled oscillator to Einrastpunkt. Thus, the technical limits of the output voltage of the differential integrator does not disturb the capture process so that it remains unfinished, when a certain of these two limits (which comes from both limits in question, is dependent on the polarity of different functional groups in the phase locked loop) a reset effective , which sets the output voltage to the opposite '.7ert. The reset device is realized with a return valve which is located between the output and the second input of the differential integrator.

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Export imgsbe ispiel

The invention will be explained in more detail below using an exemplary embodiment. In the accompanying drawings show:

Fig. 1: Output voltage U of a phase demodulator in

C *

Dependence on the phase difference Δ ψ

Pig. 2: The block diagram of the circuit according to the invention. Pig. 3: The shift of the intermediate frequency f ™ to the latching point P _R out.

FIG. 1 shows the output voltage U of a phase demodulator.

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lators (PD) 2 as a function of the phase difference Δ ψ its two input signals, a triangular reference voltage U and a sequence of narrow sampling pulses, shown.

FIG. 2 shows the block diagram of a capture circuit for phase-locked loops.

Given is a phase locked loop (PLL) 1 with the known, essential functional units, a phase demodulator (PD) 2, a loop filter 3 and a voltage controlled oscillator (VCO) 4. In addition, this phase locked loop (PLL) 1, since down to a constant intermediate frequency is to be mixed, a mixer 5, an intermediate frequency filter 6, a limiter amplifier 7, if necessary, a frequency divider 8 with the divider ratio n, and for driving the phase demodulator (PD) 2 a Impulsverkürzer 9 and a Eechteck-Triangle 10, which consists of a rectangular voltage with the reference frequency f _{re; i} > at input E ~ by integration generates a triangular voltage. The divider ratio η should be equal to one here for ease of description. As a phase demodulator (PD) 2 is a known sampling phase demodulator, which is fangesteuert with a triangular reference voltage U ^ with the frequency. This is also his characteristic, see Figure 1

also triangular. For catching and locking the phase locked loop (PLL) 1 in the signal path from the pulse shortener 9 to the phase demodulator (PD) 2, two electronic switches, an "on-off" switch 11 and a switch 12, which can be realized by logic gates, inserted. in particular, they have to meet the following punctures: the ^ls on-off "switch 11 to prevent accidental engagement of the mirror shaft. This circuit is based on the fact that when latched phase locked loop (PLL) 1, 3e after, whether the receiving frequency f "" at input E. is at a distance of the intermediate frequency f ^, below (desired reception) or above (mirror wave) the frequency fy _{C0 of} the voltage controlled oscillator (VCO) 4, the phase locked loop (PLL) 1 only stable on the rising or only stable on the falling part of the Phasendemodulatorkennlinie (see Figure 1) can work. Now, by the "on-off" switch 11, controlled by the rectangular voltage of frequency £ _Te #i, the path for the sampling pulses from the pulse shortener 9 is blocked precisely in the times in which the phase difference Αψ between the sampling pulses and the triangular Reference voltage IL- is in the range of 0 to -It , so the falling part of the Phasendemodulatorkennlinie is effective. This makes it impossible to work on the falling part of the phase demodulator characteristic and prevents stable locking on the mirror wave or on "harmonics". According to this situation, the unstable regions are IV; Y; VJ. have been shown in the figure 3. The task of the change-over switch 12 is to open the phase-locked loop (PLL) 1 when the frequency fy _{C0 of} its voltage-controlled oscillator (VCO) 4 is still far away from the latching point P _R and to control the path for the auxiliary pulses Utt of the phase demodulator (PD) 2 to close. The auxiliary pulses U _{H also} have the reference frequency as the triangular reference voltage U- ^ but this

2fL ψ ** г ·· "» ** ^ s \ / / Ц / 4 Сж »/ ^ s * ¹ в5Э ⁵ ^

shifted in phase so that the voltage controlled oscillator (VCO) 4 is pushed to the latching point P ". For the locked state: f "_ = f", where f _Z j, = ^f YQQ ~ ^f mn ^isi: · ^Has the intermediate frequency f " ₇ by shifting the frequency fy _{C0 of} the voltage controlled oscillator (VCO) 4 to one certain small 7 / ert the Einrastpunkt P "approached, so closes the switch 12 abruptly the phase locked loop (PLL) 1, so that now instead of the auxiliary pulses и" pulses from the Impulsverkürzer 9 with the intermediate frequency f ^ the phase demodulator (PD) 2 drive. The closed loop phase locked loop (PLL) 1 snaps in by itself. The switching voltage for the changeover switch 12 is formed by means of a differential integrator 13, a differentiator 14 with magnitude and a Schmitt trigger 15 as follows: The difference integrator 13 from the pulse shortener 9 and an equal pulse shortener 16 similar narrow pulses with the frequencies f _71? and f _f fed. If the intermediate frequency f "j, greater or smaller than the reference frequency f", more or fewer pulses per unit time to the positive than to the negative input of the differential integrator 13, which has the consequence that the output voltage U _{T of} the differential integrator 13 increases or sink. The following differentiator with magnitude 14 evaluates the rate of change of this output voltage U _T. It supplies a positive voltage which is proportional to the amount of the rate of change to the following Schmitt trigger 15. This voltage is great when the intermediate frequency f "is far from the reference frequency f_, because in this case at the inputs of the differential integrator 13 very different Voltages are applied, which is a rapid shift of the output voltage U-. cause. The Schmitt trigger 15 and thus also the switch then have the switching state in which the '7eg for the auxiliary pulses for pushing the voltage controlled oscillator (VCO) 4 is released. When approaching f "^ to f _re -p>

what is near the Verschrininten detent point P _R , but also the mirror wave Einrastpimktes P "the Pail, the rate of change of the output voltage U ₁ decreases, so that the voltage for driving the Schmitt trigger 15 so far that the Schmitt trigger 15th tilts and the switch 12 closes the phase locked loop (PLL) 1 to Seihsteinrasten.

The generation of the positive pulses U ", which is to be used for the

Sliding operation are needed, will be described.

On the two inputs of a comparator 17, the output voltage Uj of the differential integrator 13 and the triangular reference voltage U ^, which is at the output of the rectangular-delta converter 10, given. At the output of the comparator 17 then creates a square wave voltage with the frequency of the triangular reference voltage Uj., So f ". The planks of the rectangles always arise just when the difference between the triangular voltage Uj. and the output voltage Uj changes sign. The time of occurrence of the rectangular edges is therefore also determined by the output voltage Uj. From the rectangular pulses 18 narrow auxiliary pulses U "are then generated in a pulse shortener. These auxiliary pulses U "change their phase position compared to the triangular voltage Ujj with the value of the output voltage Uj. If these HiFi pulses Utt can be shifted in their phase, it is possible, according to their phase, to generate a control voltage U at the output of the phase demodulator (PD) 2, which in turn directly determines and also shifts the frequency fy _{C0 of} the voltage-controlled oscillator (VCO) 4. The sliding process must now proceed automatically so that the intermediate frequency f "^ is brought so far to the reference frequency f _ref , that after closing the phase locked loop (PLL) 1, the automatic locking is possible. With reference to FIG. 3, the "effectiveness of the circuit for the various starting positions at the time of latching in should be explained.

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be found that the frequency f (YGO), during the pushing action _vco of the VCO 4 if and only provided to higher Fourth out when the intermediate-frequency f _Z p is less than the reference frequency f _f (shift region II), but lower, if the intermediate frequency ± "~ is greater than the reference frequency f _f (shift range I and III). This fact shows the little arrows.

The first start position should be such that the frequency ^ VCO ^ ^{"it s} P ^Annun Ssgesteuerten oscillator (YCO) 4 randomly located in the vicinity of the reception frequency f ™, specifically, the f_- resulting intermediate frequency, should be smaller than the reference

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frequency f _rei be. Immediately, the frequency f _V p _{0 of} the voltage-controlled oscillator (YCO) 4 is pushed to the desired latching point P "(shift range II) and with sufficient approximation takes place with the switch 12, the closing of the phase locked loop (PLb). 1

As a second starting position it is assumed that the frequency ίγπ _{0 of} the voltage controlled oscillator (YCO) 4 is far above the receiving frequency f "^ (shift range III), so that an intermediate frequency f ™ is greater than the reference frequency f«. In this case, the frequency f "of the voltage-controlled oscillator (VCO) 4 is shifted to smaller values, that is to say also to the sinusoid point P _R.

But in the third possible case at the start time, the frequency f, _rr , _{n of} the voltage controlled oscillator (YCO)

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so far below the reception frequency, that the intermediate frequency f _7T , as in the second case, is greater than the reference

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renzfrequenz f "is (shift range I), a shift takes place from the locking point P ₀ away. At the same time, too

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the output voltage Uj of the differential integrator 13 becomes faster and faster into negative * So that the shift process does not end in an uncompleted manner, upon reaching a certain negative output voltage Uj, a return valve 19 is used

(a partial negative characteristic circuit such as a programmable unijunction transistor), a negative pulse is applied to the negative input of the differential integrator 13, causing the output voltage Uy to jerk to a higher positive Jert. Thus, the sequence fy ™ of the voltage controlled oscillator (VCO) 4 is brought to a large 7 / ert on the phase shift of the auxiliary pulses (long arrows) and the sliding now proceeds as described in the second Pail. Should the fps frequency be frequency-modulated, then the capture process proceeds as previously discussed; because it does not matter whether the frequency fy _C n ^ ^it voltage-controlled oscillator (VCO) 4 is pushed to the Sinrastpunkt P _R (^ yQQ. = ^ щ. + ^f zi ^, or if the reception frequency f ^ ™ runs there by itself.

At a certain approximation, the phase lock loop (PLL) 1 is very quickly closed and locked, and it remains locked in, provided it can follow the changes in the receive frequency f 1, which depends on the loop filter 3.

Claims (1)

" ¹³ " 227 52 3 б He f in gns s u s Fang circuit for phase locked loops with Abtastphasendemodulator and implementation in the Zwisohenfrequenzlage, characterized in that in the phase-locked loop (1), at the input E _0th the receiving _frequency f _TXCT is present in the C JLIl £ 3 July ' tion, on which the sampling pulses from a pulse shortener (9) reach a first input of a phase demodulator (2), in series first an "on-off" switch (11) and then a change-over switch (12), with the first change-over connection as input , are inserted, wherein the control input of the "on-off" switch (11) with the input for the reference voltage (E _f ) and the control input of the switch (12) to the output of a Schmitt trigger (15), the drive signal of a differential integrator (13) with a subsequent differentiator with magnitude (14) receives, and that the first input of the differential integrator (13) to the output of the Impulsverkürzers (9) and its second input to the output of a pulse shortener (16), in turn with connected to its input at the input for the reference voltage (S _f ) lead, and that a comparator (17) with its one input also to the output of the differential integrator (13) and its other input on Output of a rectangle-triangle-handler (10) are connected and this Output is simultaneously connected to the second input of the phase demodulator (2) and the input of the rectangular-delta V / andlers (10) at the input for the reference voltage (E _f ) is applied and that the output of the Xomperators (1?) With the interposition of a Pulse shortener (18) leads to the second changeover terminal of the changeover switch (12) and between the output and the second input of the differential integrator (13) is a return valve (19). , Z ... .Seiten drawings