DD132091A5 - Verfahren zur herstellung einer halbleiteranordnung - Google Patents

Verfahren zur herstellung einer halbleiteranordnung

Info

Publication number
DD132091A5
DD132091A5 DD7700200484A DD20048477A DD132091A5 DD 132091 A5 DD132091 A5 DD 132091A5 DD 7700200484 A DD7700200484 A DD 7700200484A DD 20048477 A DD20048477 A DD 20048477A DD 132091 A5 DD132091 A5 DD 132091A5
Authority
DD
German Democratic Republic
Prior art keywords
producing
semiconductor arrangement
semiconductor
arrangement
Prior art date
Application number
DD7700200484A
Other languages
German (de)
English (en)
Inventor
Velde Ties S Te
Donald R Wolters
Original Assignee
Philips Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Nv filed Critical Philips Nv
Publication of DD132091A5 publication Critical patent/DD132091A5/xx

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/4821—Bridge structure with air gap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DD7700200484A 1976-08-11 1977-08-08 Verfahren zur herstellung einer halbleiteranordnung DD132091A5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7608901A NL7608901A (nl) 1976-08-11 1976-08-11 Werkwijze ter vervaardiging van een halfge- leiderinrichting en halfgeleiderinrichting vervaardigd door middel van een dergelijke werkwijze.

Publications (1)

Publication Number Publication Date
DD132091A5 true DD132091A5 (de) 1978-08-23

Family

ID=19826727

Family Applications (1)

Application Number Title Priority Date Filing Date
DD7700200484A DD132091A5 (de) 1976-08-11 1977-08-08 Verfahren zur herstellung einer halbleiteranordnung

Country Status (15)

Country Link
US (1) US4308090A (fi)
JP (1) JPS5837992B2 (fi)
AU (1) AU509242B2 (fi)
CA (1) CA1090477A (fi)
CH (1) CH617037A5 (fi)
DD (1) DD132091A5 (fi)
DE (1) DE2734176A1 (fi)
FR (1) FR2361745A1 (fi)
GB (1) GB1584756A (fi)
HU (1) HU176861B (fi)
IT (1) IT1086058B (fi)
NL (1) NL7608901A (fi)
PL (1) PL200127A1 (fi)
SE (1) SE7708968L (fi)
SU (1) SU673206A3 (fi)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL181611C (nl) * 1978-11-14 1987-09-16 Philips Nv Werkwijze ter vervaardiging van een bedradingssysteem, alsmede een halfgeleiderinrichting voorzien van een dergelijk bedradingssysteem.
NL8303268A (nl) * 1983-09-23 1985-04-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting en halfgeleiderinrichting vervaardigd door toepassing van een dergelijke werkwijze.
US4924287A (en) * 1985-01-20 1990-05-08 Avner Pdahtzur Personalizable CMOS gate array device and technique
GB8518231D0 (en) * 1985-07-19 1985-08-29 Plessey Co Plc Producing layered structures
JPH0110467Y2 (fi) * 1985-10-19 1989-03-24
US4840923A (en) * 1986-04-30 1989-06-20 International Business Machine Corporation Simultaneous multiple level interconnection process
IL82113A (en) * 1987-04-05 1992-08-18 Zvi Orbach Fabrication of customized integrated circuits
US4922323A (en) * 1987-04-09 1990-05-01 Microelectronics And Computer Technology Corporation Hermetically sealed multilayer electrical feedthru
JPS63293860A (ja) * 1987-05-26 1988-11-30 Nec Ic Microcomput Syst Ltd 半導体集積回路装置
JPH0783053B2 (ja) * 1987-06-19 1995-09-06 三菱電機株式会社 半導体装置
JPS6481343A (en) * 1987-09-24 1989-03-27 Nec Corp Manufacture of integrated circuit
JPH01189939A (ja) * 1988-01-26 1989-07-31 Nec Corp 半導体集積回路
US5117276A (en) * 1989-08-14 1992-05-26 Fairchild Camera And Instrument Corp. High performance interconnect system for an integrated circuit
US5198385A (en) * 1991-01-11 1993-03-30 Harris Corporation Photolithographic formation of die-to-package airbridge in a semiconductor device
US5270574A (en) * 1991-08-01 1993-12-14 Texas Instruments Incorporated Vacuum micro-chamber for encapsulating a microelectronics device
JPH0656403U (ja) * 1993-01-18 1994-08-05 株式会社アンカー商事 パイプ材の仮止装置
KR970004922B1 (ko) * 1993-07-27 1997-04-08 삼성전자 주식회사 고집적 반도체 배선구조 및 그 제조방법
JP3156896B2 (ja) * 1994-01-28 2001-04-16 富士通株式会社 半導体装置の製造方法およびかかる製造方法により製造された半導体装置
JP3267049B2 (ja) * 1994-05-25 2002-03-18 株式会社村田製作所 エアブリッジ配線を有するスパイラルインダクタの製造方法
US20090038171A1 (en) * 2007-08-08 2009-02-12 International Business Machines Corporation Alignment tool for assembly of microprocessor board to server chassis
US9082624B2 (en) * 2013-01-02 2015-07-14 International Business Machines Corporation Signal path of a multiple-patterned semiconductor device
US8866306B2 (en) 2013-01-02 2014-10-21 International Business Machines Corporation Signal path and method of manufacturing a multiple-patterned semiconductor device
US9099533B2 (en) 2013-07-02 2015-08-04 International Business Machines Corporation Semiconductor device with distinct multiple-patterned conductive tracks on a same level

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3539705A (en) * 1968-05-31 1970-11-10 Westinghouse Electric Corp Microelectronic conductor configurations and method of making the same
US3647585A (en) * 1969-05-23 1972-03-07 Bell Telephone Labor Inc Method of eliminating pinhole shorts in an air-isolated crossover
NL7009522A (fi) * 1970-06-27 1971-12-29
US3715785A (en) * 1971-04-29 1973-02-13 Ibm Technique for fabricating integrated incandescent displays
JPS4834686A (fi) * 1971-09-09 1973-05-21
JPS5146904B2 (fi) * 1971-09-30 1976-12-11
US3783056A (en) * 1972-06-20 1974-01-01 Bell Telephone Labor Inc Technique for the fabrication of an air isolated crossover

Also Published As

Publication number Publication date
CH617037A5 (fi) 1980-04-30
NL7608901A (nl) 1978-02-14
GB1584756A (en) 1981-02-18
DE2734176A1 (de) 1978-02-16
HU176861B (en) 1981-05-28
AU509242B2 (en) 1980-05-01
IT1086058B (it) 1985-05-28
CA1090477A (en) 1980-11-25
FR2361745A1 (fr) 1978-03-10
AU2769877A (en) 1979-02-15
SE7708968L (sv) 1978-02-12
JPS5321587A (en) 1978-02-28
JPS5837992B2 (ja) 1983-08-19
SU673206A3 (ru) 1979-07-05
US4308090A (en) 1981-12-29
FR2361745B1 (fi) 1983-06-03
PL200127A1 (pl) 1978-04-24

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