CS93591A2 - Method of instruction sequence identification in byte flow and at least two instructions flagging for parallel execution - Google Patents
Method of instruction sequence identification in byte flow and at least two instructions flagging for parallel execution Download PDFInfo
- Publication number
- CS93591A2 CS93591A2 CS91935A CS93591A CS93591A2 CS 93591 A2 CS93591 A2 CS 93591A2 CS 91935 A CS91935 A CS 91935A CS 93591 A CS93591 A CS 93591A CS 93591 A2 CS93591 A2 CS 93591A2
- Authority
- CS
- Czechoslovakia
- Prior art keywords
- instruction
- instructions
- syllable
- sequence
- predicted
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 66
- 239000000203 mixture Substances 0.000 claims description 35
- 238000012545 processing Methods 0.000 claims description 22
- 238000007781 pre-processing Methods 0.000 claims description 9
- 238000013461 design Methods 0.000 claims description 7
- 238000010276 construction Methods 0.000 claims description 4
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- 230000004907 flux Effects 0.000 claims description 2
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- VLFJWLVMFJQJEU-HWOCEHATSA-N (17a(1)R)-12alpha-acetoxy-17a(1)-hydroxy-4,4,8,17,17abeta-pentamethyl-17a-homo-5alpha-androst-16-ene-17,17a(1)-carbolactone Chemical compound C([C@H]12)C=C3C(=O)O[C@@H](O)[C@@H]3[C@@]1(C)[C@@H](OC(=O)C)C[C@H]1[C@@]2(C)CC[C@H]2C(C)(C)CCC[C@@]21C VLFJWLVMFJQJEU-HWOCEHATSA-N 0.000 description 1
- ONBQEOIKXPHGMB-VBSBHUPXSA-N 1-[2-[(2s,3r,4s,5r)-3,4-dihydroxy-5-(hydroxymethyl)oxolan-2-yl]oxy-4,6-dihydroxyphenyl]-3-(4-hydroxyphenyl)propan-1-one Chemical compound O[C@@H]1[C@H](O)[C@@H](CO)O[C@H]1OC1=CC(O)=CC(O)=C1C(=O)CCC1=CC=C(O)C=C1 ONBQEOIKXPHGMB-VBSBHUPXSA-N 0.000 description 1
- 208000001613 Gambling Diseases 0.000 description 1
- VLFJWLVMFJQJEU-UHFFFAOYSA-N Scalarin Natural products C12CC=C3C(=O)OC(O)C3C2(C)C(OC(=O)C)CC2C1(C)CCC1C(C)(C)CCCC12C VLFJWLVMFJQJEU-UHFFFAOYSA-N 0.000 description 1
- LJOOWESTVASNOG-UFJKPHDISA-N [(1s,3r,4ar,7s,8s,8as)-3-hydroxy-8-[2-[(4r)-4-hydroxy-6-oxooxan-2-yl]ethyl]-7-methyl-1,2,3,4,4a,7,8,8a-octahydronaphthalen-1-yl] (2s)-2-methylbutanoate Chemical compound C([C@H]1[C@@H](C)C=C[C@H]2C[C@@H](O)C[C@@H]([C@H]12)OC(=O)[C@@H](C)CC)CC1C[C@@H](O)CC(=O)O1 LJOOWESTVASNOG-UFJKPHDISA-N 0.000 description 1
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3808—Instruction prefetching for instruction reuse, e.g. trace cache, branch target cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/30149—Instruction analysis, e.g. decoding, instruction word fields of variable length instructions
- G06F9/30152—Determining start or end of instruction; determining instruction length
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3816—Instruction alignment, e.g. cache line crossing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Devices For Executing Special Programs (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US51938290A | 1990-05-04 | 1990-05-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CS93591A2 true CS93591A2 (en) | 1991-12-17 |
Family
ID=24068072
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CS91935A CS93591A2 (en) | 1990-05-04 | 1991-04-04 | Method of instruction sequence identification in byte flow and at least two instructions flagging for parallel execution |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US5500942A (ja) |
| EP (1) | EP0454984B1 (ja) |
| JP (1) | JPH087681B2 (ja) |
| CA (1) | CA2037708C (ja) |
| CS (1) | CS93591A2 (ja) |
| DE (1) | DE69122294T2 (ja) |
| HU (1) | HUT57456A (ja) |
| PL (1) | PL289723A1 (ja) |
Families Citing this family (79)
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| US5214763A (en) * | 1990-05-10 | 1993-05-25 | International Business Machines Corporation | Digital computer system capable of processing two or more instructions in parallel and having a coche and instruction compounding mechanism |
| WO1992006426A1 (en) * | 1990-10-09 | 1992-04-16 | Nexgen Microsystems | Method and apparatus for parallel decoding of instructions with branch prediction look-up |
| EP0662226B1 (de) * | 1992-09-22 | 1996-02-07 | Siemens Aktiengesellschaft | Verfahren zur bearbeitung eines anwenderprogramms auf einem parallelrechnersystem |
| US5630082A (en) * | 1993-10-29 | 1997-05-13 | Advanced Micro Devices, Inc. | Apparatus and method for instruction queue scanning |
| DE69427265T2 (de) | 1993-10-29 | 2002-05-02 | Advanced Micro Devices, Inc. | Superskalarbefehlsdekoder |
| US5689672A (en) * | 1993-10-29 | 1997-11-18 | Advanced Micro Devices, Inc. | Pre-decoded instruction cache and method therefor particularly suitable for variable byte-length instructions |
| DE69434669T2 (de) * | 1993-10-29 | 2006-10-12 | Advanced Micro Devices, Inc., Sunnyvale | Spekulative Befehlswarteschlange für Befehle mit variabler Byteslänge |
| DE69430018T2 (de) * | 1993-11-05 | 2002-11-21 | Intergraph Corp., Huntsville | Befehlscachespeicher mit assoziativem Kreuzschienenschalter |
| US6360313B1 (en) | 1993-11-05 | 2002-03-19 | Intergraph Corporation | Instruction cache associative crossbar switch |
| US5559975A (en) | 1994-06-01 | 1996-09-24 | Advanced Micro Devices, Inc. | Program counter update mechanism |
| US5640526A (en) * | 1994-12-21 | 1997-06-17 | International Business Machines Corporation | Superscaler instruction pipeline having boundary indentification logic for variable length instructions |
| US5737550A (en) * | 1995-03-28 | 1998-04-07 | Advanced Micro Devices, Inc. | Cache memory to processor bus interface and method thereof |
| US5809273A (en) * | 1996-01-26 | 1998-09-15 | Advanced Micro Devices, Inc. | Instruction predecode and multiple instruction decode |
| US5794063A (en) * | 1996-01-26 | 1998-08-11 | Advanced Micro Devices, Inc. | Instruction decoder including emulation using indirect specifiers |
| US5926642A (en) | 1995-10-06 | 1999-07-20 | Advanced Micro Devices, Inc. | RISC86 instruction set |
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| US5920713A (en) * | 1995-10-06 | 1999-07-06 | Advanced Micro Devices, Inc. | Instruction decoder including two-way emulation code branching |
| US5872947A (en) * | 1995-10-24 | 1999-02-16 | Advanced Micro Devices, Inc. | Instruction classification circuit configured to classify instructions into a plurality of instruction types prior to decoding said instructions |
| US5796974A (en) * | 1995-11-07 | 1998-08-18 | Advanced Micro Devices, Inc. | Microcode patching apparatus and method |
| US8583895B2 (en) * | 1996-05-15 | 2013-11-12 | Nytell Software LLC | Compressed instruction format for use in a VLIW processor |
| US5896519A (en) * | 1996-06-10 | 1999-04-20 | Lsi Logic Corporation | Apparatus for detecting instructions from a variable-length compressed instruction set having extended and non-extended instructions |
| US6049863A (en) * | 1996-07-24 | 2000-04-11 | Advanced Micro Devices, Inc. | Predecoding technique for indicating locations of opcode bytes in variable byte-length instructions within a superscalar microprocessor |
| US5867680A (en) * | 1996-07-24 | 1999-02-02 | Advanced Micro Devices, Inc. | Microprocessor configured to simultaneously dispatch microcode and directly-decoded instructions |
| US6112299A (en) * | 1997-12-31 | 2000-08-29 | International Business Machines Corporation | Method and apparatus to select the next instruction in a superscalar or a very long instruction word computer having N-way branching |
| US6170050B1 (en) | 1998-04-22 | 2001-01-02 | Sun Microsystems, Inc. | Length decoder for variable length data |
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| US7376814B1 (en) | 1999-09-07 | 2008-05-20 | Nxp B.V. | Method for forming variable length instructions in a processing system |
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| US6633969B1 (en) | 2000-08-11 | 2003-10-14 | Lsi Logic Corporation | Instruction translation system and method achieving single-cycle translation of variable-length MIPS16 instructions |
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| US7904605B2 (en) * | 2008-02-14 | 2011-03-08 | International Business Machines Corporation | Computer command and response for determining the state of an I/O operation |
| US8095847B2 (en) * | 2008-02-14 | 2012-01-10 | International Business Machines Corporation | Exception condition handling at a channel subsystem in an I/O processing system |
| US8108570B2 (en) * | 2008-02-14 | 2012-01-31 | International Business Machines Corporation | Determining the state of an I/O operation |
| US7840717B2 (en) * | 2008-02-14 | 2010-11-23 | International Business Machines Corporation | Processing a variable length device command word at a control unit in an I/O processing system |
| US8166206B2 (en) * | 2008-02-14 | 2012-04-24 | International Business Machines Corporation | Cancel instruction and command for determining the state of an I/O operation |
| US7890668B2 (en) | 2008-02-14 | 2011-02-15 | International Business Machines Corporation | Providing indirect data addressing in an input/output processing system where the indirect data address list is non-contiguous |
| US7937507B2 (en) * | 2008-02-14 | 2011-05-03 | International Business Machines Corporation | Extended measurement word determination at a channel subsystem of an I/O processing system |
| US9052837B2 (en) * | 2008-02-14 | 2015-06-09 | International Business Machines Corporation | Processing communication data in a ships passing condition |
| US7917813B2 (en) * | 2008-02-14 | 2011-03-29 | International Business Machines Corporation | Exception condition determination at a control unit in an I/O processing system |
| US8001298B2 (en) * | 2008-02-14 | 2011-08-16 | International Business Machines Corporation | Providing extended measurement data in an I/O processing system |
| US8312189B2 (en) * | 2008-02-14 | 2012-11-13 | International Business Machines Corporation | Processing of data to monitor input/output operations |
| US8478915B2 (en) * | 2008-02-14 | 2013-07-02 | International Business Machines Corporation | Determining extended capability of a channel path |
| US8196149B2 (en) * | 2008-02-14 | 2012-06-05 | International Business Machines Corporation | Processing of data to determine compatability in an input/output processing system |
| US7840718B2 (en) * | 2008-02-14 | 2010-11-23 | International Business Machines Corporation | Processing of data to suspend operations in an input/output processing log-out system |
| US8364751B2 (en) * | 2008-06-25 | 2013-01-29 | Microsoft Corporation | Automated client/server operation partitioning |
| US7937504B2 (en) * | 2008-07-31 | 2011-05-03 | International Business Machines Corporation | Transport control channel program message pairing |
| US7904606B2 (en) * | 2008-07-31 | 2011-03-08 | International Business Machines Corporation | Transport control channel program chain linked branching |
| US8055807B2 (en) | 2008-07-31 | 2011-11-08 | International Business Machines Corporation | Transport control channel program chain linking including determining sequence order |
| JP2010257199A (ja) * | 2009-04-24 | 2010-11-11 | Renesas Electronics Corp | プロセッサ及びプロセッサにおける命令発行の制御方法 |
| US8332542B2 (en) * | 2009-11-12 | 2012-12-11 | International Business Machines Corporation | Communication with input/output system devices |
| US8364854B2 (en) | 2011-06-01 | 2013-01-29 | International Business Machines Corporation | Fibre channel input/output data routing system and method |
| US8738811B2 (en) | 2011-06-01 | 2014-05-27 | International Business Machines Corporation | Fibre channel input/output data routing system and method |
| US8583988B2 (en) | 2011-06-01 | 2013-11-12 | International Business Machines Corporation | Fibre channel input/output data routing system and method |
| US9021155B2 (en) | 2011-06-01 | 2015-04-28 | International Business Machines Corporation | Fibre channel input/output data routing including discarding of data transfer requests in response to error detection |
| US8364853B2 (en) | 2011-06-01 | 2013-01-29 | International Business Machines Corporation | Fibre channel input/output data routing system and method |
| US8677027B2 (en) | 2011-06-01 | 2014-03-18 | International Business Machines Corporation | Fibre channel input/output data routing system and method |
| US8549185B2 (en) | 2011-06-30 | 2013-10-01 | International Business Machines Corporation | Facilitating transport mode input/output operations between a channel subsystem and input/output devices |
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| US8312176B1 (en) | 2011-06-30 | 2012-11-13 | International Business Machines Corporation | Facilitating transport mode input/output operations between a channel subsystem and input/output devices |
| CN102495726B (zh) | 2011-11-15 | 2015-05-20 | 无锡德思普科技有限公司 | 机会多线程方法及处理器 |
| US8918542B2 (en) | 2013-03-15 | 2014-12-23 | International Business Machines Corporation | Facilitating transport mode data transfer between a channel subsystem and input/output devices |
| US8990439B2 (en) | 2013-05-29 | 2015-03-24 | International Business Machines Corporation | Transport mode data transfer between a channel subsystem and input/output devices |
| US9558000B2 (en) * | 2014-02-06 | 2017-01-31 | Optimum Semiconductor Technologies, Inc. | Multithreading using an ordered list of hardware contexts |
| US11294678B2 (en) * | 2018-05-29 | 2022-04-05 | Advanced Micro Devices, Inc. | Scheduler queue assignment |
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| US4295193A (en) * | 1979-06-29 | 1981-10-13 | International Business Machines Corporation | Machine for multiple instruction execution |
| US4506325A (en) * | 1980-03-24 | 1985-03-19 | Sperry Corporation | Reflexive utilization of descriptors to reconstitute computer instructions which are Huffman-like encoded |
| CA1174370A (en) * | 1980-05-19 | 1984-09-11 | Hidekazu Matsumoto | Data processing unit with pipelined operands |
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| JPS61245239A (ja) * | 1985-04-23 | 1986-10-31 | Toshiba Corp | 論理回路方式 |
| US4847755A (en) * | 1985-10-31 | 1989-07-11 | Mcc Development, Ltd. | Parallel processing method and apparatus for increasing processing throughout by parallel processing low level instructions having natural concurrencies |
| DE3751503T2 (de) * | 1986-03-26 | 1996-05-09 | Hitachi Ltd | Datenprozessor in Pipelinestruktur mit der Fähigkeit mehrere Befehle parallel zu dekodieren und auszuführen. |
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| US5202967A (en) * | 1988-08-09 | 1993-04-13 | Matsushita Electric Industrial Co., Ltd. | Data processing apparatus for performing parallel decoding and parallel execution of a variable word length instruction |
| DE68926701T2 (de) * | 1988-08-09 | 1997-02-20 | Matsushita Electric Ind Co Ltd | Datenverarbeitungsgerät zur parallelen Dekodierung und parallelen Ausführung von Befehlen mit variabler Wortlänge |
| US5051885A (en) * | 1988-10-07 | 1991-09-24 | Hewlett-Packard Company | Data processing system for concurrent dispatch of instructions to multiple functional units |
| US5203002A (en) * | 1989-12-27 | 1993-04-13 | Wetzel Glen F | System with a multiport memory and N processing units for concurrently/individually executing 2N-multi-instruction-words at first/second transitions of a single clock cycle |
| US5337415A (en) * | 1992-12-04 | 1994-08-09 | Hewlett-Packard Company | Predecoding instructions for supercalar dependency indicating simultaneous execution for increased operating frequency |
-
1991
- 1991-03-07 CA CA002037708A patent/CA2037708C/en not_active Expired - Fee Related
- 1991-03-20 EP EP91104317A patent/EP0454984B1/en not_active Expired - Lifetime
- 1991-03-20 DE DE69122294T patent/DE69122294T2/de not_active Expired - Fee Related
- 1991-04-03 JP JP3096091A patent/JPH087681B2/ja not_active Expired - Fee Related
- 1991-04-03 PL PL28972391A patent/PL289723A1/xx unknown
- 1991-04-04 HU HU911102A patent/HUT57456A/hu unknown
- 1991-04-04 CS CS91935A patent/CS93591A2/cs unknown
-
1995
- 1995-06-01 US US08/457,765 patent/US5500942A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CA2037708A1 (en) | 1991-11-05 |
| HUT57456A (en) | 1991-11-28 |
| DE69122294D1 (de) | 1996-10-31 |
| EP0454984B1 (en) | 1996-09-25 |
| EP0454984A2 (en) | 1991-11-06 |
| EP0454984A3 (en) | 1994-04-27 |
| DE69122294T2 (de) | 1997-04-10 |
| US5500942A (en) | 1996-03-19 |
| PL289723A1 (en) | 1992-05-04 |
| HU911102D0 (en) | 1991-10-28 |
| JPH0773036A (ja) | 1995-03-17 |
| JPH087681B2 (ja) | 1996-01-29 |
| CA2037708C (en) | 1998-01-20 |
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