CN2765327Y - 模组卡 - Google Patents

模组卡 Download PDF

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Publication number
CN2765327Y
CN2765327Y CNU2005200023423U CN200520002342U CN2765327Y CN 2765327 Y CN2765327 Y CN 2765327Y CN U2005200023423 U CNU2005200023423 U CN U2005200023423U CN 200520002342 U CN200520002342 U CN 200520002342U CN 2765327 Y CN2765327 Y CN 2765327Y
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China
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chip
substrate
base plate
module card
electrically connected
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Expired - Lifetime
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CNU2005200023423U
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English (en)
Inventor
吴智伟
林智翔
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Kingpak Technology Inc
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Kingpak Technology Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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Abstract

一种模组卡，为提供一种降低产品尺寸、轻薄短小、制造便利的半导体组件，提出本实用新型，它包括基板、第一芯片、第二芯片及封胶层；基板设有上表面及下表面，基板上表面形成数个金手指；第一芯片设置于基板的上表面上，借由数条导线电连接于基板上；第二芯片设置于基板的上表面上，并位于第一芯片侧边，第二芯片借由数条导线电连接至基板上，第二芯片借由设有填充介质的黏着层与基板相互黏着固定。

Description

模组卡
技术领域
本实用新型属于半导体组件，特别是一种模组卡。
背景技术
如图1、图2所示，已有的模组卡包括基板10、第一芯片18、数条导线20、第二芯片22及封胶层26。
基板10设有上表面12及下表面14。基板10的上表面12形成数个金手指16。
第一芯片18设置于基板10的上表面12上，第一芯片18借由数条导线20电连接至基板10上。
第二芯片22设置于基板10的上表面12上，第二芯片22借由数条导线24电连接至基板10上。
封胶层26用以将第一芯片18及第二芯片22包覆住。
因此，已有的模组卡的第一芯片18与第二芯片22之间必须预留较大的空间，作为导线20引线键合用，从而，使其封装体积较大。
发明内容
本实用新型的目的是提供一种降低产品尺寸、轻薄短小、制造便利的模组卡。
本实用新型包括基板、第一芯片、第二芯片及封胶层；基板设有上表面及下表面，基板上表面形成数个金手指；第一芯片设置于基板的上表面上，借由数条导线电连接于基板上；第二芯片设置于基板的上表面上，并位于第一芯片侧边，第二芯片借由数条导线电连接至基板上，第二芯片借由设有填充介质的黏着层与基板相互黏着固定。
其中：
填充介质为球状。
封胶层同时包覆住第一芯片及第二芯片。
由于本实用新型包括基板、第一芯片、第二芯片及封胶层；基板设有上表面及下表面，基板上表面形成数个金手指；第一芯片设置于基板的上表面上，借由数条导线电连接于基板上；第二芯片设置于基板的上表面上，并位于第一芯片侧边，第二芯片借由数条导线电连接至基板上，第二芯片借由设有填充介质的黏着层与基板相互黏着固定。第二芯片借由填充介质撑高时，可将第二芯片更靠近第一芯片设置，也不会妨碍到导线的引线键合作业，因此，模组卡的封装可更小。不仅降低产品尺寸、轻薄短小，而且制造便利，从而达到本实用新型的目的。
附图说明
图1、为已有的模组卡结构示意剖视图。
图2、为已有的模组卡结构示意俯视图。
图3、为本实用新型结构示意剖视图。
图4、为本实用新型结构示意俯视图。
具体实施方式
如图3、图4所示，本实用新型包括基板40、第一芯片42、第二芯片44、黏着层46及封胶层48。
基板40设有上表面50及下表面52。基板40的上表面形成数个金手指54。
第一芯片42设置于基板40的上表面50上，借由数条导线56电连接于基板40上。
第二芯片44设置于基板40的上表面50上，并位于第一芯片42侧边，借由设有填充介质58的黏着层46与基板40相互黏着固定。在本实施例中填充介质58为球状。第二芯片44借由数条导线60电连接至基板40上。
封胶层48同时用以将第一芯片42及第二芯片44包覆住。
如此，第二芯片44借由填充介质58撑高时，可将第二芯片44更靠近第一芯片42设置，亦不会妨碍到导线56的引线键合作业，因此，模组卡的封装可更小。

Claims (3)

1、一种模组卡，它包括基板、第一芯片、第二芯片及封胶层；基板设有上表面及下表面，基板上表面形成数个金手指；第一芯片设置于基板的上表面上，借由数条导线电连接于基板上；第二芯片设置于基板的上表面上，并位于第一芯片侧边，第二芯片借由数条导线电连接至基板上；其特征在于所述的第二芯片借由设有填充介质的黏着层与基板相互黏着固定。
2、根据权利要求1所述的模组卡，其特征在于所述的填充介质为球状。
3、根据权利要求1所述的模组卡，其特征在于所述的封胶层同时包覆住第一芯片及第二芯片。
CNU2005200023423U 2005-02-04 2005-02-04 模组卡 Expired - Lifetime CN2765327Y (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299148A (zh) * 2010-06-24 2011-12-28 华东科技股份有限公司 资料储存装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102299148A (zh) * 2010-06-24 2011-12-28 华东科技股份有限公司 资料储存装置

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Expiration termination date: 20150204

Granted publication date: 20060315