CN2532582Y - Improved semiconductor diode wire holder - Google Patents

Improved semiconductor diode wire holder Download PDF

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Publication number
CN2532582Y
CN2532582Y CN02204793U CN02204793U CN2532582Y CN 2532582 Y CN2532582 Y CN 2532582Y CN 02204793 U CN02204793 U CN 02204793U CN 02204793 U CN02204793 U CN 02204793U CN 2532582 Y CN2532582 Y CN 2532582Y
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CN
China
Prior art keywords
jumper wire
lead frame
semiconductor diode
utility
projection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN02204793U
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Chinese (zh)
Inventor
蔡上民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jielong Industry Co ltd
Original Assignee
Jielong Industry Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jielong Industry Co ltd filed Critical Jielong Industry Co ltd
Priority to CN02204793U priority Critical patent/CN2532582Y/en
Application granted granted Critical
Publication of CN2532582Y publication Critical patent/CN2532582Y/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/3701—Shape
    • H01L2224/37011—Shape comprising apertures or cavities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4007—Shape of bonding interfaces, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005—Shape
    • H01L2224/4009—Loop shape
    • H01L2224/40095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247—Connecting the strap to a bond pad of the item
    • H01L2224/40249—Connecting the strap to a bond pad of the item the bond pad protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8434—Bonding interfaces of the connector
    • H01L2224/84345—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/8438—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/84385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

Disclosed is an improved conductor bracket of a semiconductor diode which comprises a jumper wire, a chip and a conductor bracket; wherein, the convex block on one end of the jumper wire bracket is fixedly welded with the upper end of the chip; a convex block with a through hole is also projected on the other end of the jumper wire. The utility model is characterized in that a convex block on one end of the conductor bracket has a groove inside which is positioned correspondingly to the convex block on one end of the jumper wire bracket; the groove of the conductor bracket is square or rectangle to enhance the positioning with the convex on one end of the jumper wire bracket. The qualified rate of product is effectively increased. The cost and working time is reduced; meanwhile, the market competitiveness of the utility model is increased so that the utility model becomes more practicable.

Description

Improved semiconductor diode lead frame
Technical field
The utility model relates to a kind of semiconductor diode, particularly a kind of improved semiconductor diode lead frame.
Background technology
As shown in Figure 1, 2, semiconductor diode lead frame 30 mainly is that the semiconductor diode structure is connected together, as the rectifier bridge (Bridge) of 30 of diode chip for backlight unit 20 and lead frames; And general known lead frame 30 1 ends and chip 20 and 101 welding of jumper wire rack 10 projections are fixing, and 301 of other end projections and jumper wire rack 10 bottom surfaces, 102 welding set firmly; But jumper wire rack 10 two ends are when setting firmly with chip 20 and the 301 do welding of lead frame 30 projections, owing to often cause and to locate accurately that (jumper wire rack 10 projections 101 and bottom surface 102 are all the plane, so more easily slide), the lighter also causes failure welding product rate height (dry joint or insecure), severe patient undermines semiconductor diode lead frame 30 and jumper wire rack 10 and chip 20, welds dislocation, easily make product rejection, not only waste time and energy, and more increase cost.
So this creator is because the utility model through constantly breaking through and improving, is created then in the shortcoming place that above-mentioned known semiconductor diode wire frame uses.
Summary of the invention
The utility model is that a kind of improved semiconductor diode lead frame will be provided, and makes it improve the technical problem of welding yields and reducing cost with solution.
It is such solving the problems of the technologies described above the technical scheme that is adopted:
A kind of improved semiconductor diode lead frame, this semiconductor diode mainly includes jumper wire rack, chip, lead frame; Wherein this jumper wire rack one end projection then sets firmly with chip upper end welding, and also protruding tool one projection of end in addition, and be provided with a through hole in the projection is characterized in that: be provided with in this lead frame one end projection one with the groove of jumper wire rack one end projection relative positioning;
This lead frame groove is a square or rectangular.
Semiconductor diode of the present utility model is made of jumper wire rack, chip, lead frame; Wherein be preset with a groove in the lead frame one end projection, this groove and jumper wire rack hold set projection to form the reinforcement location in addition, can increase jumper wire rack one end projection positioning function, effectively improve the welding yields and reduce cost and reduce the activity duration, and can improve the market competitiveness, thereby solved the technical problem that makes it improve the welding yields and reduce cost.
The utility model is simple in structure, is preset with a groove in the utilization lead frame one end projection, and this groove and jumper wire rack hold set projection to form the reinforcement location in addition, and its advantage is as follows:
In the utility model lead frame projection to be preset with groove, the location was more accurate when jumper wire rack was implemented, and was difficult for causing during operation and slides and effectively improve welding yields and useful life.
In the utility model lead frame projection to be preset with groove, have reducing cost and reduce the activity duration, and have more product in the market competitiveness.
Description of drawings
Fig. 1 is that known semiconductor diode wire frame implements to use floor map;
Fig. 2 is a known semiconductor diode wire frame combination cross-sectional schematic;
Fig. 3 is a lead frame combination cross-sectional schematic of the present utility model;
Fig. 4 is a lead frame projection groove schematic diagram of the present utility model.
Embodiment
At first, see also shown in Fig. 3,4, semiconductor diode main member of the present utility model is made of jumper wire rack 1, chip 2, lead frame 3; Wherein this jumper wire rack 1 sets firmly in 11 of end projections and the welding of chip 2 upper ends, also protruding tool one projection 12 of the other end, and 12 one-tenth geometric modelings of this projection, and be provided with a through hole 121 in the projection 12; And it mainly improves and is characterised in that: be provided with a groove 311 in these lead frame 3 one end projections 31, this groove 311 can be and cooperates 12 one-tenths geometric modelings of jumper wire rack 1 projection and set firmly, and groove 311 particularly square or rectangular be the best; During enforcement, when jumper wire rack 1 one end projections 11 set firmly with the welding of chip 2 upper ends, other held 12 of projections to embed driving fits with lead frame 3 grooves 311 and welds and set firmly the location.
The above only is a preferred embodiment of the present utility model, when not limiting the scope that the utility model is implemented with it.All equalizations of being done according to the utility model claim change and modify, and all should still belong to the scope that the utility model patent contains.
In sum, the utlity model has advance and creativity, and the utility model do not see any publication or public use, meet the regulation of utility application important document, so propose utility application in accordance with the law when knowing.

Claims (2)

1, a kind of improved semiconductor diode lead frame, this semiconductor diode mainly includes jumper wire rack, chip, lead frame; Wherein this jumper wire rack one end projection then sets firmly with chip upper end welding, and also protruding tool one projection of end in addition, and be provided with a through hole in the projection is characterized in that: be provided with in this lead frame one end projection one with the groove of jumper wire rack one end projection relative positioning.
2, improved semiconductor diode lead frame according to claim 1, it is characterized in that: this lead frame groove is a square or rectangular.
CN02204793U 2002-02-10 2002-02-10 Improved semiconductor diode wire holder Expired - Lifetime CN2532582Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN02204793U CN2532582Y (en) 2002-02-10 2002-02-10 Improved semiconductor diode wire holder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN02204793U CN2532582Y (en) 2002-02-10 2002-02-10 Improved semiconductor diode wire holder

Publications (1)

Publication Number Publication Date
CN2532582Y true CN2532582Y (en) 2003-01-22

Family

ID=33686604

Family Applications (1)

Application Number Title Priority Date Filing Date
CN02204793U Expired - Lifetime CN2532582Y (en) 2002-02-10 2002-02-10 Improved semiconductor diode wire holder

Country Status (1)

Country Link
CN (1) CN2532582Y (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103503132A (en) * 2011-06-09 2014-01-08 三菱电机株式会社 Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103503132A (en) * 2011-06-09 2014-01-08 三菱电机株式会社 Semiconductor device
EP2720263A1 (en) * 2011-06-09 2014-04-16 Mitsubishi Electric Corporation Semiconductor device
EP2720263A4 (en) * 2011-06-09 2015-04-22 Mitsubishi Electric Corp Semiconductor device
CN103503132B (en) * 2011-06-09 2016-06-01 三菱电机株式会社 Semiconductor device
US9401319B2 (en) 2011-06-09 2016-07-26 Mitsubishi Electric Corporation Semiconductor device

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CX01 Expiry of patent term

Expiration termination date: 20120210

Granted publication date: 20030122