CN2511067Y - TV standard-time-code demodulator - Google Patents
TV standard-time-code demodulator Download PDFInfo
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- CN2511067Y CN2511067Y CN01273743U CN01273743U CN2511067Y CN 2511067 Y CN2511067 Y CN 2511067Y CN 01273743 U CN01273743 U CN 01273743U CN 01273743 U CN01273743 U CN 01273743U CN 2511067 Y CN2511067 Y CN 2511067Y
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Abstract
The utility model relates to a television standard time code demodulator which is used in precise time comparison. The circuit of the television standard time code demodulator is provided with eleven units. The television standard time code demodulator is characterized in that the video signal of CCTV is processed through synchronous separation to obtain composite synchronizing pulse, and is processed through a line-field separation circuit to obtain field pulse. Synchronizing pulse is selected from the field pulse after digital delay, and then identification pulse, second pulse and time code pulse are selected from a time code signal. Finally, BCD time is put out. The utility model has simple circuit, low code error rate, strong practicability, low cost and high precision. The television standard time code demodulator can be used in precise time comparison of satellite television. The television standard time code demodulator can also be widely used in the field of national defence, scientific research, traffic and communications.
Description
Technical field
The utility model belongs to standard time frequency measurement technical field, relates to a kind of television standard timing code demodulator when carrying out the chronometer time comparison.
Background technology
According to national standard, be inserted with frequency time signal in the TV signal of China Chinese Central Television (CCTV) (CCTV) at present.This signal is that benchmark produces with the cesium-beam atomic clock.The accuracy of second and standard frequency (comprising subcarrier) is better than 1 * 10
-12The moment accuracy of standard time is better than 3 μ s.The second of various places and the accuracy of standard frequency are better than 5 * 10 beyond Beijing
-12But it is former, the television standard time demodulation device that is used for timing and calibrating frequency that China uses is all developed in the eighties mostly voluntarily, because it comprises time and frequency demodulation two cover circuit, the circuit complexity, backward in technique, the error rate is high, time showing is often glimmered, influence its performance, and the cost height is not easy to apply.
Summary of the invention
At above-mentioned prior art situation, the purpose of this utility model is to users, especially needs the user of standard time, and reliable, a cheap television standard timing code modem device is provided.
According to the regulation of the GB7402-87 of State Standard Bureau (UDC621.391.8.08) standard " utilizing TV signal to transmit the standard time frequency ", China is inserted in standard time, standard frequency and platform sign indicating number information in the 16th row and the 329th row of TV signal flyback.Be benchmark with the synchronous forward position of row in the 16th row, be arranged in order and be: identification pulse, standard frequency, pulse per second (PPS) and sign indicating number constantly.Be arranged in order in the 329th row and be identification pulse, standard frequency and platform sign indicating number.According to this regulation, the utility model has designed a kind of time code signal that receives only the 16th row in the demodulation composite video signal, have only a cover demodulator circuit, promptly only select the timing code and the pps pulse per second signal of the 16th row for use, and do not select other signals in the 329th row and the 16th row for use.This demodulator has saved the clamp in the former demodulator, the circuit such as maintenance, phase demodulation, VCO, loop filtering of sampling, and its cost has only 1/8th of former demodulator, and from physically having solved the error code problem of time-code demodulation.
The technical scheme of the utility model television standard timing code demodulator is as described below: designed television standard timing code demodulator circuit includes synchronous separating unit (1), digital delay unit I (3), digital delay unit II (7), the 16th horizontal synchronizing pulse gating unit (4), shift pulse formation unit (9), serial parallel converting unit (10), a row separative element (2), digital shaping unit (5), identification pulse gating unit (6), pulse per second (PPS) gating unit (8), crystal oscillator unit (11).It is characterized in that: give synchronous separating unit (1) and digital shaping unit (5) arbitrary composite video signal in the CCTV one, two that receives, quadruplet (Phase Alternation Line system) program simultaneously; Synchronous separating unit (1) is isolated composite synchronizing signal, and composite synchronizing signal is isolated field system chronizing impulse through a row separative element (2), forms the strobe pulse of one 32 μ s through digital delay unit I (3); The clock signal of digital delay unit I (3) is the 1MHz signal that is come by crystal oscillator unit (11); Strobe pulse is selected the 16th horizontal synchronizing pulse output through the 16th row gating unit (4) from composite synchronizing signal; Identification pulse gating unit (6) is given in the 16th horizontal synchronizing pulse simultaneously, selects identification pulse from time code signal; The clock of identification pulse gating unit (6) is the 1MHz signal that is come by crystal oscillator unit (11); Time code signal comes from digital shaping unit (5), and digital shaping unit (5) directly amplifies composite video signal, shaping, and the output time code signal is given identification pulse gating unit (6), pulse per second (PPS) gating unit (8), string and converting unit (10) simultaneously; The identification pulse of selecting from identification pulse gating unit (6) is through digital delay unit II (7), successively form two pulse signal outputs, one is the second strobe pulse that forms 4 μ s after 25 μ s postpone, and one is the trigger impulse that postpones 0.1 μ s of formation through 29.6 μ s; The clock signal of digital delay unit II (7) is the 10MHz signal that comes from crystal oscillator unit (11); The second strobe pulse of 4 μ s is selected a second signal through pulse per second (PPS) gating unit (8) from time code signal, and exports the 1PPS signal after broadening, buffering; 0.1 the trigger impulse of μ s is transported to shift pulse and is formed unit (9), triggers the 1MHz shift pulse that forms one 20 μ s; The clock signal that shift pulse forms unit (9) is the 10MHz signal that is come by crystal oscillator unit (11); The shift pulse of 20 μ s is given string and converting unit (10), converts the serial timing code in the time code signal to parallel BCD (two/decimal system) timing code output, content sometimes, minute, second.
Feature of the present utility model also is: composite video signal is a complex digital signal through digital shaping unit (5) output; Based on the time relationship of time code signal and field pulse, the 16th horizontal synchronizing pulse strictness, the composite synchronizing signal of synchronous separating unit (1) output is carried out field synchronization separate; With the field pulse is reference point, after the delay of digital delay unit I (3) 928 μ s, produces the strobe pulse of one 32 μ s, selects the 16th horizontal synchronizing pulse; The identification pulse gating unit is selected the identification pulse in the time code signal with the 16th behavior reference point; Identification pulse forms the strobe pulse of one 4 μ s after the delay of digital delay unit II (7) 25 μ s, select pps pulse per second signal output by the pulse per second (PPS) gating unit; Identification pulse simultaneously at digital delay unit II after the delay of 29.6 μ s, give shift pulse with the trigger impulse of 0.1 μ s and form unit (9), the 1MHz shift pulse that forms 20 μ s gives string and converting unit (10) is changed time code signal.Because identification pulse, pulse per second (PPS), time code signal are directly and select from the complex digital signal of digital shaping unit (5) output here; Save the temporal information of isolating the 16th row in standard time in the past, second demodulator of PM signal PM earlier from complex digital signal, from temporal information, selected the redundant circuit of identification pulse, pulse per second (PPS), time-code again.Clock signal selected in each unit provides by digital crystal oscillator unit (11).Counting circuit among the digital delay unit I (3) adopts the binary counter chip (MC4040) of a 4K position, can directly obtain forward position 928 μ s, the back strobe pulse along one the 32 μ s of 960 μ s; Guaranteed accurately choosing of back the 16th horizontal pulse signal.Digital delay unit II adopts the clock pulse signal of crystal oscillator unit 10MHz, and the decimal that can obtain 29.6 μ s postpones, and forms circuit so that trigger shift pulse.10MHz is adopted in the counter clock pulse that shift pulse forms in the unit (9), the triggering forward position of 20 shift pulses is just in time dropped in the middle of the time-code code element of 1 μ s, and the phase jitter of signal can not cause the mistake displacement of time-code and the phase drift that is caused by frequency difference.
Description of drawings
Fig. 1 is the operation principle block diagram of the designed television standard timing code of the utility model demodulator.
Fig. 2 is the schematic diagram of a kind of practical circuit of designed television standard timing code demodulator.
Wherein: digital corresponding in each frame of broken lines of numeral and Fig. 2 in each square frame of Fig. 1.
Below in conjunction with Fig. 1 and Fig. 2 present design is elaborated.
1 is synchronous separating unit (circuit) among the figure: give synchronous separating unit and digital shaping unit the CCTV composite video signal that receives simultaneously.The amplifier that sync separator that the emitter follower that synchronous separating unit is made of triode T1, triode T2 constitute and field effect transistor T3 constitute is formed, and field effect transistor T3 has buffer action.Signal after field effect transistor T3 amplifies is through U2:F (7404) paraphase, by its 12 pin output composite synchronizing signal.Composite synchronizing signal is divided two-way, and one the tunnel gives a row separative element, and one the tunnel gives the 16th row gating unit.
2 are a row separative element (circuit) among the figure: composite synchronizing signal is sent into the second order integrating circuit of being made up of R15, C1, R16, C2, and has utilized the switching characteristic of transistor T 4, when integrated value during greater than 0.7V, and switch transistor T 4 conductings, output low level; When integrated value during less than 0.7V, T4 is by the output high level.Form a field pulse signal thus, after the U2:E paraphase, export by 10 pin.
3 is digital delay unit (circuit) I among the figure: the rising edge of use synchronization pulse triggers d type flip flop U3:B (7474), makes its 8 pin Q end become low level, the 1MHz clock count that counter U4 comes with crystal oscillator.When counter meter during,, trigger U6:B (7474) in two inputs positive pulse of 11 pin output with door U8:D (7408) to 928 μ s; When rolling counters forward during to 960 μ s, the negative pulse of 3 pin output at two NAND gate U5:A (7400) makes trigger U3:B, U6:B return-to-zero.8 pin of U3:B become high level, and counter U4 return-to-zero stops counting, so just export the strobe pulse of one 32 μ s at the Q of U6:B end.
4 is the 16th row gating unit (circuit) among the figure: the 32 μ s strobe pulses that come by digital delay unit I and composite synchronizing signal through U8:C with, select the 16th every trade lock-out pulse, drive through buffering and export.
5 are digital shaping unit (circuit) among the figure: composite video signal (being the CCTV vision signal) is through comparison circuit U19 (LM311), and from digital time code signal of 7 pin output, potentiometer W1 is in order to adjust sampled level.Identification pulse gating unit, pulse per second (PPS) gating unit, serial parallel converting unit are given in this signal output simultaneously.
6 is identification pulse gating unit (circuit) among the figure: U6:A is triggered on the back edge with the 16th horizontal synchronizing pulse, the identification pulse of forming via U6:A, U5:B, U9:A (binary counter) forms circuit, strobe pulse at one 10 μ s of the Q of U6:A end output, with time code signal U8:A with, gating goes out identification pulse.
7 is digital delay unit (circuit) II among the figure: trigger U10:B (7474) by identification pulse, make counting circuit U9:B (74393), U11 (74390) count, during counting output 25 μ s, trigger U10:A, count down to 29 μ s, 8 ends output return-to-zero pulse at gun stocks U2:D, make trigger U10:A return-to-zero, rolling counters forward goes to trigger the shift pulse unit during to 29.6 μ s, make the U10:B return-to-zero after the paraphase simultaneously, counter stops counting.One 4 wide strobe pulse of μ s of Q end output of U10:A.The clock pulse of used here digital delay counter is 10MHz, chooses the strobe pulse of 4 μ s, and the strobe pulse that can make second is selected pulse per second (PPS) to greatest extent, is unlikely to falsely drop other signals of the front and rear of pulse per second (PPS) again.
8 are pulse per second (PPS) gating unit (circuit) among the figure: by the strobe pulse of 4 next μ s of digital delay unit II, select pulse per second (PPS) in the time code signal through U8:B (7408), pass through U17:A (74123) monostable circuit again, with the pulse per second (PPS) broadening is 1pps (one of the per second) pulse of 100ms, drives output through U1:A (74128) buffering again.
9 are shift pulse formation unit (circuit) among the figure: the trigger impulse that is come by digital delay unit II removes to trigger U3:A (7474), the Q end of U3:A becomes low level, make decade counter U16 and U15:B counting, 20 μ s are after the U2:C return-to-zero, and counting stops.So just at 20 shift pulses that frequency is 1MHz of the Q3 of U15:B output.The decimal that counter adopts the clock pulse of 10MHz can make digital delay unit II obtain 29.6 μ s postpones, and makes 20 1MHz shift pulses trigger the forward position and just in time is in the middle of the 1 μ s code element of time code signal; Simultaneously can overcome the phase drift that causes shift pulse by the frequency difference between crystal oscillator frequency and the time-code symbol frequency, also can not produce time-code displacement error code.Because the drift of the maximum phase of 10MHz clock pulse can not surpass 1 cycle (i.e. 0.1 μ s), and the time-code code-element period is 1 μ s.
10 for serial parallel converting unit (circuit) among the figure: by 20 shift pulses of the 9 pin output of U15:B, time code signal is carried out shift LD via shift register (74164) U12, U13 and U14 circuit, in parallel BCD of the output of shift LD output (two the decimal system) timing code, when content is, minute, second.
11 are crystal oscillation unit (circuit) among the figure: it selects a common 10MHz numeral crystal-oscillator circuit for use.10MHz gives digital delay unit I and identification pulse gating circuit as counting clock pulse through U15:A frequency division output 1MHz clock signal, and 10MHz gives digital delay unit II and shift pulse forms the unit.
Embodiment
The binary coded decimal time code of the utility model output is connected through decoder, display or with clock display circuit in needing any device that the standard time shows, just can demonstrate the standard time the time, minute, second.The 1pps of output can be used as high-precision timing signal.After the utility model adds decoding, demonstration, power supply, just can become one independently telechron and satellite receiver combine, just can constitute the satellite television clock; The utility model also can be used as parts and is installed in other equipment, for example is contained in the television set, and television set has had the standard time function.Be contained in the computer, can be used as computer network standard lock in time.Can also provide a unified standard time for station, harbour, office building.By as can be seen above-mentioned, the utility model does not need to obtain high-precision frequency signal as a special TV time signal demodulator, and its design is more simple, be more suitable for more user and use, its second the Signal Separation precision: 5ns; Synchronization accuracy: terrestrial microwave 0.1 μ s; Satellite is looked altogether: 0.1 μ s.The utility model can be widely used in many fields such as national defence, scientific research, traffic, communication.
Claims (4)
1, a kind of television standard timing code demodulator, include synchronous separating unit, digital delay unit, the 16th horizontal synchronizing pulse gating unit, shift pulse gating unit, serial parallel converting unit, a row separative element, digital shaping unit, the earlier logical unit of identification pulse, pulse per second (PPS) gating unit, crystal oscillator unit; It is characterized in that: composite video signal is given synchronous separating unit and digital shaping unit simultaneously; Synchronous separating unit is isolated composite synchronizing signal, and composite synchronizing signal is isolated field system chronizing impulse through a row separative element, forms the strobe pulse of one 32 μ s through digital delay unit I; The clock signal of digital delay unit I is the 1MHz signal that is come by the crystal oscillator unit; Strobe pulse is selected the 16th horizontal synchronizing pulse output through the 16th row gating unit from composite synchronizing signal; The identification pulse gating unit is given in the 16th horizontal synchronizing pulse simultaneously, selects identification pulse from time code signal; The clock of identification pulse gating unit is the 1MHz signal that is come by the crystal oscillator unit; Time code signal comes from digital shaping unit, and digital shaping unit directly amplifies composite video signal, shaping, and the output time code signal is given identification pulse gating unit, pulse per second (PPS) gating unit, string and converting unit simultaneously; The identification pulse of selecting from the identification pulse gating unit successively forms two pulse signals through digital delay unit II, and one is to postpone the second strobe pulse that the back forms 4 μ s through 25 μ s, and one be the trigger impulse through 0.1 μ s of 29.6 μ s delay formation; The clock signal of digital delay unit II is the 10MHz signal that comes from the crystal oscillator unit; The second strobe pulse of 4 μ s is selected a second signal through the pulse per second (PPS) gating unit from time code signal, and exports the 1PPS signal after broadening, buffering; 0.1 the trigger impulse of μ s to shift pulse forms the unit, triggers the 1MHz clock pulse that forms one 20 μ s; The clock signal that shift pulse forms the unit is the 10MHz signal that is come by the crystal oscillator unit; String and converting unit are given in the shift clock pulse of 20 μ s, convert the serial timing code in the time code signal to parallel binary coded decimal time code output, content sometimes, minute, second.
2, television standard timing code demodulator according to claim 1 is characterized in that: composite video signal is a complex digital signal through digital shaping unit output; Simultaneously the composite synchronizing signal of synchronous separating unit output is carried out separated in synchronization; With the field pulse is reference point, after digital delay unit I928 μ s postpones, produces strobe pulse, selects the 16th horizontal synchronizing pulse; With the 16th behavior reference point, select the identification pulse in the time code signal again; Identification pulse produces strobe pulse behind digital delay unit II, select pulse per second (PPS); Identification pulse is given shift pulse simultaneously and is formed the unit, forms shift pulse, delivers to the serial parallel converting unit again time code signal is changed.
3, television standard timing code demodulator according to claim 2 is characterized in that: the counting circuit among the digital delay unit I adopts the binary counter chip of a 4K position.
4, according to the true timing code demodulator of described any television standard of claim 1 to 3, it is characterized in that: after its binary coded decimal time code output connects decoder and display device, promptly become telechron.
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| Application Number | Priority Date | Filing Date | Title |
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| CN01273743U CN2511067Y (en) | 2001-12-25 | 2001-12-25 | TV standard-time-code demodulator |
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| CN01273743U CN2511067Y (en) | 2001-12-25 | 2001-12-25 | TV standard-time-code demodulator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109996105A (en) * | 2018-01-02 | 2019-07-09 | 深圳市巨烽显示科技有限公司 | A kind of processing method and processing device of video synchronization signal |
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2001
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109996105A (en) * | 2018-01-02 | 2019-07-09 | 深圳市巨烽显示科技有限公司 | A kind of processing method and processing device of video synchronization signal |
| CN109996105B (en) * | 2018-01-02 | 2021-07-30 | 深圳市巨烽显示科技有限公司 | Method and device for processing video synchronization signal |
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