CN2495004Y - Experimental facility for computer composition principle - Google Patents

Abstract

The utility model relates to an experimental facility for computer composition principles, which is composed of a data path and a control device, wherein the data path is connected with the control device by a conducting wire which can be plugged and pulled. The data path comprises a main arithmetic device, two data registers with multi-way switches, two tristate gates, a register file, a temporary register, a dual-port memory, a left address register, a right address register with a multi-way switch, an interrupt address register with a tristate gate, a program counter, etc. Students themselves can design the control device and conduct the running water experiment by using the experimental facility, so that the understanding on computer composition principle and computer architecture can be deepened.

Description

A kind of experimental provision of Principles of Computer Composition

The utility model relates to a kind of experimental provision of Principles of Computer Composition, belongs to computer teaching experimental apparatus technical field.

Principles of Computer Composition are very important basic courses of university.The experimental provision of this course has some kinds in the market.For example, the TEC-2 Experiment System of Computer Composition of Tsinghua Timefound Co., Ltd.'s production.In the master data path of current experiments device, primary memory adopts common one-port memory on these markets, and data path is only supported a data bus; Controller adopt many in, device is formed on a small scale, the signal of controller inside adopts the printed conductor in the printed board to connect; Signal between controller and the data path (comprising that signal that controller is sent to data path and data path are sent to the signal of controller) is connected and adopts fixedly connected mode, generally realizes with the printed conductor in the printed board.

There is following shortcoming in these computer component principle experiment devices:

1,, therefore can not carry out the flowing water experiment because only there is a data bus data path inside.

2, since controller adopt in, device realizes that controller is fixedlyed connected by the printed conductor in the printed board with data path on a small scale, controller can't be replaced, the student can't carry out conventional hard wire design of Controller and the experiment of flowing water hard wire.

The purpose of this utility model is the experimental provision experiment of a kind of Principles of Computer Composition of design, so that realize flowing water experiment and the experiment of conventional hard wire design of Controller on this experimental provision.

The experimental provision of the Principles of Computer Composition of the utility model design, form by data path and controller, connected by pluggable lead between data path and the controller, described data path comprises the operand register and the order register of interrupt address register, the programmable counter of the data register of main arithmetical unit, two band multi-way switchs, two triple gates, register file, temporary register, dual-ported memory, left address register, the right address register of band multi-way switch, a band triple gate, auxilliary arithmetical unit, band multi-way switch.The annexation of each part mentioned above is: from the instruction address of programmable counter taking-up, be sent to the right address register of band multi-way switch, the instruction address that provides according to this register, take out instruction from the dual-ported memory right output port and be sent to instruction bus, order register receives the instruction on the instruction bus, and it is kept in the order register; Instruction operation code in the order register is sent to controller, and controller produces the required various control signals of this instruction manipulation according to this operational code; Instruction operands in the order register is sent to register file, and according to above-mentioned control signal, takes out two arithmetic operation numbers of instruction operands appointment from register file, is sent to the data register of two band multi-way switchs respectively and deposits; The control signal that main arithmetical unit is sent here according to controller is carried out computing to two operands; Operational data result is sent to data bus, and by data bus, writes in the dual-ported memory, or send temporary register to preserve earlier, writes then in the register by the instruction operands appointment in the register file; Operation token is the result send controller, to produce control signal; One circuit-switched data of reading in the register file is sent to the data register of a band multi-way switch, be sent to data bus by triple gate simultaneously, and be sent to left address register by data bus, address as dual-ported memory, according to this address, the data of reading from the dual-ported memory left port are sent to data bus, are sent to temporary register by data bus and deposit, and write in the register file register by the operational code appointment of instruction then; Instruction operands in the order register is sent to the operand register of band multi-way switch simultaneously and preserves, auxilliary arithmetical unit calculates new program counter value according to the value of operand register and the value of programmable counter, and be sent to programmable counter and preserve, use for taking off an instruction; Instruction address in the programmable counter is sent to the interrupt address register of band triple gate simultaneously, preserves interrupt address during for interruption and uses, and interrupt address is sent to data bus by triple gate; The value of data switch is sent to data bus through triple gate, and pass through data bus, this value is sent to the register, temporary register, the data line of dual-ported memory right output port, left address register of two band multi-way switchs, the right address register of band multi-way switch and the operand register of band multi-way switch simultaneously, for putting the number uses.

Adopt Exp. of Computer Organization Principles device of the present utility model, realized the flowing water experiment that the current experiments device can not be finished.On new experimental provision, the student can design conventional hard wire controller or the flowing water hard wire controller of oneself according to the data path that the utility model provides.By own CONTROLLER DESIGN with carry out flowing water experiment, deepened the understanding of student to Principles of Computer Composition and Computer Systems Organization.This all has very great help for improving Principles of Computer Composition course and Computer Systems Organization course teaching quality.

Description of drawings:

Fig. 1 is the data path block diagram of prior art.

Fig. 2 is the data path block diagram of the utility model design.

Below in conjunction with accompanying drawing, describe content of the present utility model in detail.

From structural drawing shown in Figure 1 as can be seen, what use in the data path of prior art is common one-port memory, has only a data bus, there is not independent instruction bus, controller is by in many, on a small scale device constitutes, adopt the printed conductor in the printed board to connect between controller and the data path, controller can not be replaced.

And in the structure as shown in Figure 2 of the utility model design, the data path part designs by the flowing water requirement, and the data path that is made of arithmetical unit, storer and order register etc. uses data bus and two internal buss of instruction bus rather than single data bus.Adopt the dual-port static storer of support dual bus rather than the static memory of single port.

Among Fig. 2, U1 is main arithmetical unit, to data A and B add, subtract, with or, computing such as multiplication and division, the data result that computing obtains is sent to data bus.The sign result that computing obtains (for example carry flag bit) is sent to controller.

U2 is the data register 1 of band multi-way switch.The B data port of data register 1 and main arithmetical unit U1 links to each other, and is the arithmetic operation number register, and an operand of computing is provided to arithmetical unit U1.Data register 1 receives from the B port data of register file U5 or from the data of data bus by multi-way switch.

U3 is the data register 2 of band multi-way switch.The A data port of data register 2 and main arithmetical unit U1 links to each other, and is the arithmetic operation number register, and another operand of computing is provided to main arithmetical unit U1.Data register 2 receives from the data of register file A port or from the data of data bus by multi-way switch.

U4 is a triple gate 1, and the B port data of receiving register heap U5 is put into the B port data of U5 on the data bus.

U5 is a register file.Comprise several registers in the register file, it has three control ports.Wherein A port and B port are used for read operation, and the W port is used for write operation, and three ports can be operated simultaneously.Register in the register file is read the data register 2 (U3) that is sent to the band multi-way switch from the A port.The data register 1 (U2) and the triple gate U4 that are sent to the band multi-way switch that register in the register file is read from the B port.Write register among the register file U5 from the data of temporary register U6 by the W port.

U6 is a temporary register, is used for temporarily preserving the operational data result of arithmetical unit U1.It receives from the data on the data bus.Register file U5 is sent in the output of temporary register.

U7 is a dual-ported memory.It has left and right two ports, and two ports can carry out the reading and writing operation simultaneously.The data line of left port connects data bus, and the left port address connects left address register (U8), and left port can be carried out the reading and writing operation.The right output port data line is connected with instruction bus, outputs to order register U14, the right address register (U9) of right output port address tape splicing multi-way switch.Right output port is used as a read port.

U8 is left address register, and output connects the address of dual-ported memory left port.U8 receives data from data bus, provides storer left port reading and writing operation required storage address.

U9 is the right address register of band multi-way switch.Right address register output connects dual-ported memory right output port address, provides the read operation of storer right output port required storage address.Right address register receives data by multi-way switch from data bus or programmable counter.

U10 is the interrupt address register of band triple gate, and interrupt address register receives data from programmable counter, and the value of save routine counter when taking place to interrupt is as interrupt address.The output of interrupt address register is sent to data bus through triple gate.

U11 is a programmable counter, and it provides the current address of program.U9 is sent in its output, is sent to dual-ported memory U7 through U9, uses for instruction fetch from dual-ported memory U7.Auxilliary arithmetical unit U12 is sent in the output of U11 simultaneously, uses for calculating new program counter value.Interrupt address register also is sent in the output of U11, uses for preserving interrupt address.Programmable counter receives the value of next programmable counter from auxilliary arithmetical unit.

U12 is auxilliary arithmetical unit.The data that data that it is sent here according to operand register U13 and programmable counter U11 send here are calculated the value of new programmable counter, are sent to programmable counter U11.

U13 is the operand register of band multi-way switch.Auxilliary arithmetical unit U12 is sent in the output of operand register, as an arithmetic operation number use of auxilliary arithmetical unit.Operand register is by the Data Source of multi-way switch 4 mask registers 4, and it receives data from order register U14 or data bus.

U14 is the instruction register, is used for storage instruction.It receives instruction from dual-ported memory, and instruction operation code is sent to controller, produces various control signals for controller and uses.Instruction operands is sent to the operand register U13 of band multi-way switch, is sent to U12 through U13, as an arithmetic operation number of auxilliary arithmetical unit, uses for producing new program counter value.Instruction operands also is sent to register file, in order to determine register number that A port and B port are read from register file and the register number that writes back from the W port.

U15 is a triple gate 2, is used for the value of data switch is sent to the data data bus.Pass through data bus, the data available switch puts number for two data registers, put the address for the right address register of left address register, band multi-way switch, write data to the dual-ported memory right output port, put initial value to programmable counter by the operand register and the auxilliary arithmetical unit of band multi-way switch.

U16 is a controller, and controller receives the instruction operation code of order register U14 and the sign result of main arithmetical unit, for example carry flag etc.Controller produces the required various control signals of normatron operation, uses for U1-U15.Dotted line among Fig. 2 represents that signal connects with pluggable lead and realizes, rather than fixedly connected by the realization of the printed conductor in the printed board.

Among Fig. 2, the signal that dots controller and data path is connected, and the implication of dotted line refers to these signal wires and connects with the lead realization that can plug and unplug.When these leads are pulled out, reconfiguration is on the controller of student's design the time, and then the controller of student's design replaces original controller to realize control to normatron.The controller of student's design is made of 1 ISP device, after the student designs the controller of oneself, only need import design proposal on computers, by software to processing such as its design proposal compile, and computed parallel port, download in the ISP chip on the experimental provision by an ISP download cable, then the ISP device has just become a controller.With an ISP device, just can finish the design of a conventional hard wire controller or flowing water hard wire controller.

Claims (1)

1, a kind of experimental provision of Principles of Computer Composition, it is characterized in that this experimental provision is made up of data path and controller, connected by pluggable lead between data path and the controller, described data path comprises main arithmetical unit, the data register of two band multi-way switchs, two triple gates, register file, temporary register, dual-ported memory, left side address register, the right address register of band multi-way switch, the interrupt address register of a band triple gate, programmable counter, auxilliary arithmetical unit, the operand register and the order register of band multi-way switch; The annexation of each part mentioned above is: from the instruction address of programmable counter taking-up, be sent to the right address register of band multi-way switch, the instruction address that provides according to this register, take out instruction from the dual-ported memory right output port and be sent to instruction bus, order register receives the instruction on the instruction bus, and it is kept in the order register; Instruction operation code in the order register is sent to controller, and controller produces the required various control signals of this instruction manipulation according to this operational code; Instruction operands in the order register is sent to register file, and according to above-mentioned control signal, takes out two arithmetic operation numbers of instruction operands appointment from register file, is sent to the data register of two band multi-way switchs respectively and deposits; The control signal that main arithmetical unit is sent here according to controller is carried out computing to two operands; Operational data result is sent to data bus, and by data bus, writes in the dual-ported memory, or send temporary register to preserve earlier, writes then in the register by the instruction operands appointment in the register file; Operation token is the result send controller, to produce control signal; One circuit-switched data of reading in the register file is sent to the data register of a band multi-way switch, be sent to data bus by triple gate simultaneously, and be sent to left address register by data bus, address as dual-ported memory, according to this address, the data of reading from the dual-ported memory left port are sent to data bus, are sent to temporary register by data bus and deposit, and write in the register file register by the operational code appointment of instruction then; Instruction operands in the order register is sent to the operand register of band multi-way switch simultaneously and preserves, auxilliary arithmetical unit calculates new program counter value according to the value of operand register and the value of programmable counter, and be sent to programmable counter and preserve, use for taking off an instruction; Instruction address in the programmable counter is sent to the interrupt address register of band triple gate simultaneously, preserves interrupt address during for interruption and uses, and interrupt address is sent to data bus by triple gate; The value of data switch is sent to data bus through triple gate, and pass through data bus, this value is sent to the register, temporary register, the data line of dual-ported memory right output port, left address register of two band multi-way switchs, the right address register of band multi-way switch and the operand register of band multi-way switch simultaneously, for putting the number uses.