CN2456436Y - Phaselocked loop HF/MF induction heater - Google Patents
Phaselocked loop HF/MF induction heater Download PDFInfo
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- CN2456436Y CN2456436Y CN 00253419 CN00253419U CN2456436Y CN 2456436 Y CN2456436 Y CN 2456436Y CN 00253419 CN00253419 CN 00253419 CN 00253419 U CN00253419 U CN 00253419U CN 2456436 Y CN2456436 Y CN 2456436Y
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Abstract
The utility model relates to a phaselocked loop high-frequency/medium-frequency IGBT induction heater, composed of a power regulation and signal detection circuit, a medium-frequency signal sampling and inverted start control circuit, a phaselocked loop frequency tracking and pulse distributing circuit, a time delay circuit, an IGBT drive circuit and a frequency display circuit; the circuits are connected in sequence. The starting of the device can be automatically switched through an electronic switch, the automatic tracking of loaded oscillation frequency can be realized through an integrated phaselocked loop circuit, and the time of phase conversion for an inverter can be controlled by the time delay circuit. The utility model has the maximum advantage that the circuit can be suitable for two inverter circuit forms of parallel resonance and series resonance through simple recombination.
Description
The utility model relates to high medium-frequency induction heating technology, and the high intermediate frequency IGBT of a kind of phase-locked loop is provided induction heating equipment especially.
Intermediate frequency induction heating device is widely used in operations such as the melting of metal material and goods, diathermanous, heat treatment and welding, it is fast to have firing rate, characteristics such as oxide layer is thin, iron loss is few, the easy control of furnace temperature, so far, intermediate frequency induction heating device has experienced three developing periods: be respectively intermediate frequency generator group, controllable silicon intermediate frequency device and novel IGBT intermediate frequency device.
The intermediate frequency generator group as far back as this century the '20s just be used for induction heating, succeeded in developing controllable silicon intermediate frequency device up to about 1966, the intermediate frequency generator group just is eliminated gradually.To the nineties, development along with power electronic technology, certainly shutoff type high power device one insulated gate double-basis transistor (IGBT) has appearred, it is a kind of multiple device, integrate VMOS field effect transistor voltage drive and the big electric current low on-resistance of Darlington power transistor characteristic, the characteristics that the MOSFET pipe is arranged during control have the characteristics of bipolar transistor during conducting.It has high speed, high pressure, high-power, easily drive and premium properties such as low on-state pressure drop, IGBT is used for induction heating equipment, IGBT intermediate frequency device has just appearred.
The inverter control circuit of Kai Fa IGBT intermediate frequency induction heating device adopts the phase-locked control of scm software in advance, its principle is that pulse signal of single-chip microcomputer output is as current signal, detect the voltage of intermediate frequency signal of inversion resonant tank then by the voltage of intermediate frequency instrument transformer, judge the time difference of current signal and voltage signal by software, this time difference is the time T d of current phase leading voltage phase place, Td should be controlled in the regular hour scope, if Td overlong time, the inclined to one side capacitive of illustrative system is excessive, should reduce the frequency of trigger impulse, and when the Td time is too short, the inclined to one side capacitive of illustrative system is too small, thereby should improve the frequency of trigger impulse, single-chip microcomputer is by constantly detecting, judge and correction, follow the tracks of the variation of load resonant frequency all the time.
This scm software control circuit of phase locking is restricted when using:
Because sort circuit can only be used for the Parallel Resonant inverter circuit, above operation principle is also at the Parallel Resonant inverter circuit.Intermediate frequency induction heating device is divided into two kinds of parallel connection type and tandem types by inverting, and parallel resonance belongs to current-mode inverter circuit, is fit to middle low power intermediate frequency device, and all to use series resonance be voltage source type inverter and high-power intermediate frequency device is for reducing line loss.Because inverter is all with on-off mode work, and its power device be controllable silicon or IGBT all is a voltage sensitivity, and can not bear too high voltages impacts, and therefore, requiring its resonant load is inclined to one side capacitive load, i.e. current phase leading voltage phase place.The current phase leading voltage phase place of capacitive load, electric current can suddenly change, voltage can not suddenly change, and the voltage-phase leading current phase place of inductive load, voltage can suddenly change, electric current can not suddenly change.Parallel Resonant inverter, its DC power supply are constant-current source, and what inverter controller provided is current signal, detection be voltage signal, current phase leading voltage phase place, the load resonant loop works is at capacitive state partially.And for the series resonance-type inverter, its DC power supply is a constant pressure source, what inverter controller provided is voltage signal, what detect is the electric current letter, at this moment control with the scm software control circuit of phase locking, voltage-phase leading current phase place, the load resonant loop works is at perceptual partially state, and this situation is unallowed;
The operating frequency range of sort circuit is limited in addition, is subjected to the restriction of clock frequency, and the scm software control circuit of phase locking can only be used for the following intermediate frequency device of 10KHz.For the high-frequency device of operating frequency more than 10KHz, sort circuit is powerless, thereby has limited its range of application.
The purpose of this utility model is to provide a kind of phase-locked loop high intermediate frequency induction heating device, it promptly is the high intermediate frequency IGBT of a kind of phase-locked loop induction heating equipment, its inverter control circuit is by the power adjustments signal deteching circuit, if signal sampling and inversion start-up control circuit, phase-locked loop frequency is followed the tracks of and pulse distributor, time delay circuit, IGBT drive circuit and frequency display circuit connect in proper order and form, its connection connects with if signal sampling and shaping circuit for the output of power adjustments signal deteching circuit, its output encircles the connection of frequency-tracking and pulse distributor mutually with trivial, this output connects with IGBT drive circuit input again, and drive circuit output directly connects with frequency display circuit.
The core of inverter control circuit is frequency-tracking and pulse distribution (as shown in Figure 1).
The frequency-tracking function realizes by phase-locked loop intergrated circuit CD4046.
Phase-locked loop is made of three elementary cells: phase comparator, low pass filter, voltage-controlled oscillator, its connection is that the input of phase comparator is input signal and VCO output, comparator output is joined through low-frequency filter and voltage controlled oscillator input, its output feeds back to the phase comparator input again as VCO output (as shown in Figure 2), the trivial ring mutually of CD4046 has comprised phase comparator and two unit of voltage-controlled oscillator, use is that external low pass filter can constitute complete phase-locked loop, its circuit (by shown in Figure 3).
If signal sampling and shaping circuit, its connection be photoelectrical coupler from power adjustments signal deteching circuit two inputs, photoelectrical coupler is exported directly as amplifier LM339 input, its output is finished self-oscillation through triode 8550 output voltage V.
Advantage of the present utility model: circuit structure is simple, owing to adopted phase-locked loop to follow the tracks of frequently and pulse distributor, makes circuit working stable, control flexibly, have high speed, high pressure, high-power, easily drive and premium properties such as low on-state pressure drop.
The circuit working principle:
The phase comparator II is the data storage network of an edge control, and it is made up of 4 triggers, control gate and tristate output circuits.Because input signal only works at rising edge, so unrestricted to the duty ratio of input signal.When AIN end frequency input signal was higher than BIN end frequency input signal, its output voltage of low-pass filtering rose; Otherwise when BIN end frequency input signal was higher, its output voltage of filtering descended; When the frequency of two input signals and phase place all equated, output was a high-impedance state, and its output voltage of filtering remains unchanged, and PCP is output as " 1 " simultaneously, and expression is in the lock state.If when no external signal was imported, the comparator II made VCO be in minimum frequency of oscillation.
The utility model circuit utilizes the phase-locked function of phase comparator II to realize automatic frequency tracking, be about to voltage signal and current signal respectively as two inputs of phase comparator, behind pll lock, the phase difference of load voltage and load current is zero, and this moment, load circuit was a resonance condition.If at current signal input joining day delay circuit, make current phase leading voltage phase place, can make load circuit be operated in inclined to one side capacitive state.
The design of pulse distributor will be fit to the requirement of two kinds of invertings: parallel resonance belongs to current-mode inverter circuit, for avoiding the inverter upper and lower bridge arm to end simultaneously, cause current break, cause voltage jump and make power device bear the overvoltage impact by stray inductance, the change of current must be followed and open the principle of afterwards turn-offing earlier, interpulsely must leave enough overlapping time opening and turn-off.Series resonance belongs to voltage source type inverter, and is straight-through for avoiding the inverter upper and lower bridge arm, and the change of current must be followed and close the principle of having no progeny and opening earlier, interpulsely must leave enough Dead Times turn-offing with opening.
Inverter control circuit is followed the tracks of the variation of load resonant frequency by gathering intermediate-freuqncy signal by phase-locked loop circuit.During power initiation, intermediate-freuqncy signal begins to increase from 0V, before the offset voltage of voltage less than shaping circuit LM339, LM339 is output as the high frequency clutter, after the offset voltage of voltage greater than LM339, intermediate-freuqncy signal is set up, the intermediate frequency square-wave signal behind the LM339 output Shaping.Therefore the startup of power supply will have it to swash the transfer process that arrives self-excitation, before intermediate-freuqncy signal is set up, suppresses the high frequency noise signal of LM339 output, allow load circuit be operated in the external excited oscillation state, after intermediate-freuqncy signal is set up, just follow the tracks of the load frequency change, carry out self-oscillation by phase-locked loop.This transfer process is finished by the power adjustments signal deteching circuit.
When load circuit is operated in the external excited oscillation state, for satisfying the requirement of the inclined to one side capacitive of load, for the Parallel Resonant inversion circuit, the external excited oscillation frequency will be higher than the self-oscillation frequency of load, and for the series resonance-type inversion circuit, the external excited oscillation frequency will be lower than the self-oscillation frequency of load, and the utility model is realized being swashed to self-oscillatory conversion by it automatically by electronic switch (triode 8550).
The utility model detailed circuit structure is provided by following examples and accompanying drawing.(with the parallel resonance is example, and series resonance has explanation in addition)
Fig. 1 is the utility model phase-locked loop inverter control circuit logic schematic diagram;
Fig. 2 is the trivial block diagram that encircles mutually of the utility model;
Fig. 3 is the utility model inverter control circuit electrical schematic diagram;
Fig. 4 is the utility model power adjustments signal deteching circuit schematic diagram;
Fig. 5 is the utility model if signal sampling and inversion start-up control circuit electrical schematic diagram;
Fig. 6 follows the tracks of and the pulse distributor electrical schematic diagram for the utility model phase-locked loop frequency;
Fig. 7 is the utility model time delay circuit electrical schematic diagram;
Fig. 8 is the utility model power transistor drive circuit electrical schematic diagram;
Fig. 9 is the utility model frequency display circuit.
Circuit is described in detail as follows:
By Fig. 4 power adjustments signal deteching circuit, the start-up course of inverter is a load circuit elder generation external excited oscillation, and after intermediate-freuqncy signal foundation, load circuit transfers self-oscillation again to.The power adjustments signal deteching circuit detects the output of rectifying part power adjustments current potential P1, be added to end of oppisite phase 6 pin of amplifier LM358, amplifier LM358 is connected into voltage comparator, compare with the set point of 5 pin potentiometer P2, when the output of power adjustments potentiometer surpasses set point, intermediate-freuqncy signal is set up, comparator upset, 7 pin output inversion enabling signal (low level).Photoelectrical coupler finish the transmission of enabling signal and make rectifier control circuit and inverter control circuit isolated, to avoid the phase mutual interference between circuit.
As Fig. 5 if signal sampling and inversion start-up control circuit, intermediate-freuqncy signal is held R8 by current-limiting resistance and is added on antiparallel two diode D2, the D3, is detected by voltage comparator LM339B, and converts square-wave signal to.
Voltage comparator LM339A and C constitute inversion start-up control circuit.The photoelectrical coupler output signal is added to the in-phase end of voltage comparator LM339A and C, and end of oppisite phase is connected to fixedly comparative voltage, and wherein the output of LM339C links to each other with the output of LM339B and constitutes the wired AND relation, the output of control intermediate-freuqncy signal.The output of LM339A is added to the base stage of triode T by current-limiting resistance R5, when the LM339A output low level, triode T conducting, supply voltage VCC directly is added on the resistance R 6, diode D1 output ceiling voltage VCC is added to voltage controlled oscillator control end 9 pin of phase-locked loop CD4046, at this moment the voltage controlled oscillator VCO of phase-locked loop output highest frequency, control inverter bridge external excited oscillation.When LM339A output high level, triode T ends, supply voltage gives capacitor C 1 charging by resistance R 6, voltage on the resistance R 6 reduces gradually, and the voltage of voltage controlled oscillator control end 9 pin also reduces gradually from supply voltage VCC, at this moment, the output of the voltage controlled oscillator VCO of phase-locked loop begins to descend from highest frequency, when reaching the natural resonance frequency of load, pll lock, inverter enters self-oscillation process.
During series resonance, being initiated with of capacitor C 1 is zero, after triode T ended, supply voltage gave capacitor C 1 charging by resistance R 6, and the voltage on the capacitor C 1 increases gradually, the voltage of voltage controlled oscillator control end 9 pin also increases gradually from zero, at this moment, the output of the voltage controlled oscillator VCO of phase-locked loop begins to increase from low-limit frequency, when reaching the natural resonance frequency of load, pll lock, inverter enters self-oscillation process.
Follow the tracks of and pulse distributor the operating frequency range of capacitor C that CD4046 connects 1, resistance R 1, R2 decision phase-locked loop as Fig. 6 phase-locked loop frequency.
What the AIN end of CD4046 phase comparator H was imported is the voltage of intermediate frequency detection signal, the output VCOUT of voltage controlled oscillator VCO is as current controling signal, this signal is after time delay circuit Delay.sch time-delay, be added to the BIN end of phase comparator II, behind the pll lock, current phase is the leading voltage phase place all the time like this.
During series resonance, the electric current of intermediate frequency detection signal is after time delay circuit Delay.sch time-delay, be added to the AIN end of phase comparator II, the output VCOUT of voltage controlled oscillator VCO is as voltage control signal, and directly be added to the input of the BIN of CD4046 phase comparator II, behind the pll lock, current phase is the leading voltage phase place all the time like this.
CD4098, CD4013, CD4069 integrated circuit constitute pulse distributor.The current controling signal of voltage controlled oscillator output is divided into two-way: one road signal is exported one tunnel control signal by 2 pin after CD4098A time-delay, CD4013A are anti-phase.Another road is anti-phase through CD4069C, CD4098B time-delay, CD4013B anti-phase after, export one tunnel control signal by 12 pin.Two path control signal is added to input 13 pin of IGBT driver module M57962L respectively after triode T1, T2 drive.
The two-way pulse of two reversed-phase output 2 pin of CD4013A, B and the output of 12 pin has overlapping time, and set by potentiometer POTA and POTB overlapping time.
During series resonance, the two-way pulse of two in-phase output end 1 pin of CD4013A, B and the output of 13 pin has Dead Time, and Dead Time is set by potentiometer POTA and POTB.
As Fig. 7 time delay circuit, CD4098A, CD4013A, CD4069A integrated circuit constitute time delay circuit.The output VCOUT signal of voltage controlled oscillator VCO is added to the rising edge trigger end TR+ of monostable flipflop CD4098A, after time-delay, its 7 pin output signal is added to the clock signal input terminal CLK of D flip-flop integrated circuit CD4013, and the VCOUT signal also directly or be added to its data input pin D and reset terminal R after inverter CD4069 is anti-phase.The in-phase output end Q output of CD4013 is through the VCOUT signal of time-delay.
As Fig. 8 IGBT drive circuit, M57962L is an IGBT isolation drive integrated circuit, isolates for inverter control circuit and major loop provide photoelectricity, and provides power drive for IGBT.Its 5 pin output drive signal is added to the grid of power device IGBT through current-limiting resistance RG1, RG2, RG3, RG4.During no input signal, it is output as negative voltage, guarantees that IGBT reliably ends.
Four M57962L drive four IGBT on four brachium pontis of inverter bridge respectively, and each clinodiagonal is one group.
As Fig. 9 frequency display circuit, ICM7216B is a large scale digital frequency meter application-specific integrated circuit (ASIC).3 pin are the function selecting end, when being connected to 4 pin by resistance R 1, are frequency measurement function.
Claims (3)
1, the high intermediate frequency induction heating device of a kind of phase-locked loop, it is characterized in that: its inverter control circuit of this heater is by by the power adjustments signal deteching circuit, if signal sampling and inversion start-up control circuit, phase-locked loop frequency is followed the tracks of and pulse distributor, time delay circuit, IGBT drive circuit and frequency display circuit connect in proper order and form, its connection connects with if signal sampling and shaping circuit for the output of power adjustments signal deteching circuit, its output encircles the connection of frequency-tracking and pulse distributor mutually with trivial, this output connects with IGBT drive circuit input again, and drive circuit output directly connects with frequency display circuit.
2, according to the high intermediate frequency induction heating device of the described phase-locked loop of claim 1, it is characterized in that: the frequency-tracking function realizes by phase-locked loop intergrated circuit CD4046, phase-locked loop is made of three elementary cells: phase comparator, low pass filter, voltage-controlled oscillator, its connection is that the input of phase comparator is input signal and VCO output, comparator output is joined through low-frequency filter and voltage controlled oscillator input, its output feeds back to the phase comparator input again as the VCO output, the trivial ring mutually of CD4046 has comprised phase comparator and two unit of voltage-controlled oscillator, and use is that external low pass filter can constitute complete phase-locked loop.
3, according to the high intermediate frequency induction heating device of the described phase-locked loop of claim 1, it is characterized in that: if signal sampling and shaping circuit, its connection is that photoelectrical coupler is from power adjustments signal deteching circuit two inputs, photoelectrical coupler output is directly as amplifier LM339 input, and its output is finished self-oscillation through triode 8550 output voltage V.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 00253419 CN2456436Y (en) | 2000-12-13 | 2000-12-13 | Phaselocked loop HF/MF induction heater |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 00253419 CN2456436Y (en) | 2000-12-13 | 2000-12-13 | Phaselocked loop HF/MF induction heater |
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| Publication Number | Publication Date |
|---|---|
| CN2456436Y true CN2456436Y (en) | 2001-10-24 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 00253419 Expired - Fee Related CN2456436Y (en) | 2000-12-13 | 2000-12-13 | Phaselocked loop HF/MF induction heater |
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| Country | Link |
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| CN (1) | CN2456436Y (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009117929A1 (en) * | 2008-03-24 | 2009-10-01 | Yu Zhengguo | Induction heating power supply circuit |
| CN109379795A (en) * | 2018-11-29 | 2019-02-22 | 洛阳升华感应加热股份有限公司 | The reverse frequency of induction heating power tracks locking phase control system |
| CN111770597A (en) * | 2019-04-01 | 2020-10-13 | 无锡物华电子科技有限公司 | Frequency tracking method in frequency modulation and power regulation |
-
2000
- 2000-12-13 CN CN 00253419 patent/CN2456436Y/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009117929A1 (en) * | 2008-03-24 | 2009-10-01 | Yu Zhengguo | Induction heating power supply circuit |
| CN109379795A (en) * | 2018-11-29 | 2019-02-22 | 洛阳升华感应加热股份有限公司 | The reverse frequency of induction heating power tracks locking phase control system |
| CN109379795B (en) * | 2018-11-29 | 2021-08-10 | 洛阳升华感应加热股份有限公司 | Inversion frequency tracking phase-locking control system of induction heating power supply |
| CN111770597A (en) * | 2019-04-01 | 2020-10-13 | 无锡物华电子科技有限公司 | Frequency tracking method in frequency modulation and power regulation |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |