CN103280963B - A kind of PFC control circuit reducing power tube conducting power consumption - Google Patents
A kind of PFC control circuit reducing power tube conducting power consumption Download PDFInfo
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Abstract
The invention provides a kind of PFC control circuit reducing power tube conducting power consumption, based on the topological structure of Boost circuit, comprise Voltage loop circuit, power tube drain-source voltage V
dSvalley conduction control circuit and logic control and drive circuit, Voltage loop circuit is used for the stable cut-off signals exporting and produce power tube, power tube drain-source voltage V
dSvalley conduction control circuit is used for detection power pipe drain-source V
dSand compare with the lowest point voltage, produce the conductivity control signal of power tube, logic control and drive circuit are used for turning on and off of drived control power tube.By detecting V
dSvoltage, guarantee in different input voltage situations, power tube can at its drain-source voltage V
dSopen when being in the lowest point voltage or no-voltage, thus loss when reducing power tube conducting.
Description
Technical field
The present invention relates to the single-phase power factor correction circuit of field of switch power, particularly a kind of PFC control circuit reducing power tube conducting power consumption.
Background technology
At present, in the Boost type PFC of the critical conduction mode (CRM, CriticalConductionMode) shown in Fig. 1, traditional zero current detection conducting scheme, open moment at power tube, the source-drain voltage of power tube is larger, conducting power consumption is also comparatively large, this is because input ac voltage V
inthe switching frequency of frequency relative power pipe M very little, so can suppose that the size of input voltage is constant in the switch periods of a power tube M.Suppose input ac voltage V
inbe V through full-bridge rectifier output voltage
cin, when power tube M is in conducting state, inductance L both end voltage V
lfor V
cin, now inductance L both end voltage V
lwith inductive current i
lpass be:
From formula 1, now inductive current will linearly increase, if the ON time of power tube M is T
on, so power tube M conduction period, inductive current i
lthe size △ i increased
l(+) is:
When power tube M is in off state, suppose that the turn-off time is T
off, the output voltage of Boost circuit is V
o, now inductance L both end voltage V
lwith inductive current i
lpass be:
For Boost circuit, V
cin-V
o<0, so power tube M blocking interval, inductive current i
lto linearly reduce, and power tube M drain-source voltage V
dSequal output voltage V
o.For the PFC control circuit of traditional employing zero current detection, when inductive current i being detected
lwhen dropping to 0, open power tube, but open moment, power tube M drain-source voltage V
dSequal output voltage V
o, therefore can produce serious conducting power consumption.
In prior art, in order to reduce conducting power consumption, the method that one is called as valley conduction (VS, ValleySwitching) or zero voltage switch (ZVS, ZeroVoltageSwitching) is widely used in the PFC control circuit of CRM.Its cardinal principle is: when the inductive current i in Boost circuit structure being detected
lwhen dropping to zero, power tube M postpones certain hour and opens, the drain-source parasitic capacitance C of the inductance L in Boost circuit structure and power tube
dseries resonance will be there is, the drain-source parasitic capacitance C of power tube
dbegin through inductive discharge, suppose, at resonance, a period of time T occurs
dafter, the drain-source parasitic capacitance C of power tube
don voltage V
dSdrop to the lowest point value or 0, if the time just making power tube postpone to open also equals T
d, so just achieve valley conduction or zero voltage switch, reduce the conducting power consumption of power tube.
In prior art, a kind of PFC control circuit of typical reduction power tube conducting power consumption as shown in Figure 2, its operation principle is: add RC time delay module by the PFC inductive current test section at traditional CRM, make the time of power tube delay unlatching equal the half of harmonic period, make power tube just at power tube drain-source voltage V
dSconducting when dropping to the lowest point value, realizes the object reducing power tube conducting power consumption.There is following problem in circuit shown in Fig. 2: the turn on delay time of power tube is relevant with input voltage, and, for different input voltages, inductance in Boost circuit structure will produce different series resonance situations from power tube parasitic capacitance, so realize the lowest point voltage or no-voltage conducting by adding RC time delay module, the input voltage of different size can not be met.
In prior art, the PFC control circuit of another kind of typical reduction power tube conducting power consumption as shown in Figure 3, several significant instant when it utilizes testing circuit determination resonance, again according to time resonance time mutual voltage two ends voltage symmetrical centered by input voltage, just can know power tube drain-source voltage V by circuit computing
dSreach the moment of the lowest point voltage.This circuit also adds the time delay of grid drive singal, thus the lowest point that can realize power tube is opened, and reduces power tube conducting power consumption.This circuit can not meet the situation of the input voltage of different size, and this circuit more complicated, not easily realize.
Summary of the invention
In order to overcome existing techniques in realizing V
dS(power tube conducting power consumption is reduced) when the lowest point voltage or no-voltage conducting, the input voltage of different size can not be met and circuit structure is complicated, situation about not easily realizing, the invention provides a kind of PFC control circuit reducing power tube conducting power consumption, by introducing power tube drain-source voltage valley conduction control circuit, while realization reduces power tube conducting power consumption, meet again different input voltages.This circuit structure is simple, be easy to realize, by detecting V
dSvoltage, guarantee in different input voltage situations, power tube can at its drain-source voltage V
dSopen when being in the lowest point voltage or no-voltage, thus loss when reducing power tube conducting.
The technical scheme that the present invention solves the problems of the technologies described above is as follows:
A kind of PFC control circuit reducing power tube conducting power consumption, based on the topological structure of Boost type booster circuit, comprise inductance L, power tube M, diode D, one end of inductance L is connected with the positive output end of full-bridge rectifier, the other end of inductance L is connected with the anode of the drain electrode of power tube M, diode D, the source electrode of power tube M is connected with the negative output terminal of full-bridge rectifier, and the negative electrode of diode D connects one end of load, and the other end of load connects the source electrode of power tube M;
It is characterized in that: be provided with for stable output and produce power tube M cut-off signals Voltage loop circuit, for detection power pipe M drain-source voltage V
dSand compare with the lowest point voltage, produce the power tube drain-source voltage V of power tube M conductivity control signal
dSvalley conduction control circuit and the logic control turned on and off for drived control power tube M and drive circuit, wherein:
Voltage loop circuit comprises resistance R5, R6, building-out capacitor C
cOM, error amplifier, reference voltage source V
rEF, saw-toothed wave generator and pulse frequency modulated (PFM) comparator, one end of resistance R5 is connected with the negative electrode of diode D in Boost type voltage booster circuit topological structure, the resistance R5 other end is connected with the inverting input of error amplifier and one end of resistance R6, the other end ground connection of resistance R6, the in-phase input end of error amplifier is connected with reference voltage source, building-out capacitor C
cOMone end be connected with the output of error amplifier and the inverting input of pulse frequency modulated comparator, building-out capacitor C
cOMother end ground connection, the in-phase input end of pulse frequency modulated comparator is connected with the output of saw-toothed wave generator;
Power tube drain-source voltage V
dSvalley conduction control circuit comprises subtracter, comparator, power tube drain-source voltage V
dSsample circuit, input voltage V through the Boost type voltage booster circuit topological structure of full-bridge rectifier rectification
cinthe output voltage V of sample circuit and Boost type voltage booster circuit topological structure
osample circuit, power tube drain-source voltage V
dSthe input of sample circuit is connected with the drain electrode of power tube M in Boost type voltage booster circuit topological structure, power tube drain-source voltage V
dSthe output of sample circuit is connected with the inverting input of comparator, and the positive input of comparator is connected with the output of subtracter, the positive input of subtracter and V
cinthe output of sample circuit connects, V
cinthe input of sample circuit is connected with the forward output of full-bridge rectifier, the inverting input of subtracter and V
othe output of sample circuit connects, V
othe input of sample circuit is connected with the negative electrode of diode D in Boost type voltage booster circuit topological structure;
Logic control and drive circuit comprise pulse generator, rest-set flip-flop and gate driver circuit, the input of pulse generator and power tube drain-source voltage V
dSin valley conduction control circuit, the output of comparator connects, the output of pulse generator is connected with the set input (S) of rest-set flip-flop, the RESET input (R) of rest-set flip-flop connects the output of pulse frequency modulated comparator in Voltage loop circuit, the output of rest-set flip-flop is connected with the input of gate driver circuit, and the output of gate driver circuit connects the grid of power tube M in Boost type voltage booster circuit topological structure.
Described power tube drain-source voltage V
dSsample circuit comprises resistance R3 and R4, and one end of resistance R3 is as power tube drain-source voltage V
dSthe input of sample circuit is connected with the drain terminal of power tube M in Boost booster type circuit topological structure, and the other end of resistance R3 is connected with one end of resistance R4 and as power tube drain-source voltage V
dSthe output of sample circuit is connected with the inverting input of comparator, the other end ground connection of resistance R4;
The input voltage V of described Boost circuit topological structure
cinsample circuit comprises resistance R1 and R2, and one end of resistance R1 is connected with the positive output end of full-bridge rectifier, and the other end of resistance R1 is connected with one end of resistance R2 and as V
cinthe output of sample circuit is connected with the positive input of subtracter, the other end ground connection of resistance R2;
The output voltage V of described Boost circuit topological structure
osample circuit comprises resistance R7 and R8, and one end of resistance R7 is as V
othe input of sample circuit is connected with the negative electrode of diode D in Boost booster type circuit topological structure, and the other end of resistance R7 is connected with resistance R8 one end and as V
othe output of sample circuit is connected with the inverting input of subtracter.
Described power tube drain-source voltage V
dScomparator in valley conduction control circuit is a hysteresis comparator.
Described resistance R1 and the ratio of resistance R2 are 99/1; The ratio of resistance R3 and resistance R4 is 99/1, and the ratio of resistance R7 and resistance R8 is 102/1.
Compared with prior art, the invention has the beneficial effects as follows:
In PFC control circuit of the present invention, add drain-source voltage V
dSvalley conduction control circuit, by detection power pipe drain-source voltage V
dS, achieve the valley conduction realizing power tube under wider input voltage range, reduce conduction loss and EMI interference; When parasitic capacitance and the boost inductance series resonance of power tube, power tube is all the time at V
dSfirst the lowest point or no-voltage conducting, restriction is because the input current total harmonic distortion (THD, TotalHarmonicDistribution) brought of series resonance effectively; Resistance R1 equals resistance R3, and resistance R2 equals resistance R4, and the ratio of resistance R1 and resistance R2 is greater than the ratio of resistance R7 and resistance R8, makes V
dSdrop to when being a bit larger tham the lowest point voltage, conducting power pipe, the impact that partial offset causes due to the gate capacitance time delay of power tube M.
Accompanying drawing explanation
Fig. 1 is traditional critical conduction mode (CRM) Boost type PFC control circuit;
Fig. 2 is the PFC control circuit of a kind of typical reduction power tube conducting power consumption of the prior art;
Fig. 3 is the PFC control circuit structured flowchart that another kind of the prior art typically reduces power tube conducting power consumption;
Fig. 4 be of the present invention can at the PFC control circuit schematic diagram of different input voltage situation decline low-power pipe conducting power consumption;
Fig. 5 is the physical circuit figure of Fig. 4;
Fig. 6 is 2V
cin>V
otime, the waveform correlation figure of circuit of the present invention;
Fig. 7 is 2V
cin<V
otime, the waveform correlation figure of circuit of the present invention;
Fig. 8 is the simulation waveform figure of circuit of the present invention.
Embodiment
Be described principle of the present invention and feature below in conjunction with accompanying drawing, the example lifted, only for explaining the present invention, is not intended to limit scope of the present invention.
Embodiment:
As Fig. 4, circuit of the present invention based on the topological structure 1 of Boost type booster circuit, also comprise for stable output and produce power tube cut-off signals Voltage loop circuit 2, for detecting V
dSand compare with the lowest point voltage, produce the power tube drain-source voltage V of power tube conductivity control signal
dSvalley conduction control circuit 3 and the logic control turned on and off for drived control power tube and drive circuit 4.Wherein the topological structure 1 of Boost type booster circuit is same as the prior art, comprise inductance L, power tube M, diode D, one end of inductance L is connected with the positive output end of full-bridge rectifier, the other end of inductance L is connected with the drain electrode of power tube M, the source electrode of power tube M is connected with the negative output terminal of full-bridge rectifier, the grid andlogic control of power tube M is connected with the output of raster data model in drive circuit (Driver), the other end of inductance L is connected with the anode of diode D, and the negative electrode of diode D is connected with load.
As Fig. 5, Voltage loop circuit 2 comprises resistance R5, resistance R6, building-out capacitor C
cOM, error amplifier OTA, reference voltage source V
rEF, saw-toothed wave generator STG, pulse frequency modulated (PFM) comparator PCOM, one end of resistance R5 is connected with the negative electrode of the diode D in the topological structure of Boost circuit, the inverting input of resistance R5 other end error amplifier connects, one end of resistance R6 is connected with the inverting input of error amplifier, the other end ground connection of resistance R6, the in-phase input end of error amplifier and reference voltage source V
rEFconnect, building-out capacitor C
cOMone end be connected with the output of error amplifier, building-out capacitor C
cOMother end ground connection, the output of error amplifier is connected with the inverting input of pulse frequency modulated compared with device, the in-phase input end of pulse frequency modulated comparator exports with saw-toothed wave generator and is connected, and the output andlogic control of pulse frequency modulated comparator is connected with the R input of rest-set flip-flop in drive circuit.
Power tube drain-source voltage V
dSvalley conduction control circuit 3 comprises subtracter SUB, comparator COM, V
dSsample circuit, V
cinsample circuit, V
osample circuit, V
dSthe input of sample circuit is connected with the drain terminal of power tube M in Boost circuit topological structure, V
dSthe other end of sample circuit is connected with the inverting input of comparator, the output andlogic control of comparator is connected with the input of pulse generator in drive circuit 4, the positive input of comparator is connected with the output of subtracter, the positive input of subtracter and V
cinthe output of sample circuit connects, V
cinthe input of sample circuit is connected with the forward output of full-bridge rectifier, the inverting input of subtracter and V
othe output of sample circuit connects, V
othe input of sample circuit is connected with the negative electrode of diode D in Boost circuit topological structure.
Logic control and drive circuit 4 comprise pulse generator PUL, rest-set flip-flop TR, raster data model (Driver), the output of pulse generator is connected with the S input of rest-set flip-flop, and the output of rest-set flip-flop is connected with the input of raster data model (Driver).
V
dSsample circuit comprises resistance R3 and resistance R4, one end of resistance R3 is connected with the drain terminal of power tube M in Boost circuit topological structure, the other end of resistance R3 is connected with one end of resistance R4, the other end ground connection of resistance R4, the junction of resistance R3 and resistance R4 is the first sampled point a, is connected with the inverting input of comparator.
V
cinsample circuit comprises resistance R1 and resistance R2, one end of resistance R1 is connected with the positive output end of full-bridge rectifier, the other end of resistance R1 is connected with one end of resistance R2, the other end ground connection of resistance R2, the junction of resistance R1 and the second resistance R2 is the second sampled point b, is connected with the in-phase input end of subtracter.
V
osample circuit comprises resistance R7 and resistance R8, one end of resistance R7 is connected with the negative electrode of diode D in Boost circuit topological structure, the other end of resistance R7 is connected with resistance R8 one end, the other end ground connection of resistance R8, the junction of resistance R7 and resistance R8 is the 3rd sampled point c, is connected with the inverting input of subtracter.
In the present embodiment, comparator is a hysteresis comparator, and the ratio of resistance R1 and resistance R2 equals the ratio of resistance R3 and resistance R4, all equals 99/1, and the ratio of resistance R7 and resistance R8 is 102/1.
Of the present inventionly can be in the operation principle of the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumption:
When power tube M is in off state, the current i on inductance
llinear reduction, if work as i
lwhen being reduced to 0, power tube is not opened in time, the parasitic capacitance C of inductance L and power tube
dseries resonance will be there is.For the input voltage of different Boost circuit topological structures, its series resonance situation is also different.According to input voltage V
cindifference mainly contain 2 kinds of situations below:
（1）2V
Cin>V
o
Fig. 6 be in this case provided by the invention a kind of can at the waveform correlation figure of the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumption.At t
0~ t
1period, power tube M conducting, the electric current of inductance L linearly increases, and energy increases, when through t
onafter time, power tube M turns off, and inductance L starts the parasitic capacitance C to devices such as power tubes
dcharging, at t
1moment C
don voltage reach V
o, now booster diode D conducting.At t
0~ t
1period, power tube M turns off, inductance L and V
cinstart to release energy to load, inductance L electric current linearly declines, but output remains on V
oconstant, at t
2in the moment, inductive current drops to zero.At t
2~ t
3period, power tube M still turns off, inductance L and parasitic capacitance C
dresonance occurs, and the cycle of series resonance is:
Parasitic capacitance C
dstart to inductance L electric discharge, parasitic capacitance C
don voltage start decline, inductive current oppositely increases, after 1/4 harmonic period, the current i of inductance L
lreach reverse maximum, can be obtained by formula 1: inductance L both end voltage is 0, so now power tube M drain-source voltage V
dSequal V
cin; T is arrived again through 1/4 harmonic period
3time, power tube M drain-source voltage V
dSthe lowest point value V will be reached
dS (valley), for:
V
dS (valley)=V
o-
2(V
o-V
cin)=
2v
cin-V
oformula 5
At t
0~ t
3inductive current i during this period of time
lwith power tube source-drain voltage V
dSexpression formula is:
The ratio of resistance R1 and resistance R2 equals 99/1, so through V
cinsampling circuit samples to the input voltage of Boost type voltage booster circuit topological structure is:
The ratio of resistance R7 and resistance R8 equals 102/1, through V
osampling circuit samples to the output voltage of Boost type voltage booster circuit topological structure is:
Output through subtracter SUB is:
The ratio of resistance R3 and resistance R4 is 99/1, so through V
dSsampling circuit samples to the drain-source voltage of power tube M be:
Arrive t
3during the moment, power tube drain-source voltage arrives the lowest point value V
dS (valley), and V
a<V
sub, so now, power tube drain-source voltage V
dShysteresis comparator output low level in valley conduction control circuit, through logic control and drive circuit conducting power pipe M, achieves V
dSvalley conduction, due to now its drain-source both end voltage V
dSdrop to minimum, so conducting power consumption also significantly declines.
（2）2V
Cin<V
o
Fig. 7 be in this case provided by the invention a kind of can at the waveform correlation figure of the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumption.At t
0~ t
1, t
1~ t
2period, its voltage and current is analyzed identical with the first situation.But at t
2~ t
3period, due to 2V
cin<V
o, so last V
dsthe lowest point voltage becomes negative, but due to the parasitic diode of power tube M may conducting, thus be limited in-0.7V.Due in this case, 2V
cin-V
othe output V of <0, subtracter SUB
sub=0, so when power tube drain-source voltage V being detected
dSwhen dropping to 0, hysteresis comparator output low level, through logic control and drive circuit conducting power pipe, achieves V
dSno-voltage conducting.Thus reduce the conducting power consumption of power tube M.
Fig. 8 is of the present invention can be 220V to input voltage in the PFC control circuit of different input voltage situation decline low-power pipe conducting power consumption, and output voltage is the simulation waveform figure that the PFC system of 400V carries out emulating.In its ordinate, PFC is the grid drive singal of power tube M, V
dSthe drain-source voltage of power tube M, i
lthe electric current in inductance L, V
cinthe input voltage instantaneous value of Boost circuit topological structure, V
oit is the output voltage of Boost circuit topological structure.When time t=36.56 μ s, V
cin=300V, power tube drain-source voltage V
dSdrop to the lowest point value V
dS (valley), be 200V.And now 2V
cin-V
o=200V, the grid drive singal of power tube becomes high level, power tube conducting simultaneously, thus achieves valley conduction, reduces the conducting power consumption of power tube, demonstrates feasibility of the present invention.
The foregoing is only preferred embodiment of the present invention, be not limited to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (3)
1. one kind is reduced the PFC control circuit of power tube conducting power consumption, based on the topological structure of Boost type booster circuit, comprise inductance L, power tube M, diode D, one end of inductance L is connected with the positive output end of full-bridge rectifier, the other end of inductance L is connected with the anode of the drain electrode of power tube M, diode D, the source electrode of power tube M is connected with the negative output terminal of full-bridge rectifier, and the negative electrode of diode D connects one end of load, and the other end of load connects the source electrode of power tube M;
It is characterized in that: be provided with for stable output and produce power tube M cut-off signals Voltage loop circuit, for detection power pipe M drain-source voltage V
dSand compare with the lowest point voltage, produce the power tube drain-source voltage V of power tube M conductivity control signal
dSvalley conduction control circuit and the logic control turned on and off for drived control power tube M and drive circuit, wherein:
Voltage loop circuit comprises resistance R5, R6, building-out capacitor C
cOM, error amplifier, reference voltage source, saw-toothed wave generator and pulse frequency modulated comparator, one end of resistance R5 is connected with the negative electrode of diode D in Boost type voltage booster circuit topological structure, the resistance R5 other end is connected with the inverting input of error amplifier and one end of resistance R6, the other end ground connection of resistance R6, the in-phase input end of error amplifier is connected with reference voltage source, building-out capacitor C
cOMone end be connected with the output of error amplifier and the inverting input of pulse frequency modulated comparator, building-out capacitor C
cOMother end ground connection, the in-phase input end of pulse frequency modulated comparator is connected with the output of saw-toothed wave generator;
Power tube drain-source voltage V
dSvalley conduction control circuit comprises subtracter, comparator, power tube drain-source voltage V
dSthe input voltage V of sample circuit, Boost type voltage booster circuit topological structure
cinthe output voltage V of sample circuit and Boost type voltage booster circuit topological structure
osample circuit, power tube drain-source voltage V
dSthe input of sample circuit is connected with the drain electrode of power tube M in Boost type voltage booster circuit topological structure, power tube drain-source voltage V
dSthe output of sample circuit is connected with the inverting input of comparator, and the positive input of comparator is connected with the output of subtracter, the positive input of subtracter and Boost type voltage booster circuit topological structure input voltage V
cinthe output of sample circuit connects, Boost type voltage booster circuit topological structure input voltage V
cinthe input of sample circuit is connected with the forward output of full-bridge rectifier, the inverting input of subtracter and Boost type voltage booster circuit topological structure output voltage V
othe output of sample circuit connects, Boost type voltage booster circuit topological structure output voltage V
othe input of sample circuit is connected with the negative electrode of diode D in Boost type voltage booster circuit topological structure;
Logic control and drive circuit comprise pulse generator, rest-set flip-flop and gate driver circuit, the input of pulse generator and power tube drain-source voltage V
dSin valley conduction control circuit, the output of comparator connects, the output of pulse generator is connected with the set input S of rest-set flip-flop, the RESET input R of rest-set flip-flop connects the output of pulse frequency modulated comparator in Voltage loop circuit, the output of rest-set flip-flop is connected with the input of gate driver circuit, and the output of gate driver circuit connects the grid of power tube M in Boost type voltage booster circuit topological structure;
Described power tube drain-source voltage V
dSsample circuit comprises resistance R3 and R4, and one end of resistance R3 is as power tube drain-source voltage V
dSthe input of sample circuit is connected with the drain terminal of power tube M in Boost booster type circuit topological structure, and the other end of resistance R3 is connected with one end of resistance R4 and as power tube drain-source voltage V
dSthe output of sample circuit is connected with the inverting input of comparator, the other end ground connection of resistance R4;
Described Boost type voltage booster circuit topological structure input voltage V
cinsample circuit comprises resistance R1 and R2, and one end of resistance R1 is connected with the positive output end of full-bridge rectifier, and the other end of resistance R1 is connected with one end of resistance R2 and as Boost type voltage booster circuit topological structure input voltage V
cinthe output of sample circuit is connected with the positive input of subtracter, the other end ground connection of resistance R2;
Described Boost type voltage booster circuit topological structure output voltage V
osample circuit comprises resistance R7 and R8, and one end of resistance R7 is as Boost type voltage booster circuit topological structure output voltage V
othe input of sample circuit is connected with the negative electrode of diode D in Boost booster type circuit topological structure, and the other end of resistance R7 is connected with resistance R8 one end and as Boost type voltage booster circuit topological structure output voltage V
othe output of sample circuit is connected with the inverting input of subtracter.
2. the PFC control circuit of reduction power tube conducting power consumption according to claim 1, is characterized in that: described power tube drain-source voltage V
dScomparator in valley conduction control circuit is a hysteresis comparator.
3. the PFC control circuit of reduction power tube conducting power consumption according to claim 1, is characterized in that: described resistance R1 and the ratio of resistance R2 are 99:1; The ratio of resistance R3 and resistance R4 is 99:1, and the ratio of resistance R7 and resistance R8 is 102:1.
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| CN110880863B (en) * | 2019-11-29 | 2023-05-26 | 广东美的制冷设备有限公司 | Control method, control device, home appliance and computer readable storage medium |
| CN110784102B (en) * | 2019-11-29 | 2021-02-23 | 广东美的制冷设备有限公司 | Control method, control device, household appliance and computer readable storage medium |
| CN112865510B (en) * | 2021-01-18 | 2022-04-12 | 华中科技大学 | Pulse width period control system and method |
| CN113489321B (en) * | 2021-07-20 | 2023-09-12 | 中国电子科技集团公司第五十八研究所 | Control method and circuit for automatically adjusting output voltage ripple |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102185466A (en) * | 2011-05-24 | 2011-09-14 | 杭州矽力杰半导体技术有限公司 | Driving circuit and driving method applied to flyback-type converter and quasi-resonant soft-switching flyback-type converter applying same |
| CN103023330A (en) * | 2012-12-18 | 2013-04-03 | 深圳市明微电子股份有限公司 | Switching power supply and self-adaption multi-mode control circuit |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8130522B2 (en) * | 2007-06-15 | 2012-03-06 | The Regents Of The University Of Colorado, A Body Corporate | Digital power factor correction |
-
2013
- 2013-04-26 CN CN201310149510.0A patent/CN103280963B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102185466A (en) * | 2011-05-24 | 2011-09-14 | 杭州矽力杰半导体技术有限公司 | Driving circuit and driving method applied to flyback-type converter and quasi-resonant soft-switching flyback-type converter applying same |
| CN103023330A (en) * | 2012-12-18 | 2013-04-03 | 深圳市明微电子股份有限公司 | Switching power supply and self-adaption multi-mode control circuit |
Non-Patent Citations (1)
| Title |
|---|
| 基于Buck变流器的高效率功率因数校正技术研究;杨剑友;《中国优秀硕士学位论文全文数据库》;20110715;摘要，第32页 * |
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