CN2386535Y - 发光二极管封装装置 - Google Patents

发光二极管封装装置 Download PDF

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Publication number
CN2386535Y
CN2386535Y CN99217179U CN99217179U CN2386535Y CN 2386535 Y CN2386535 Y CN 2386535Y CN 99217179 U CN99217179 U CN 99217179U CN 99217179 U CN99217179 U CN 99217179U CN 2386535 Y CN2386535 Y CN 2386535Y
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Prior art keywords
light
emitting diode
diode chip
covered
utility
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Expired - Fee Related
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CN99217179U
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English (en)
Inventor
叶寅夫
庄峰辉
周亦良
林泰禹
彭愉纹
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Everlight Electronics Co Ltd
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Everlight Electronics Co Ltd
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Priority to CN99217179U priority Critical patent/CN2386535Y/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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Abstract

本实用新型公开了一种发光二极管封装装置,发光二极管芯片固设在位于基座上的呈碗状的凹部,在发光二极管芯片上覆有高折射率的聚光材料层。在发光二极管芯片上覆有封胶树脂。它可消除发光不均匀的不足,避免使用此二极管的显示装置会有不良的显示。

Description

发光二极管封装装置
本实用新型涉及发光二极管的封装装置，特别是一种可以消除发光不均匀的发光二极管的封装装置。
近年来，封装(packaging)在微电子工业的角色日益重要，封装好坏与否常常是元件效能是否能充分发挥的因素。对于封装而言，须考虑的因素有包装实体的大小、重量、成本、接脚需求数目、所能承受的功率及芯片之间的延迟时间等，因此一个良好的封装要对材料、结构、电器特性做通盘考虑，以使用最低成本达到所需要求，并使产品具有较高的可靠度。
如图1所示，为一般发光二极管的一个封装装置，如图所示，此封装装置包括一基座102及位于基座102上的一呈碗状的凹部104。发光二极管芯片106可以固设在凹部104，经打线技术(wire bonding)设立接线108与另一端子连接。再经灌胶、烘烤、弯脚、成品测试、包装等步骤完成作业。
然而在此现有的二极管封装装置中，会产生发光不均匀的问题，如图2所示，为经此封装的二极管元件的发光测试图，如图所示，在某些位置上会出现不正常的峰值，因此当此二极管作为照明或指示用途显示时会产生使用的不便。
因此本实用新型的目的在于提供一种可消除发光不均匀的发光二极管的封装装置，以避免使用此二极管的显示装置会有不良的显示。
本实用新型的目的是这样实现的：一种发光二极管封装装置，发光二极管芯片固设在位于基座上的呈碗状的凹部，在发光二极管芯片上覆有高折射率的聚光材料层。
在发光二极管芯片上覆有封胶树脂。
本实用新型由于在发光二极管芯片上覆有高折射率的聚光材料层，可消除发光不均匀的不足，避免使用此二极管的显示装置会有不良的显示。
为使贵审查员能对本实用新型的目的、形状、构造、特征及其功效做更进一步的了解，兹举实例配合附图详细说明如下：
图1为一现有的发光二极管封装装置示意图。
图2为使用现有的发光二极管封装装置的发光二极管发光测试图。
图3为本实用新型的发光二极管封装装置示意图。
图4为使用本实用新型的发光二极管封装装置的发光二极管发光测试图。
如图3所示，为本实用新型的发光二极管封装装置示意图。此封装装置包括一基座102及位于基座102上的一呈碗状的凹部104。发光二极管芯片106可以固设于凹部104，再经打线技术(wire bonding)设立接线108与另一端子连接。本实用新型的特点在于：在发光二极管芯片106上覆上一具有较高折射率的聚光材料层110，如封胶树脂(molding compound)，此聚光材料层110可以避免发光二极管芯片106经凹部104内部反射，形成影响元件特性的光环，使发光不均匀现象得以消除。其后，此封装结构再经灌胶、烘烤、弯脚、成品测试、包装等步骤完成作业，由于这些步骤为现有技术，在此不再赘述。
如图4，为使用本实用新型的发光二极管封装装置的发光二极管发光测试图，由此图可以看出，本实用新型的发光二极管封装装置确实可以消除发光不均匀的现象，因此本实用新型极具产业上的实用价值。

Claims (2)

1.一种发光二极管封装装置，发光二极管芯片固设在位于基座上的呈碗状的凹部，其特征在于：在发光二极管芯片上覆有高折射率的聚光材料层。
2.如权利要求1所述的发光二极管封装装置，其特征在于：在发光二极管芯片上覆有封胶树脂。
CN99217179U 1999-07-23 1999-07-23 发光二极管封装装置 Expired - Fee Related CN2386535Y (zh)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003056636A1 (en) * 2001-12-29 2003-07-10 Hangzhou Fuyang Xinying Dianzi Ltd. A led and led lamp
WO2004102683A1 (fr) * 2003-04-30 2004-11-25 Peixin Xu Diode lumineuse a emission de lumiere uniformement circulaire
CN101355117B (zh) * 2007-07-25 2010-12-29 群康科技(深圳)有限公司 发光二极管

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003056636A1 (en) * 2001-12-29 2003-07-10 Hangzhou Fuyang Xinying Dianzi Ltd. A led and led lamp
WO2004102683A1 (fr) * 2003-04-30 2004-11-25 Peixin Xu Diode lumineuse a emission de lumiere uniformement circulaire
CN101355117B (zh) * 2007-07-25 2010-12-29 群康科技(深圳)有限公司 发光二极管

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