CN221667131U - Full-bridge type semiconductor strain gauge - Google Patents

Abstract

A lower cost full bridge semiconductor strain gauge includes a semiconductor layer including a fourth pad base and a third pad base respectively located on left and right sides of a reference point, a first pad base located on the upper left side of the fourth pad base, and a second pad base located on the upper right side of the third pad base; the first bridge arm resistor is positioned at the upper left part of the reference point, the two ends of the first bridge arm resistor extend to the first pad foundation and the fourth pad foundation respectively, the third bridge arm resistor is positioned at the upper right part of the reference point, the two ends of the third bridge arm resistor extend to the third pad foundation and the second pad foundation respectively, the fourth bridge arm resistor is positioned at the lower part of the reference point, the two ends of the fourth bridge arm resistor extend to the fourth pad foundation and the third pad foundation respectively, and the second bridge arm resistor is positioned at the lower part of the reference point, the two ends of the second bridge arm resistor extend to the first pad foundation and the second pad foundation respectively; a metal layer attached to a front side surface of the semiconductor layer; the second leg resistor surrounds the fourth leg resistor from the lower side.

Description

Full-bridge type semiconductor strain gauge

Technical Field

The application relates to the technical field of sensors, in particular to a full-bridge type semiconductor strain gauge.

Background

As shown in fig. 1, the wheatstone bridge is generally used for signal measurement, and includes four resistors R1 to R4 connected end to end in sequence, which are respectively disposed on four legs of the wheatstone resistor. At least R1 and R3 are variable resistors, R2 and R4 are fixed resistors or variable resistors, and the potentials at the four connecting positions (namely corresponding welding spots or welding pads P1-P4) are V1, vd, V2 and Vc respectively, wherein Vd can be used as a grounding end, vc-Vd is used as an input voltage, and V2-V2 is used as an output voltage. To ensure a linear variation of the output voltage, R1 is equal to R3 and R2 is equal to R4, at this time, assuming that R1/r2=r3/r4=k, then:

if the initial output is zero, the initial value of k should be 1, i.e., the initial values of R1 to R4 are all the same.

For force or pressure measurement, strain gages, also known as resistive strain gages, are widely used, which are measured by forming the wheatstone bridge described above from a contoured sheet-like resistance as the bridge arm resistive strain gage resistance. For the resistance strain gauge, the resistance strain gauge can be manufactured into four quarter-resistance strain gauges, namely, each strain gauge only comprises one bridge arm resistance, the bridge arm resistance is usually in a serpentine shape for increasing the resistance value, and two ends of the bridge arm resistance are respectively provided with a bonding pad for being connected with a circuit component.

More, the wheatstone bridge is made as two half-bridge strain gages, each of which is provided with two resistors, i.e. the pads P2 and P4 are divided into two parts, i.e. six pads in total. The semiconductor strain gauge has a characteristic of using a semiconductor such as silicon to change its resistance under pressure (in which case, the change in resistance due to the change in shape of the material is negligible), and thus can be used as the semiconductor arm resistance to perform pressure measurement.

Fig. 2 shows a structure of a conventional half-bridge type silicon strain gage 01, which is manufactured by micro-fabrication technology, comprising a semiconductor silicon 010 at the bottom layer, which has two strain resistors 011, 012 mirror-symmetrical about a transverse straight line, the resistors 011, 012 being composed of sinuously connected and longitudinally extending silicon strips 011 a-011 d. The upper side of the connection part of the silicon strips 011 a-011 d in the transverse direction is covered with a metal layer 015 to avoid the influence of the transverse connection part of the semiconductor silicon on the resistors 011 and 012, and a first bonding pad 014 and a second bonding pad 013 are also formed on the metal layer 015 at the two ends of the resistor 011 so as to be connected with the electronic module through leads. Wherein the two resistors 011 share one second pad 013, and one lateral end of the second pad 013 extends toward both sides in the longitudinal direction and is flush with the outer side of the first pad 014, respectively. In order to make the pads have proper length and pad spacing, supporting silicon strips 011e which do not contain resistance values are further arranged at some unavoidable spare positions to play a supporting role. As shown in fig. 3, in use, two half-bridge silicon strain gages 01 are respectively arranged on both longitudinal sides of a center strain point Pc of the surface of the plate-like elastic body 02 such that the resistance 011 of each half-bridge silicon strain gage 01 is in a low strain region 02b, and the resistance 012 is in a high strain region 02a (i.e., relatively closer in distance to the center strain point Pc) such that the amounts of change in the resistances 011, 012 are different. The two half-bridge silicon strain gages 01 are preferably each located on a longitudinally extending centerline Pm passing through the center strain point Pc.

Fig. 4 shows a known structure of a full-bridge type silicon strain gauge, which is basically composed of two half-bridge type strain gauges 01 arranged laterally side by side and substantially symmetrically on a central line Pm, in order to make the resistances of two high strain regions 02a respectively located on two non-adjacent bridge arms of a wheatstone bridge, it shares one first pad 014 (the middle-most pad in fig. 4) with the strain resistance 012 located in the high strain region 02a and the strain resistance 011 located in the low strain region 02b of the other half-bridge type strain gauge 01, and all five pads are gathered toward the longitudinal middle and arranged laterally, and the length directions of all pads are arranged longitudinally to make the difference between the longitudinal distances of the high strain regions 02a and the low strain regions 02b as large as possible to obtain a larger measurement accuracy, while making it possible to reduce the width of a single half-bridge type strain gauge 01 to a width W1 including four columns of silicon strips. Since the pads need to be connected to the outside by wires (typically gold wires), they should have a proper length and a minimum width, and insulation requirements between the pads need to be satisfied. Thus, after the pads are laterally spaced apart side by side, a common set width W2 of the first pad 014 needs to be set aside in the middle of the lateral direction, and also a supporting silicon bar 011e needs to be set at a corresponding position due to a large lateral distance, so that such a full-bridge semiconductor strain gauge is required to have a total width 2w1+w2 and five pads in total, which makes it necessary to perform wire bonding with the outside five times.

The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.

Disclosure of utility model

Aiming at the defects of the prior art, the application provides a full-bridge semiconductor strain gauge, which reduces the number of bonding pads of the full-bridge semiconductor strain gauge to four and reduces the total width of the full-bridge semiconductor strain gauge on the premise of meeting the use requirement.

In order to achieve the above purpose, the present application provides the following technical solutions: a full bridge semiconductor strain gauge, comprising:

The semiconductor layer is arranged along the front-back direction in the thickness direction and comprises four pad foundations and four bridge arm resistances which form a Wheatstone full bridge;

The four pad bases comprise a fourth pad base and a third pad base which are respectively positioned at the left side and the right side of a reference point, a first pad base positioned at the left upper side of the fourth pad base and a second pad base positioned at the right upper side of the third pad base;

The four bridge arm resistors comprise a first bridge arm resistor which is positioned at the left upper part of the reference point and the two ends of the first bridge arm resistor extend to the first pad foundation and the fourth pad foundation respectively, a third bridge arm resistor which is positioned at the right upper part of the reference point and the two ends of the third bridge arm resistor extend to the third pad foundation and the second pad foundation respectively, a fourth bridge arm resistor which is positioned at the lower part of the reference point and the two ends of the fourth bridge arm resistor extend to the fourth pad foundation and the third pad foundation respectively, and a second bridge arm resistor which is positioned at the lower part of the reference point and the two ends of the second bridge arm resistor extend to the first pad foundation and the second pad foundation respectively; the four bridge arm resistors comprise a plurality of resistor bars which extend up and down and are connected in sequence, and a plurality of transverse connecting parts which extend left and right and are connected to two adjacent resistor bars;

The metal layer is attached to the front side surface of the semiconductor layer and comprises four bonding pads respectively corresponding to the front side surfaces of the four bonding pad bases and a plurality of covering parts respectively corresponding to the front side surfaces of the transverse connection parts, and the transverse connection parts are respectively positioned on the upper outer side, the lower outer side and the lower outer side of the four bonding pad bases;

The resistor strips are distributed on a plurality of vertical lines which extend up and down and are arranged at intervals left and right, and the second bridge arm resistor surrounds the fourth bridge arm resistor from the lower side.

Preferably, the plurality of longitudinal lines are equidistantly arranged

Preferably, the resistor strips are the same width.

Preferably, the first bridge arm resistor and the third bridge arm resistor are symmetrically arranged.

Preferably, the total length of the resistive strips of each bridge arm resistor is the same as the total length of the resistive strips of the other bridge arm resistors.

Preferably, each of the four bridge arm resistors includes four resistor bars and three transverse connection portions connecting between every two adjacent resistor bars, and the four resistor bars form a "U" shape bend at the three transverse connection portions.

Preferably, the plurality of longitudinal lines are eight in total, four resistance bars of the first bridge arm resistor are sequentially arranged on the first to fourth longitudinal lines, and four resistance bars of the third bridge arm resistor are sequentially arranged on the fifth to eighth longitudinal lines; four resistor strips of the second bridge arm resistor are sequentially arranged on the first, fourth, fifth and eight longitudinal lines;

Preferably, four resistor strips of the fourth bridge arm resistor are sequentially arranged on the second, third, sixth and seven longitudinal lines; the fourth leg resistance and the second leg resistance extend side by side below the reference point.

Preferably, the semiconductor layer is silicon or silicon carbide.

Preferably, an insulating substrate is attached to the rear side surface of the semiconductor layer.

Compared with the prior art, the full-bridge semiconductor strain gauge can reduce the number of bonding pads from five to four, and simultaneously can reduce the overall width and further reduce the cost.

Drawings

FIG. 1 is a schematic diagram of a Wheatstone full bridge circuit;

FIGS. 2 and 3 are schematic structural views of a conventional half-bridge type silicon strain gauge and a schematic arrangement thereof on a plate-like elastomer surface;

FIG. 4 is a schematic diagram of a conventional full-bridge silicon strain gauge;

FIG. 5 is a schematic diagram of a full-bridge semiconductor strain gauge according to a first preferred embodiment of the present application;

FIG. 6 is a perspective view of a full-bridge semiconductor strain gauge according to another preferred embodiment of the present application;

Reference numerals illustrate: 100. a semiconductor strain gauge; 11. an effective resistance portion; 12. an ineffective resistance portion; 1. a semiconductor layer; 2a, high strain region; 2. a metal layer; 3. an insulating substrate; 11a, a first resistor arm; 11b, a second resistor arm; 11c, a third resistor arm; 11d, a fourth resistor arm; 12a, a first transverse connection; 12b, a second transverse connection; 12c, a third transverse connection; 13a, a first cover part; 13b, a second cover; 13c, a third cover; 21a, a first resistor arm; 21b, a second resistor arm; 21c, a third resistor arm; 21d, a fourth resistor arm; 23a, a first cover part; 23b, a second cover; 23c, a third cover; 22a, a first transverse connection; 22b, a second transverse connection; 22c, a third transverse connection; 41a, a first resistor arm; 41b, a second resistor arm; 41c, a third resistor arm; 41d, fourth resistor arms; 43a, a first cover part; 43b, a second cover; 43c, a third cover; 42a, a first transverse connection; 42b, a second transverse connection; 42c, third transverse connection; 51a, a first pad foundation; 51. a first bonding pad; 52a, a second pad foundation; 52. a second bonding pad; 53a, a third pad foundation; 53. a third bonding pad; 54a, fourth pad foundation; 54. a fourth pad;

Detailed Description

The technical solutions of the present application will be clearly and completely described below with reference to the accompanying drawings. The following examples are illustrative only and are not to be construed as limiting the application. In the following description, the same reference numerals are used to designate the same or equivalent elements, and duplicate descriptions are omitted.

In the description of the present application, it should be understood that the directions or positional relationships indicated by the terms "upper", "lower", "inner", "outer", "left", "right", etc. are based on the directions or positional relationships shown in the drawings, or the directions or positional relationships in which the product of the present application is conventionally put in use, or the directions or positional relationships in which those skilled in the art conventionally understand are merely for convenience of describing the present application and for simplifying the description, and are not indicative or implying that the apparatus or element to be referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be construed as limiting the present application.

In addition, the terms "mounted," "connected," "coupled," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present application can be understood as appropriate by those of ordinary skill in the art.

It should be further understood that the term "and/or" as used in the present description and the corresponding claims refers to any and all possible combinations of one or more of the listed items.

As shown in fig. 5, the full-bridge semiconductor strain gauge 100 of the present embodiment includes a semiconductor layer 1 disposed in the front-rear direction in the thickness direction, and a metal layer 2 attached to the front side surface of the semiconductor layer 1. The semiconductor layer 1 forms four pad bases 51a to 54a and bridge arm resistors R1 to R4 connected and extended between them to form a wheatstone full bridge. Bridge arm resistors R1 to R4 extend only in two orthogonal directions (X direction and Y direction of rectangular coordinate system with a reference point O as origin as shown in the figure), and form a closed loop structure through pad bases 51a to 54 a. Each of the arm resistances R1 to R4 includes an effective resistance portion 11 extending in the Y direction and a lateral connection portion 12 extending in the X direction. The front side surfaces of the lateral connection portion 12 and the four pad bases 51a to 54a are each covered with a covering portion as a part of the metal layer 2. Since the resistivity of the metal layer 2 is much smaller than the bridge arm resistance, it is connected in parallel with the lateral connection portion 12 attached on the rear side so that this portion does not contribute to the resistance value of the bridge arm resistance, and the cover portions on the pad bases 51a to 54a serve as pads 51 to 54 to be connected to the outside through leads. The first pad bases 51 to 54 cover most of the corresponding pad bases 51a to 54a or cover the entire front side surfaces thereof. The material of the metal layer may be aluminum, gold, platinum or other known suitable metals.

In a rectangular coordinate system (X, Y) with the reference point O as an origin, for convenience of description and accurate expression, as shown in fig. 5, the following "longitudinal", "left-right" directions are X-directions, the "transverse", "up-down" directions are Y-directions, the "left" is the-X-direction, the "right" is the +x-direction, the "up" is the +y-direction, and the "down" is the-Y-direction. The first leg resistance R1 is located in the second quadrant, i.e. in the upper left of the reference point O. The two ends of the first bridge arm resistor R1 are respectively connected to the first pad base 51a and the fourth pad base 54a in an extending manner. The first pad base 51a and the fourth pad base 54a are disposed on the left and right sides of the reference point O, respectively. The first bridge arm resistor R1 is led out from the fourth pad base 54a, and in the second quadrant, extends upward to form a first resistor 11a, extends leftward to form a first lateral connection portion 12a, extends downward to form a second resistor 11b, extends leftward to form a second lateral connection portion 12b, extends upward to form a third resistor 11c, extends leftward to form a second lateral connection portion 12c, extends downward to form a fourth resistor 11d, and is connected to the first pad base 51a.

The third bridge arm resistor R3 is located in the first quadrant and is preferably symmetrically disposed with R1. Specifically, both ends of the third bridge arm resistor R3 are connected to the third pad base 53a and the second pad base 52a, the third pad base 53a and the second pad base 52a are disposed on the left and right sides of the reference point O, respectively, and the first pad base 51a is connected to the upper left of the fourth pad base 54a, and the second pad base 52a is located to the upper right of the third pad base 53 a. The third arm resistor R3 is led out from the third pad base 53a, and in the first quadrant, extends upward to form the first resistor 11a, extends leftward to form the first lateral connecting portion 12a, extends downward to form the second resistor 11b, extends leftward to form the second lateral connecting portion 12b, extends upward to form the third resistor 11c, extends leftward to form the third lateral connecting portion 12c, extends downward to form the fourth resistor 11d, and is connected to the second pad base 52a.

The second bridge arm resistor R2 and the fourth bridge arm resistor R4 are positioned in the third quadrant and the fourth quadrant. The second arm resistor R2 is connected between the first pad base 51a and the second pad base 52a. The bridge arm resistor R2 is led out from the first pad base 51a on the left side, sequentially extends downward to form a first resistor bar 21a, extends rightward to form a first transverse connection portion 22a, extends upward to form a second resistor bar 21b, extends rightward to form a second transverse connection portion 22b, extends downward to form a third resistor bar 21c, extends rightward to form a third transverse connection portion 22c, extends upward to form a fourth resistor bar 21d, and is connected to the second pad base 52a.

The second bridge arm resistor R4 is connected between the fourth pad base 54a and the third pad base 53a, and is folded and extended at an interval and side by side after being led out from the fourth pad base 54a on the left side of the bridge arm resistor R2 and after being led out from the first pad base 51a on the left side of the bridge arm resistor R4, namely, in the same folding order and direction, specifically: the first resistor 41a, the first transverse connection 42a, the second resistor 41b, the second transverse connection 42b, the third resistor 41c, the third transverse connection 42c, the fourth resistor 41d, and the third pad base 53a are formed by extending downward, upward, downward, upward, and downward in this order.

The fourth arm resistor R4 is surrounded by the second arm resistor R2 from the lower side upward. An opening 6 is left between the first land base 51a and the second land base 52a for leading out a first resistor arm 11a from the fourth land base 54a and the third land base 53a, respectively. Compared with the bridge arm resistors R1-R4, the corresponding pad bases 51 a-54 a are positioned at one side close to the reference point O, or the transverse connection parts are positioned at the upper and lower outer sides of the four pad bases 51 a-54 a.

Preferably, the initial resistance values (resistance value when no strain) of the first bridge arm resistor R1 and the third bridge arm resistor R3 are the same; more preferably, the first arm resistor R1 and the third arm resistor R3 are completely symmetrical.

Preferably, the initial resistance values of the second bridge arm resistor R2 and the fourth bridge arm resistor R4 are the same, and may also be the same as the resistance values of the first bridge arm resistor R1 and the third bridge arm resistor R3. When the widths of the resistive strips of the arm resistors R1 to R4 are the same, this means that the total lengths of the effective resistive portions of the arm resistors R1 to R4 are also the same. Specifically, the second pad 52 may be extended downward to be flush with the lower end of the third pad 53, and the right end of the third cover portion 23c may be extended upward to be flush with the upper end of the third cover portion 43c, so that the lengths of the fourth resistive track 21d and the fourth resistive track 41d are correspondingly the same; similarly, the right end of the second cover portion 43b may be made to extend downward to be flush with the lower end of the second lateral connecting portion 22b, and the left end of the third lateral connecting portion 22c may be made to extend upward to be flush with the upper end of the third lateral connecting portion 42 c. Similarly, both left and right ends of the first cover portion 23a extend upward and are flush with the upper ends of the third cover portion 43c, respectively.

The semiconductor strain gauge 100 of the present embodiment occupies only eight rows of resistor strips, and has a total width 2w1+w3, which is smaller than the total width 2w1+w2 of the full-bridge semiconductor strain gauge 100 in the prior art, so that the area of the semiconductor wafer used is smaller, and the connection with the external circuit can be formed only by four pads, so that the bonding wires can be reduced from five to four.

Preferably, the resistor strips have the same width and are arranged on eight longitudinal lines which are arranged side by side, and the eight longitudinal lines are preferably arranged equidistantly. For example, the resistor bars 11a to 11d of the first arm resistor R1 are sequentially arranged on the eighth to fifth vertical lines, the resistor bars 11a to 11d of the third arm resistor R3 are sequentially arranged on the fifth to eighth vertical lines, the resistor bars of the second arm resistor R2 are sequentially arranged on the first, fourth, fifth and eighth vertical lines, and the resistor bars of the fourth arm resistor R4 are sequentially arranged on the second, third, sixth and seventh vertical lines. And, bridge arm resistance R1 ~ R4 all form "U" shape bend in three transverse connection department. The second arm resistor R2 preferably extends side by side with the fourth arm resistor R4 below.

The semiconductor strain gauge 100 of the present embodiment may be mounted in use on a longitudinally extending centerline Pm passing through the center strain point Pc. The material of the semiconductor layer 1 may be silicon or silicon carbide, or other semiconductor materials with piezoresistive effect.

In other preferred embodiments, as shown in fig. 6, the semiconductor layer 1 may be disposed on the insulating substrate 3, and the insulating substrate 3 may be glass, etc., so that the mechanical properties of the semiconductor strain gauge may be improved, and the supporting silicon strip may be omitted. The manufacturing method of the full-bridge type semiconductor strain gauge with the insulating substrate 3 comprises the following steps: 1. providing an insulating base 3, attaching the semiconductor layer 1 to a front side surface of the insulating base 3; 2. ion implantation is performed from the front side surface of the semiconductor layer 1 to form the resistive track (a protective layer is first made before ion implantation, and the protective layer is removed after implantation); 3. depositing a metal layer 2 and a resistance protection layer (e.g., oxide layer, nitride layer) on the front side surface of the semiconductor layer 1; 4. removing the excess portion by etching; 5. the insulating base 3 is thinned to a proper thickness.

It will be appreciated that in other embodiments, each of the arm resistors R1 to R4 may be bent more times, for example, the arm resistors R1 and R3 may be bent to form four "U" bends, five "U" bends, or more "U" bends, respectively, or may be bent less times, for example, the third arm resistor R3 may be extended from the left side to the third lateral connection portion 12c, and the second pad 52 may be extended upward and connected to the third covering portion 13c, regardless of the area utilization of the semiconductor wafer.

The scope of the present disclosure is defined not by the detailed description but by the claims and their equivalents, and all modifications within the scope of the claims and their equivalents are to be construed as being included in the present disclosure.

Claims (10)

1. A full-bridge type semiconductor strain gauge, comprising, characterized in that it comprises:

A semiconductor layer (1) provided in the front-rear direction in the thickness direction, comprising four pad bases (51 a-54 a) and four arm resistors (R1-R4) that form a Wheatstone full bridge;

The four pad bases (51 a-54 a) include a fourth pad base (54 a) and a third pad base (53 a) respectively located on the left and right sides of a reference point (O), a first pad base (51 a) located on the upper left side of the fourth pad base (54 a), and a second pad base (52 a) located on the upper right side of the third pad base (53 a);

Four bridge arm resistances (R1-R4), including a first bridge arm resistance (R1) located at the upper left of the reference point (O) and having both ends respectively extending to the first pad base (51 a) and the fourth pad base (54 a), a third bridge arm resistance (R3) located at the upper right of the reference point (O) and having both ends respectively extending to the third pad base (53 a) and the second pad base (52 a), a fourth bridge arm resistance (R4) located below the reference point (O) and having both ends respectively extending to the fourth pad base (54 a) and the third pad base (53 a), and a second bridge arm resistance (R2) located below the reference point (O) and having both ends respectively extending to the first pad base (51 a) and the second pad base (52 a); the four bridge arm resistors (R1-R4) comprise a plurality of resistor strips which extend up and down and are connected in sequence, and a plurality of transverse connecting parts which extend left and right and are connected to two adjacent resistor strips;

A metal layer (2) attached to the front side surface of the semiconductor layer (1) and including four pads (51-54) respectively corresponding to the front side surfaces of the four pad bases (51 a-54 a) and a plurality of covering portions (13 a) respectively corresponding to the front side surfaces of the lateral connecting portions;

The resistor strips are distributed on a plurality of vertical lines which extend up and down and are arranged at intervals left and right, the second bridge arm resistor (R2) surrounds the fourth bridge arm resistor (R4) from the lower side, and the transverse connection parts are respectively positioned on the upper side, the lower side and the outer side of the four bonding pad bases (51 a-54 a).

2. The full-bridge semiconductor strain gauge of claim 1, wherein the plurality of longitudinal lines are equidistantly disposed.

3. The full-bridge semiconductor strain gauge of claim 2, wherein the resistive strips are the same width.

4. The full-bridge semiconductor strain gauge according to claim 1, wherein the first leg resistance (R1) and the third leg resistance (R3) are arranged bilaterally symmetrically.

5. The full-bridge semiconductor strain gauge of claim 1, wherein the total length of the resistive track of each leg resistor (R1-R4) is the same as the total length of the resistive tracks of the other leg resistors.

6. The full-bridge semiconductor strain gauge of claim 1, wherein the four leg resistances (R1-R4) each comprise four resistive strips and three lateral connections connecting between every two adjacent resistive strips, the four resistive strips forming a "U" bend at the three lateral connections.

7. The full-bridge semiconductor strain gauge according to claim 6, wherein the plurality of vertical lines is eight, four resistive strips of the first bridge arm resistor (R1) are sequentially arranged on the first to fourth vertical lines, and four resistive strips of the third bridge arm resistor (R3) are sequentially arranged on the fifth to eighth vertical lines.

8. The full-bridge semiconductor strain gauge of claim 7, wherein the four resistive strips of the second leg resistance (R2) are arranged in sequence on the first, fourth, fifth and eight longitudinal lines; four resistor strips of the fourth bridge arm resistor (R4) are sequentially arranged on the second, third, sixth and seven longitudinal lines; the fourth leg resistance (R4) and the second leg resistance (R2) extend side by side below the reference point (O).

9. Full-bridge semiconductor strain gauge according to claim 1, characterized in that the semiconductor layer (1) is silicon or silicon carbide.

10. Full-bridge semiconductor strain gauge according to claim 1, characterized in that an insulating substrate (3) is attached to the rear side surface of the semiconductor layer (1).