CN221039241U - DDR particle impedance measuring device and jig - Google Patents

DDR particle impedance measuring device and jig Download PDF

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Publication number
CN221039241U
CN221039241U CN202322823622.1U CN202322823622U CN221039241U CN 221039241 U CN221039241 U CN 221039241U CN 202322823622 U CN202322823622 U CN 202322823622U CN 221039241 U CN221039241 U CN 221039241U
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particle
ddr
clamping groove
ddr particle
chip
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CN202322823622.1U
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Chinese (zh)
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方凯平
黄秋容
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Nanning Taike Semiconductor Co ltd
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Nanning Taike Semiconductor Co ltd
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Abstract

The utility model discloses a DDR particle impedance measuring device and a jig, wherein the device is used for measuring the impedance of particles of a DDR particle chip, and comprises the following components: a base plate and at least one card slot assembly; a plurality of test points are arranged on the substrate; the clamping groove assembly is arranged on the substrate, a limiting clamping groove is formed in the clamping groove assembly, a plurality of metal pieces are arranged in the limiting clamping groove, and the metal pieces are electrically connected with the test points in a one-to-one correspondence manner; when the DDR particle chip is placed in the limiting clamping groove, a plurality of particle pins on the DDR particle chip are in one-to-one correspondence and are abutted to a plurality of metal pieces. According to the utility model, after the DDR particle chip is placed in the clamping groove component, the particle pins on the DDR particle chip are led out to the test points through the metal piece, the impedance measurement of the particle pins can be completed through the impedance measurement of the test points on the substrate, the solder balls on the particle pins are not damaged, and great convenience is brought to maintenance and positioning.

Description

DDR particle impedance measuring device and jig
Technical Field
The utility model relates to the technical field of computers, in particular to a DDR particle impedance measuring device and a jig.
Background
Along with the rapid development of DDR5 particle chip packaging technology, the current mainstream DDR5 particle chip adopts BGA packaging, and has the advantage of small packaging size.
When the particle breaks down and needs to be positioned, maintained and measured for impedance, the DDR5 particle chip needs to be measured for impedance, the common measurement mode is to directly measure the resistance value of the tin ball of the particle by using a universal meter pen, but because the package size of the particle is smaller and is not easy to test, the tin ball of the particle is more dense, the pen is easy to misplace, and the way that the pen directly measures the resistance value of the chip tin ball can damage the particle tin ball, especially for factories, the measurement mode is easy to cause longer maintenance and positioning period. It is obvious that this measurement does not meet the current market development requirements.
Disclosure of utility model
The utility model aims to provide a DDR (double data rate) particle impedance measuring device and a jig, and aims to solve the problems that when the existing DDR5 particle chip fails and the particle needs to be positioned, maintained and measured, the operation is inconvenient and the measuring and maintaining efficiency is low.
In order to solve the technical problems, the aim of the utility model is realized by the following technical scheme: provided is a DDR particle impedance measuring device for measuring impedance of particles of a DDR particle chip, comprising:
A substrate provided with a plurality of test points;
The clamping groove assembly is arranged on the substrate, a limiting clamping groove is formed in the clamping groove assembly, a plurality of metal pieces are arranged in the limiting clamping groove, and the metal pieces are electrically connected with the test points in a one-to-one correspondence manner;
When the DDR particle chip is placed in the limiting clamping groove, a plurality of particle pins on the DDR particle chip are in one-to-one correspondence and are abutted to a plurality of metal pieces.
Further, the test points are respectively located on two opposite sides of the substrate, and the test points on two sides respectively correspond to the particle pins on two opposite sides of the DDR particle chip.
Further, the clamping groove assembly comprises a fixed plate and a cover plate; the bottom surface of fixed plate is fixed laminate in on the base plate, spacing draw-in groove is seted up in the top surface of fixed plate, the apron lid close connect in the top surface of fixed plate.
Further, a pressing piece is arranged on the covering surface of the cover plate; when the cover plate covers the fixed plate, the pressing piece corresponds to the limiting clamping groove.
Further, the metal piece is a raised arc gold-plated metal sheet.
Further, a connecting piece is arranged between the cover plate and the fixed plate, and the cover plate is rotationally connected with the fixed plate through the connecting piece.
Further, the connecting piece is one of a torsion spring, a strip spring and a hinge.
Further, the cover plate and the fixing plate are respectively provided with a buckle and a bayonet, and when the cover plate is covered on the fixing plate, the buckle and the bayonet are mutually buckled and connected.
Further, two clamping groove assemblies are arranged, and limit clamping grooves in the two clamping groove assemblies are respectively used for placing DDR (double data rate) particle chips of the FBGA82 packaging type and the FBGA106 packaging type.
The embodiment of the utility model also provides a jig, which comprises the DDR particle impedance measuring device.
The embodiment of the utility model provides a DDR particle impedance measuring device and a jig, wherein the device is used for measuring the impedance of particles of a DDR particle chip and comprises the following components: a base plate and at least one card slot assembly; a plurality of test points are arranged on the substrate; the clamping groove assembly is arranged on the substrate, a limiting clamping groove is formed in the clamping groove assembly, a plurality of metal pieces are arranged in the limiting clamping groove, and the metal pieces are electrically connected with the test points in a one-to-one correspondence manner; when the DDR particle chip is placed in the limiting clamping groove, a plurality of particle pins on the DDR particle chip are in one-to-one correspondence and are abutted to a plurality of metal pieces. According to the embodiment of the utility model, after the DDR particle chip is placed in the clamping groove assembly, the particle pins on the DDR particle chip are led out to the test points through the metal piece, the impedance measurement of the particle pins can be completed through the impedance measurement of the test points on the substrate, the solder balls on the particle pins are not damaged, and great convenience is brought to maintenance and positioning.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic perspective view of a DDR particle impedance measurement apparatus according to an embodiment of the utility model;
FIG. 2 is a schematic side view of a DDR particle impedance measurement apparatus according to an embodiment of the utility model;
Fig. 3 is a schematic top view of a DDR particle impedance measurement apparatus according to an embodiment of the present utility model.
The figure identifies the description:
1. a substrate; 11. a test point;
2. A card slot assembly; 21. a fixing plate; 211. a limit clamping groove; 212. a metal piece; 213. a bayonet; 22. a cover plate; 221. a buckle; 23. a connecting piece;
3. DDR particle chip.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
It should be understood that the terms "comprises" and "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the utility model herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
Referring to fig. 1 and 2, an embodiment of the present utility model provides a DDR particle impedance measurement apparatus for measuring impedance of particles of a DDR particle chip 3, including: a base plate 1 and at least one clamping groove component 2; a plurality of test points 11 are arranged on the substrate 1; the clamping groove assembly 2 is arranged on the substrate 1, a limiting clamping groove 211 is formed in the clamping groove assembly 2, a plurality of metal pieces 212 are arranged in the limiting clamping groove 211, and the metal pieces 212 are electrically connected with the test points 11 in a one-to-one correspondence manner; when the DDR particle chip 3 is placed in the limit clamping groove 211, a plurality of particle pins on the DDR particle chip 3 are in one-to-one correspondence and are abutted against a plurality of metal pieces 212;
In this embodiment, the substrate 1 is a PCB substrate, and may be used as a support for electrical connection of components, the bottom of the clamping slot assembly 2 is fixedly attached to the substrate 1, and the metal pieces 212 in the limiting clamping slot 211 are electrically connected to the plurality of test points 11 in a one-to-one correspondence manner through the bottom of the clamping slot assembly 2; based on this, after the DDR particle chip 3 is placed in the card slot assembly 2, a plurality of particle pins on the DDR particle chip 3 are in one-to-one correspondence and are abutted against a plurality of metal pieces 212, so that the particle pins can be led out to the test points 11, the impedance measurement of the particle pins can be completed by performing the impedance measurement on the test points 11 on the substrate 1, and the solder balls on the particle pins are not damaged, so that great convenience is brought to maintenance and positioning.
In an embodiment, the plurality of test points 11 are respectively located on two opposite sides of the substrate 1, and the plurality of test points 11 on two sides respectively correspond to the plurality of particle pins on two opposite sides of the DDR particle chip 3.
In this embodiment, based on the distribution manner of multiple particle pins on the DDR particle chip 3, in order to facilitate positioning of specific particle pins, multiple test points 11 on two sides of the substrate 1 are correspondingly distributed side by side, and one test point 11 corresponds to one particle pin, so that the particle pin to be measured can be quickly and accurately positioned, and the signal types of the led particle pins generally include a data signal (DQ), a clock signal (CK), an address signal (ADDR), a Control Signal (CS), a power signal, and so on.
It will be appreciated that each test point 11 may also be marked on the substrate 1, and that the signal type of a particular particle pin may also be located quickly.
In one embodiment, the clamping groove assembly 2 comprises a fixed plate 21 and a cover plate 22; the bottom surface of the fixed plate 21 is fixedly attached to the base plate 1, the limiting clamping groove 211 is formed in the top surface of the fixed plate 21, and the cover plate 22 is connected to the top surface of the fixed plate 21 in a covering manner.
In this embodiment, the clamping groove assembly 2 is used for limiting the DDR particle chip 3 to be measured, so that the DDR particle chip 3 is stably limited in the limiting clamping groove 211, and the particle pins of the DDR particle chip 3 can be well abutted against the corresponding metal pieces 212, so as to stably lead out the particle pins to the measuring points.
Specifically, the fixing plate 21 may be in a square block structure, and the bottom of the fixing plate 21 may be fixed and attached to the surface of the substrate 1 by welding or bonding or plastic screw connection, preferably, the fixing plate is welded and attached to the substrate 1 in a BGA package mode, so that the fixing plate is more stable, reliable and durable; the cover plate 22 can be matched with the fixing plate 21 in shape, the cover plate 22 can be opened and closed to set the surface of the fixing plate 21, and the opening and closing modes of the cover plate 22 can be hinged, turnover, sliding, detachable and clamping and the like.
The shape of the limiting clamping groove 211 is matched with the shape of the DDR particle chip 3 to be measured so as to limit the DDR particle chip 3; the number and the positions of the metal pieces 212 in the limiting clamping groove 211 correspond to the particle pins of the DDR particle chip 3; therefore, when measuring the particle pins of the DDR particle chip 3, only the DDR particle chip 3 is directly placed in the limit clamping groove 211, then the cover plate 22 is covered on the fixed plate 21, the DDR particle chip 3 is propped in the limit clamping groove 211 through the cover plate 22, so that the particle pins of the DDR particle chip 3 are kept in contact with the corresponding metal piece 212, the particle pins can be stably led out to a measuring point, and the impedance measurement of the particle pins can be realized through measuring the measuring point; has the advantages of convenient operation and high measurement and maintenance efficiency when measuring impedance.
In one embodiment, the cover surface of the cover plate 22 is provided with a pressing member; when the cover plate 22 is covered on the fixing plate 21, the pressing piece corresponds to the limiting clamping groove 211.
In this embodiment, the pressing piece is provided on the cover surface of the cover plate 22 in an integrally protruding manner, and the pressing piece is a pressing block, when the cover plate 22 is covered on the fixing plate 21, the pressing piece is used for pressing the DDR particle chip 3 placed in the limiting clamping groove 211, so that the particle pins of the DDR particle chip 3 can be ensured to be stably kept in contact with the metal piece 212, and the particle pins are ensured to be stably led out to the measuring point.
In one embodiment, the metal piece 212 may be a raised circular arc gold plated metal sheet; the metal piece 212 is electrically connected with the particle pins, the circular arc position of the metal piece 212 contacts the particle pins, the mode that the traditional probe directly pierces the tin balls is compared, deformation can not be caused to the particle tin balls, the particle pins are protected under the condition that good contact is ensured, and the structure can protect the particle bodies more than the traditional probe contact. Therefore, compared with the common PCB pad test point, the PCB pad test point has the advantages of durability, better electrical property, longer service life and better operability.
In one embodiment, a connecting member 23 is disposed between the cover plate 22 and the fixing plate 21, and the cover plate 22 is rotatably connected to the fixing plate 21 through the connecting member 23.
In this embodiment, the cover plate 22 and the fixing plate 21 are preferably turned over and covered, the connecting piece 23 may be one of a torsion spring, a strip spring and a hinge, and one side of the cover plate 22 is connected with one side of the fixing plate 21 through the connecting piece 23 to realize turning over and opening.
Preferably, the connecting piece 23 of the present embodiment adopts a strip spring, and drives the strip spring to deform and generate a rebound force when the cover plate 22 is opened, so that the cover plate 22 has an elastic force covering the fixing plate 21, and the DDR particle chip 3 placed in the limiting slot 211 is more conveniently limited.
In an embodiment, the cover 22 and the fixing plate 21 are respectively provided with a buckle 221 and a bayonet 213, and when the cover 22 is covered on the fixing plate 21, the buckle 221 and the bayonet 213 are mutually buckled.
In this embodiment, the buckle 221 is disposed on the side of the cover plate 22 away from the connecting piece 23, the bayonet 213 is disposed on the side of the fixed plate 21 away from the connecting piece 23, and when the cover plate 22 is covered on the fixed plate 21, the cover plate 22 can be stably covered on the fixed plate 21 through the buckled connection of the buckle 221 and the bayonet 213; thereby keeping the DDR particle chip 3 placed in the limit card slot 211 limited.
In one embodiment, as shown in fig. 3, two card slot assemblies 2 are provided, and the limit card slots 211 in the two card slot assemblies 2 are used for placing the DDR granule chips 3 of the FBGA82 package type and the FBGA106 package type, respectively.
Taking a DDR5 granule chip as an example, currently mainstream DDR5 granules mainly have X4/X8/X16-bit wide granules JEDEC standard Package with X4/X8-bit wide being 82Ball, and X16-bit wide granules JEDEC standard Package being 106Ball,82Ball and 106Ball corresponding different limit card slots 211; two clamping groove assemblies 2 can therefore be provided on one base plate 1, each for adapting to both specifications.
The embodiment of the utility model also provides a jig, which comprises the DDR particle impedance measuring device.
While the utility model has been described with reference to certain preferred embodiments, it will be understood by those skilled in the art that various changes and substitutions of equivalents may be made and equivalents will be apparent to those skilled in the art without departing from the scope of the utility model. Therefore, the protection scope of the utility model is subject to the protection scope of the claims.

Claims (10)

1. A DDR particle impedance measurement apparatus for measuring impedance of particles of a DDR particle chip, comprising:
A substrate provided with a plurality of test points;
The clamping groove assembly is arranged on the substrate, a limiting clamping groove is formed in the clamping groove assembly, a plurality of metal pieces are arranged in the limiting clamping groove, and the metal pieces are electrically connected with the test points in a one-to-one correspondence manner;
When the DDR particle chip is placed in the limiting clamping groove, a plurality of particle pins on the DDR particle chip are in one-to-one correspondence and are abutted to a plurality of metal pieces.
2. The DDR particle impedance measurement apparatus of claim 1, wherein a plurality of said test points are located on opposite sides of said substrate, respectively, and a plurality of said test points on opposite sides of said DDR particle chip correspond to a plurality of said particle pins on opposite sides of said DDR particle chip, respectively.
3. The DDR particle impedance measurement device of claim 1, wherein the clamping groove assembly comprises a fixed plate and a cover plate; the bottom surface of fixed plate is fixed laminate in on the base plate, spacing draw-in groove is seted up in the top surface of fixed plate, the apron lid close connect in the top surface of fixed plate.
4. The DDR particle impedance measurement apparatus according to claim 3, wherein the cover surface of the cover plate is provided with a pressing member; when the cover plate covers the fixed plate, the pressing piece corresponds to the limiting clamping groove.
5. The DDR particle impedance measurement device of claim 1, wherein the metal piece is a convex circular arc gold plated metal sheet.
6. The DDR particle impedance measurement apparatus according to claim 3, wherein a connecting member is disposed between the cover plate and the fixing plate, and the cover plate is rotatably connected to the fixing plate through the connecting member.
7. The DDR particle impedance measurement device of claim 6, wherein the connector is one of a torsion spring, a bar spring, and a hinge.
8. The DDR particle impedance measurement apparatus according to claim 3, wherein the cover plate and the fixing plate are respectively provided with a buckle and a bayonet, and the buckle and the bayonet are mutually buckled when the cover plate is covered on the fixing plate.
9. The DDR particle impedance measurement apparatus of claim 1, wherein two of the card slot assemblies have two card slot limiting slots for receiving respective types of DDR particle chips of FBGA82 and FBGA106 packages.
10. A jig comprising the DDR particle impedance measuring apparatus according to any one of claims 1 to 9.
CN202322823622.1U 2023-10-20 2023-10-20 DDR particle impedance measuring device and jig Active CN221039241U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322823622.1U CN221039241U (en) 2023-10-20 2023-10-20 DDR particle impedance measuring device and jig

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322823622.1U CN221039241U (en) 2023-10-20 2023-10-20 DDR particle impedance measuring device and jig

Publications (1)

Publication Number Publication Date
CN221039241U true CN221039241U (en) 2024-05-28

Family

ID=91139047

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202322823622.1U Active CN221039241U (en) 2023-10-20 2023-10-20 DDR particle impedance measuring device and jig

Country Status (1)

Country Link
CN (1) CN221039241U (en)

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