CN220986091U - Display device - Google Patents

Abstract

A display device is provided. The display device includes a substrate including an upper surface carrying a light emitting element, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface, wherein the substrate includes: a side surface intersecting the upper surface in the through hole; a first surface intersecting the bottom surface; a second surface intersecting the side surface; and a third surface between the first surface and the second surface, and wherein the first surface and the second surface are spaced apart from each other, and the third surface is between the first surface and the second surface, and the first surface and the second surface are inclined surfaces. The display device can improve efficiency of a manufacturing process, improve impact resistance of a substrate, relatively easily separate the substrate from a mother substrate, and prevent or reduce damage to the vicinity of a through hole of the display device due to high heat of laser light.

Description

Display device

Technical Field

An aspect of some embodiments of the present disclosure relates to a display device.

Background technique

With the development of information society, the demand for display devices is increasing. For example, display devices are being adopted by a variety of electronic devices such as smart phones, digital cameras, laptop computers, navigation devices and smart TVs. The display device can be a flat panel display device such as a liquid crystal display device, a field emission display device and an organic light emitting display device. Among such flat panel display devices, the light emitting display device includes a light emitting element that can emit light by itself, so that each of the pixels of the display panel can emit light by itself. Therefore, the light emitting display device can display an image without a backlight unit that supplies light to the display panel.

The display device may include a display area displaying an image and a non-display area around the display area. Recently, in order to immerse viewers more in the content displayed on the display area and to increase the aesthetics of the display device, the width of the non-display area has been continuously reduced.

By the way, in the process of manufacturing a display device, a display device can be formed by cutting a mother substrate along a plurality of display units formed on a mother substrate. For example, a through hole in a display device can be formed by cutting the display device on a mother substrate, wherein an optical device such as a camera is positioned in the through hole. In the process of forming the through hole, a film near the through hole may be damaged, for example, delaminated, due to the high heat of the laser. Therefore, there is a method of reducing damage to such a display device.

The above information disclosed in this Background section is only for enhancement of understanding of the background technology and therefore the information discussed in this Background section does not necessarily constitute prior art.

Utility Model Content

The utility model aims to provide a display device which can reduce damage to the display device.

It should be noted that the characteristics of the embodiments according to the present disclosure are not limited to the above-mentioned characteristics; and other characteristics of the present disclosure will be apparent to those skilled in the art through the following description.

According to some embodiments, a display device includes a substrate, the substrate including an upper surface carrying a light-emitting element, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface; wherein the substrate includes: a side surface intersecting with the upper surface in the through hole; a first surface intersecting with the bottom surface; a second surface intersecting with the side surface; and a third surface between the first surface and the second surface, and wherein the first surface and the second surface are spaced apart from each other, and the third surface is between the first surface and the second surface, and the first surface and the second surface are inclined surfaces.

According to some embodiments, one end of the third surface intersects the first surface, and an opposite end of the third surface intersects the second surface.

According to some embodiments, an angle between the bottom surface and the first surface and an angle between the third surface and the second surface are obtuse angles.

According to some embodiments, the angle between the surface and the first surface is equal to, greater than, or less than the angle between the third surface and the second surface.

According to some embodiments, a length of the first surface in the inclined direction is equal to, greater than, or less than a length of the second surface in the inclined direction.

According to some embodiments, the third surface extends parallel to the bottom surface or the upper surface; or, the third surface is an inclined surface.

According to some embodiments, at least one of the first surface and the second surface is a flat surface or a curved surface.

According to some embodiments, a length between the bottom surface and the side surface on a plane formed by the first surface, the second surface, and the third surface is 100 μm to 500 μm.

According to some embodiments, a display device includes a substrate, the substrate including an upper surface carrying a light-emitting element, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface, wherein the substrate includes: a side surface intersecting with the upper surface in the through hole; a first surface intersecting with the bottom surface; a second surface intersecting with the side surface; and a third surface between the first surface and the second surface, wherein an angle between the bottom surface and the first surface and an angle between the third surface and the second surface are obtuse angles, and wherein the bottom surface and the third surface form a step edge.

According to some embodiments, the display device further includes: an optical device at least partially embedded in the through hole.

According to some embodiments of the present disclosure, a display device includes a substrate and a light-emitting element layer, the substrate includes an upper surface, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface, the light-emitting element layer is on the upper surface of the substrate, wherein the substrate includes: a side surface intersecting with the upper surface in the through hole; a first surface intersecting with the bottom surface; a second surface intersecting with the side surface; and a third surface between the first surface and the second surface, and wherein the first surface and the second surface are spaced apart from each other, and the third surface is between the first surface and the second surface, and the first surface and the second surface are inclined surfaces.

According to some embodiments, one end of the third surface intersects the first surface, and an opposite end of the third surface intersects the second surface.

According to some embodiments, an angle between the bottom surface and the first surface and an angle between the third surface and the second surface are obtuse angles.

According to some embodiments, an angle between the bottom surface and the first surface is equal to an angle between the third surface and the second surface.

According to some embodiments, an angle between the bottom surface and the first surface is greater than an angle between the third surface and the second surface.

According to some embodiments, an angle between the third surface and the second surface is greater than an angle between the bottom surface and the first surface.

According to some embodiments, a length of the first surface in the inclined direction is equal to a length of the second surface in the inclined direction.

According to some embodiments, a length of the first surface in the inclined direction is greater than a length of the second surface in the inclined direction.

According to some embodiments, a length of the second surface in the inclined direction is greater than a length of the first surface in the inclined direction.

According to some embodiments, the third surface extends parallel to the bottom surface or the upper surface.

According to some embodiments, the third surface is an inclined surface.

According to some embodiments, at least one of the first surface and the second surface is a flat surface or a curved surface.

According to some embodiments, a length between the bottom surface and the side surface on a plane formed by the first surface, the second surface, and the third surface is 100 μm to 500 μm.

According to some embodiments of the present disclosure, a display device includes a substrate and a light-emitting element layer, the substrate includes an upper surface, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface, the light-emitting element layer is on the upper surface of the substrate, wherein the substrate includes: a side surface intersecting with the upper surface in the through hole; a first surface intersecting with the bottom surface; a second surface intersecting with the side surface; and a third surface between the first surface and the second surface, wherein the angle between the bottom surface and the first surface and the angle between the third surface and the second surface are obtuse angles, and wherein the bottom surface and the third surface form a step edge.

According to some embodiments, an angle between the bottom surface and the first surface is greater than an angle between the third surface and the second surface.

According to some embodiments, a length of the first surface in the inclined direction is greater than a length of the second surface in the inclined direction.

According to some embodiments, a length between the bottom surface and the side surface on a plane formed by the first surface, the second surface, and the third surface is 100 μm to 500 μm.

According to some embodiments, the display device further includes: an optical device at least partially embedded in the through hole.

According to some embodiments of the present disclosure, a method for manufacturing a display device includes the following steps: forming a plurality of display units on a first surface of a mother substrate; forming a first laser irradiation area for cutting the plurality of display units by irradiating a first laser on a second surface of the mother substrate facing the first surface; irradiating a second laser and a third laser on the second surface of the mother substrate to form a second laser irradiation area and a third laser irradiation area along the edge of a through hole of each of the plurality of display units; and separating the plurality of display units by spraying an etchant on the second surface of the mother substrate and cutting the mother substrate along the first laser irradiation area and the second laser irradiation area of the mother substrate.

According to some embodiments, the third laser irradiation region is formed to surround the second laser irradiation region.

According to some embodiments, a depth of the second laser irradiation region from the first surface of the mother substrate is greater than a depth of the third laser irradiation region from the first surface of the mother substrate.

According to some embodiments, the repetition rate of the first laser and the third laser is in the range of 10 kHz to 250 kHz, and the repetition rate of the second laser is in the range of 1 kHz to 50 kHz.

According to some embodiments, the processing speeds of the first laser and the third laser are in the range of 10 mm/s to 250 mm/s, and the processing speed of the second laser is in the range of 1 mm/s to 50 mm/s.

According to some embodiments, the pulse energies of the first and third lasers and the pulse energy of the second laser are in a range of 10 μJ to 300 μJ.

According to some embodiments, the method further includes forming a fourth laser irradiation region by irradiating a fourth laser along an edge of the through hole at a position spaced apart from the second laser irradiation region and on an inner side of the second laser irradiation region.

According to some embodiments of the present disclosure, by irradiating laser and then spraying etchant, it may be possible to reduce the thickness of the mother substrate, separate each of the plurality of display units from the mother substrate, and form a through hollow. In this way, it may be possible to improve the efficiency of the manufacturing process.

In addition, by reducing the angle of the edge of the side surface of the substrate in the through hole of the display device, the impact resistance of the substrate may be improved.

In addition, the substrate may be relatively easily separated from the mother substrate at the through hole of the display device, thereby preventing or reducing damage to the substrate.

In addition, it may be possible to prevent or reduce damage near the through hole of the display device due to high heat of the laser.

It should be noted that the characteristics according to the embodiments of the present disclosure are not limited to those described above, and other effects of the present disclosure will be apparent to those skilled in the art through the following description.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other aspects and features according to embodiments of the present disclosure will become more apparent by describing in more detail aspects of some embodiments according to embodiments of the present disclosure with reference to the accompanying drawings.

FIG. 1 is a perspective view of a display device according to some embodiments of the present disclosure.

FIG. 2 is a plan view showing a display panel according to some embodiments of the present disclosure.

FIG. 3 is a cross-sectional view illustrating an example of the display device taken along line II′ of FIG. 1 .

FIG. 4 is a cross-sectional view illustrating an example of the display pixel of FIG. 3 when a circuit board is bent.

FIG. 5 is a cross-sectional view illustrating an example of a display area of a display panel according to some embodiments of the present disclosure.

FIG. 6 is a layout diagram illustrating an example of the region A of FIG. 2 in more detail.

FIG. 7 is a layout diagram illustrating an example of the region B of FIG. 2 in more detail.

FIG. 8 is a layout diagram illustrating an example of the region D of FIG. 2 in more detail.

FIG. 9 is a cross-sectional view illustrating an example of a display panel taken along line II-II′ of FIG. 6 .

FIG. 10 is a cross-sectional view illustrating an example of a display panel taken along line III-III′ of FIG. 7 .

FIG. 11 is a cross-sectional view illustrating an example of a display panel taken along line IV-IV′ of FIG. 8 .

FIG. 12 is an enlarged cross-sectional view showing an example of the region E of FIG. 9 in more detail.

FIG. 13 is an enlarged cross-sectional view showing an example of the region F of FIG. 10 in more detail.

FIG. 14 is an enlarged cross-sectional view showing an example of the region G of FIG. 11 in more detail.

15 is a layout diagram illustrating an example of a through hole, an inorganic encapsulation region, a wiring region, and a display region of a display panel of region I of FIG. 2 according to some embodiments.

FIG. 16 is a cross-sectional view illustrating an example of a display panel taken along line VV′ of FIG. 15 .

FIG. 17 is an enlarged cross-sectional view showing an example of the region K of FIG. 16 in more detail.

18 to 22 are enlarged cross-sectional views showing various examples of the region L of FIG. 16 .

FIG. 23 is a flowchart for illustrating a method of manufacturing a display device according to some embodiments of the present disclosure.

24 to 39 are views for illustrating a method of manufacturing a display device according to some embodiments of the present disclosure.

40 to 42 are cross-sectional views for illustrating a method of manufacturing a display device according to some embodiments of the present disclosure.

FIG. 43 is an image showing a through hole of a display device according to a comparative example.

FIG. 44 is an image showing a through hole of a display device according to some embodiments of the present disclosure.

Detailed ways

The present disclosure will now be described more fully below with reference to the accompanying drawings, in which aspects of some embodiments of the utility model are shown. However, the utility model can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the utility model to those skilled in the art.

It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Throughout the specification, the same reference numerals refer to the same components.

It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

Each of the features of the various embodiments of the present disclosure can be combined in part or in whole or in combination with each other, and various interlocks and drives are technically possible. Each embodiment can be implemented independently of each other, or can be implemented together in association.

Hereinafter, aspects of some embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings.

Fig. 1 is a perspective view of a display device according to some embodiments of the present disclosure. Fig. 2 is a plan view showing a display panel according to some embodiments of the present disclosure.

1 and 2, the display device 10 according to some embodiments of the present disclosure is used to display a moving image or a still image. The display device 10 can be used as a display screen of a portable electronic device such as a mobile phone, a smart phone, a tablet PC, a smart watch, a watch phone, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation device, and an ultra mobile PC (UMPC), as well as a display screen of various products such as a television, a notebook, a monitor, a billboard, and an Internet of Things device.

According to some embodiments of the present disclosure, the display device 10 may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and a micro-LED display device using a micro- or nano-light-emitting diode (micro-LED or nano-LED). In the following description, the organic light-emitting display device is described as an example of the display device 10. However, it will be understood that the embodiments according to the present disclosure are not limited thereto.

The display device 10 according to some embodiments includes a display panel 100 , a driving integrated circuit (IC) 200 , and a circuit board 300 .

The display panel 100 may be formed as a rectangular plane having a long side in a first direction (X-axis direction) and a short side in a second direction (Y-axis direction) intersecting the first direction (X-axis direction). Each of the corners where the long side in the first direction (X-axis direction) and the short side in the second direction (Y-axis direction) meet may be formed as a right angle, or may be rounded (rounded) with a curvature. When viewed from the top, the shape of the display panel 100 is not limited to a quadrilateral shape, but may be formed in various polygonal shapes, circular shapes, or elliptical shapes.

The display panel 100 may be formed to be flat, but is not limited thereto. For example, the display panel 100 may be formed to include curved portions having a constant curvature or a varying curvature at the left and right ends. In addition, the display panel 100 may be flexible so that it can be bent, curved, folded, or rolled.

The display panel 100 may include a display area DA displaying an image and a non-display area NDA arranged around the display area DA (eg, in a peripheral area of the display area DA, or outside an occupied area of the display area DA).

The display area DA may occupy most of the area of the display panel 100. The display area DA may be positioned at the center of the display panel 100. In the display area DA, pixels each including a plurality of emission areas may be formed to display an image.

The non-display area NDA may be positioned adjacent to the display area DA (e.g., outside the occupied area of the display area DA, or in the periphery of the display area DA). The non-display area NDA may be positioned on the outside of the display area DA. The non-display area NDA may surround the display area DA. The non-display area NDA may be defined as a boundary of the display panel 100.

In the non-display area NDA, a display pad (also called a "pad" or "solder pad") PD may be arranged to be connected to the circuit board 300. The display pad PD may be positioned at one edge of the display panel 100. For example, the display pad PD may be positioned at the lower edge of the display panel 100.

The driving integrated circuit (IC) 200 may generate a data voltage, a power voltage, a scan timing signal, etc. The driving IC 200 may output a data voltage, a power voltage, a scan timing signal, etc.

The driver IC 200 may be positioned between the display pad PD and the display area DA in the non-display area NDA. Each of the driver ICs 200 may be attached to the non-display area NDA of the display panel 100 by a chip on glass (COG) technology. Alternatively, the driver ICs 200 may be attached to the circuit board 300 by a chip on plastic (COP) technology, respectively.

The circuit board 300 may be positioned on the display pad PD positioned at one edge of the display panel 100. The circuit board 300 may be attached to the display pad PD using a conductive adhesive member such as an anisotropic conductive film and an anisotropic conductive adhesive. Thus, the circuit board 300 may be electrically connected to a signal line of the display panel 100. The circuit board 300 may be a flexible printed circuit board, a flexible film such as a chip on film.

The bending area BA may be positioned between the driving IC 200 and the display area DA in the non-display area NDA. The bending area BA may be bent so that the driving IC 200 and the circuit board 300 are positioned under the substrate SUB (see FIG. 3 ).

A through hole TH may be formed at one side of the display area DA. The through hole TH may transmit light, and an optical device may be positioned in the through hole TH.

FIG3 is a cross-sectional view showing an example of a display device taken along line II' of FIG1. FIG4 is a cross-sectional view showing an example of a display pixel of FIG3 when a circuit board is bent. Referring to FIG3, a display device 10 according to some embodiments may include a display panel 100, a polarizing film PF, a cover window CW, and a panel bottom cover PB. The display panel 100 may include a substrate SUB, a display layer DISL, an encapsulation layer ENC, and a sensor electrode layer SENL.

The substrate SUB is a rigid substrate, and may be, for example, a glass substrate.

The display layer DISL may be positioned on the first surface of the substrate SUB. The display layer DISL may display an image. The display layer DISL may include a thin film transistor layer TFTL (see FIG. 5 ) in which a thin film transistor is formed and a light emitting element layer EML (see FIG. 5 ) in which a light emitting element emitting light is positioned in an emission region.

In the display area DA of the display layer DISL, scan lines, data lines, voltage lines, etc. may be arranged so that light is emitted in the emission area. In the non-display area NDA of the display layer DISL, a scan driving circuit that outputs a scan signal to the scan line, a fan-out line that connects the data line to the driver IC 200, etc. may be arranged.

The encapsulation layer ENC may encapsulate the light emitting element layer EML of the display layer DISL to prevent or reduce the penetration of oxygen or moisture into the light emitting element layer EML of the display layer DISL. The encapsulation layer ENC may be positioned on the display layer DISL. The encapsulation layer ENC may be positioned on the upper surface and the side surface of the display layer DISL. The encapsulation layer ENC may be arranged to cover the display layer DISL.

The sensor electrode layer SENL may be positioned on the encapsulation layer ENC. The sensor electrode layer SENL may include sensor electrodes. The sensor electrode layer SENL may sense a user's touch using the sensor electrodes.

The polarizing film PF may be positioned on the sensor electrode layer SENL. The polarizing film PF may be positioned on the display panel 100 to reduce reflection of external light. The polarizing film PF may include a first base member, a linear polarizer, a retardation film (such as a λ/4 (quarter wave) plate), and a second base member. The first base member, the retardation film, the linear polarizer, and the second base member of the polarizing film PF may be sequentially stacked on the display panel 100.

The cover window CW may be positioned on the polarizing film PF. The cover window CW may be attached to the polarizing film PF by a transparent adhesive member such as an optically clear adhesive (OCA) film.

The panel cover bottom PB may be positioned on the second surface of the substrate SUB of the display panel 100. The second surface of the substrate SUB may be opposite to the first surface. The panel cover bottom PB may be attached to the second surface of the substrate SUB of the display panel 100 by an adhesive member. The adhesive member may be a pressure sensitive adhesive (PSA).

The panel cover bottom PB may include at least one of a light blocking member for absorbing light incident from the outside, a buffer member for absorbing external impact, and a heat dissipation member for effectively discharging heat from the display panel 100 .

The light blocking member may be positioned below the display panel 100. The light blocking member blocks transmission of light to prevent or reduce viewing of elements positioned below the display panel 100, such as the circuit board 300, from above the display panel 100. The light blocking member may include a light absorbing material such as a black pigment and a black dye.

The buffer member may be positioned below the light blocking member. The buffer member absorbs external impact to prevent or reduce damage to the display panel 100. The buffer member may be composed of a single layer or multiple layers. For example, the buffer member may be formed of a polymer resin such as polyurethane, polycarbonate, polypropylene, and polyethylene, or may be formed of a material having elasticity such as rubber and a sponge obtained by foaming a urethane material or an acrylic material.

The heat dissipation member may be positioned below the buffer member. The heat dissipation member may include a first heat dissipation layer including graphite or carbon nanotubes and a second heat dissipation layer formed of a thin metal film (such as copper, nickel, ferrite, and silver) that can block electromagnetic waves and has high thermal conductivity.

The driving IC 200 and the circuit board 300 may be bent so that they are positioned below the display panel 100. The circuit board 300 may be attached to the lower surface (or bottom surface) of the panel cover bottom PB by an adhesive member 310. The adhesive member 310 may be a pressure sensitive adhesive.

According to some embodiments, a through hole TH may be formed in the display device 10. The through hole TH may allow light to pass therethrough, and may be a physical hole that penetrates the panel bottom cover PB and the polarizing film PF as well as the display panel 100. However, it should be understood that the embodiments according to the present disclosure are not limited thereto. The through hole TH may penetrate the panel bottom cover PB, but may not penetrate the display panel 100 or the polarizing film PF. The cover window CW may be arranged to cover the through hole TH.

The through holes TH may penetrate the substrate SUB, the display layer DISL, the encapsulation layer ENC, and the sensor electrode layer SENL of the display panel 100 .

The electronic device including the display device 10 according to some embodiments may further include an optical device OPD positioned in the through hole TH. The optical device OPD may be spaced apart from the display panel 100, the panel bottom cover PB, and the polarizing film PF. The optical device OPD may be an optical sensor (such as a proximity sensor, an illumination sensor, and a camera sensor) that senses light incident through the through hole TH.

FIG. 5 is a cross-sectional view illustrating an example of a display area of a display panel according to some embodiments of the present disclosure.

5 , the display panel 100 according to some embodiments of the present disclosure may be an organic light emitting display panel including light emitting elements LEL each including an organic emission layer 172 .

The display layer DISL may include a thin film transistor layer TFTL including a plurality of thin film transistors TFT and a light emitting element layer EML including a plurality of light emitting elements LEL.

The buffer film BF may be positioned on the substrate SUB. The buffer film BF may be formed of an inorganic material such as silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide. Alternatively, the buffer film BF may be composed of a plurality of layers in which two or more of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are stacked on each other.

An active layer including a channel region TCH, a source region TS, and a drain region TD of a thin film transistor TFT may be positioned on the buffer film BF. The active layer may be made of polycrystalline silicon, single crystal silicon, low temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor. When the active layer includes polycrystalline silicon or an oxide semiconductor material, the source region TS and the drain region TD in the active layer may be conductive regions doped with ions or impurities to have conductivity.

The gate insulator 130 may be positioned on the active layer of the thin film transistor TFT. The gate insulator 130 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

A first gate metal layer including a gate electrode TG of the thin film transistor TFT, a first capacitor electrode CAE1 of the capacitor Cst, and a scan line may be positioned on the gate insulator 130. The gate electrode TG of the thin film transistor TFT may overlap the channel region TCH in a third direction (Z-axis direction). The first gate metal layer may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The first interlayer dielectric film 141 may be positioned on the first gate metal layer. The first interlayer dielectric film 141 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The first interlayer dielectric film 141 may include a plurality of inorganic layers.

The second gate metal layer including the second capacitor electrode CAE2 of the capacitor Cst may be positioned on the first interlayer dielectric film 141. The second capacitor electrode CAE2 may overlap with the first capacitor electrode CAE1 in the third direction (Z-axis direction). Therefore, the capacitor Cst may be formed by the first capacitor electrode CAE1, the second capacitor electrode CAE2, and the first interlayer dielectric film 141 positioned therebetween and serving as a dielectric film. The second gate metal layer may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The second interlayer dielectric film 142 may be positioned on the second gate metal layer. The second interlayer dielectric film 142 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The second interlayer dielectric film 142 may include a plurality of inorganic layers.

The first data metal layer including the first connection electrode CE1 and the data line may be positioned on the second interlayer dielectric film 142. The first connection electrode CE1 may be connected to the drain region TD through a first contact hole CT1 penetrating the gate insulator 130, the first interlayer dielectric film 141, and the second interlayer dielectric film 142. The first data metal layer may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The first organic film 160 may be disposed on the first connection electrode CE1 to provide a flat surface over the thin film transistor TFT having an uneven height. The first organic film 160 may be formed as an organic layer including acrylic resin, epoxy resin, phenol resin, polyamide resin, and polyimide resin.

The second data metal layer including the second connection electrode CE2 may be positioned on the first organic film 160. The second data metal layer may be connected to the first connection electrode CE1 through a second contact hole CT2 penetrating the first organic film 160. The second data metal layer may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The second organic film 180 may be positioned on the second connection electrode CE2. The second organic film 180 may be formed to include an organic layer such as acrylic resin, epoxy resin, phenol resin, polyamide resin, and polyimide resin.

It should be noted that the second organic film 180 and the second data metal layer including the second connection electrode CE2 may be removed.

The light emitting element layer EML is positioned on the thin film transistor layer TFTL. The light emitting element layer EML may include a light emitting element LEL and a bank 190 .

Each of the light emitting elements LEL may include a pixel electrode 171, an emission layer 172, and a common electrode 173. In each of the emission areas EA, the pixel electrode 171, the emission layer 172, and the common electrode 173 are sequentially stacked on each other so that holes from the pixel electrode 171 and electrons from the common electrode 173 are recombined with each other in the emission layer 172 to emit light. In this case, the pixel electrode 171 may be an anode electrode, and the common electrode 173 may be a cathode electrode.

A pixel electrode layer including a pixel electrode 171 may be formed on the second organic film 180. The pixel electrode 171 may be connected to the second connection electrode CE2 through a third contact hole CT3 penetrating the second organic film 180. The pixel electrode layer may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

In a top emission structure in which light is emitted from the emission layer 172 toward the common electrode 173, the pixel electrode 171 may be composed of a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or may be composed of a stacked structure of aluminum and titanium (Ti/Al/Ti), a stacked structure of aluminum and ITO (ITO/Al/ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO/APC/ITO) to increase reflectivity. The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

The bank 190 may define the emission area EA of the pixel. To this end, the bank 190 may be formed on the second organic film 180 to expose a portion of the pixel electrode 171. The bank 190 may cover the edge of the pixel electrode 171. The bank 190 may be positioned within the third contact hole CT3. In other words, the third contact hole CT3 may be filled with the bank 190. The bank 190 may be formed of an organic layer including, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

The spacer 191 may be positioned on the bank 190. The spacer 191 may support a mask during a process of manufacturing the emission layer 172. The spacer 191 may be formed of an organic layer including, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

The emission layer 172 is formed on the pixel electrode 171. The emission layer 172 may include an organic material to emit light of a certain color. For example, the emission layer 172 may include a hole transport layer, an organic material layer, and an electron transport layer. The organic material layer may include a host and a dopant. The organic material layer may include a material that emits a predetermined light and may be formed using a phosphor or a fluorescent material.

The common electrode 173 is formed on the emission layer 172. The common electrode 173 may be formed to cover the emission layer 172. The common electrode 173 may be a common layer formed across the emission areas EA1, EA2, EA3, and EA4 (see FIG. 6). A capping layer may be formed on the common electrode 173.

In the top emission structure, the common electrode 173 may be formed of a transparent conductive material (TCP) that can transmit light, such as ITO and IZO, or a semi-transmissive conductive material, such as magnesium (Mg), silver (Ag), and an alloy of magnesium (Mg) and silver (Ag). When the common electrode 173 is formed of a semi-transmissive metal material, light extraction efficiency may be improved by using a microcavity.

The encapsulation layer ENC may be positioned on the light emitting element layer EML. The encapsulation layer ENC may include one or more inorganic encapsulation films TFE1 and TFE3 to prevent or reduce oxygen or moisture from penetrating into the light emitting element layer EML. In addition, the encapsulation layer ENC may include at least one organic encapsulation film TFE2 to protect the light emitting element layer EML from particles such as dust. For example, the encapsulation layer ENC may include a first inorganic encapsulation film TFE1, an organic encapsulation film TFE2, and a second inorganic encapsulation film TFE3.

The first inorganic encapsulation film TFE1 may be positioned on the common electrode 173, the organic encapsulation film TFE2 may be positioned on the first inorganic encapsulation film TFE1, and the second inorganic encapsulation film TFE3 may be positioned on the organic encapsulation film TFE2. The first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may be composed of a multilayer in which one or more inorganic layers of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked. The organic encapsulation film TFE2 may be an organic film including, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

The sensor electrode layer SENL may be positioned on the encapsulation layer ENC. The sensor electrode layer SENL may include sensor electrodes TE and RE.

The second buffer film BF2 may be positioned on the encapsulation layer ENC. The second buffer film BF2 may include at least one inorganic film. For example, the second buffer film BF2 may be composed of a multilayer in which one or more inorganic layers of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked. The second buffer film BF2 may be removed.

The first bridge BE1 may be positioned on the second buffer film BF2. The first bridge BE1 may be composed of a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or may be composed of a stacked structure of aluminum and titanium (Ti/Al/Ti), a stacked structure of aluminum and ITO (ITO/Al/ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO/APC/ITO).

The first sensor insulating film TINS1 may be positioned on the first bridge BE1. The first sensor insulating film TINS1 may be formed of an inorganic layer, for example, a silicon nitride layer, a silicon nitride oxide layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

The sensor electrodes (i.e., the drive electrode TE and the sensing electrode RE) may be positioned on the first sensor insulating film TINS1. In addition, a dummy pattern may be positioned on the first sensor insulating film TINS1. The drive electrode TE, the sensing electrode RE, and the dummy pattern do not overlap with the emission area EA. The drive electrode TE, the sensing electrode RE, and the dummy pattern may be composed of a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or may be composed of a stacked structure of aluminum and titanium (Ti/Al/Ti), a stacked structure of aluminum and ITO (ITO/Al/ITO), an APC alloy, and a stacked structure of an APC alloy and ITO (ITO/APC/ITO). The drive electrode TE may be electrically connected to the first bridge BE1 through a first sensor electrode contact hole TCNT1 penetrating the first sensor insulating film TINS1.

The second sensor insulating film TINS2 may be positioned on the driving electrode TE, the sensing electrode RE, and the dummy pattern. The second sensor insulating film TINS2 may include at least one of an inorganic film and an organic film. The inorganic film may be a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic film may include an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin.

Fig. 6 is a layout diagram illustrating an example of the area A of Fig. 2 in more detail. Fig. 6 is a layout diagram illustrating a display area DA and a non-display area NDA positioned on the right side of the display panel 100 according to some embodiments.

6, the display area DA may include a plurality of emission areas EA1, EA2, EA3, and EA4. The plurality of emission areas EA1, EA2, EA3, and EA4 may include a first emission area EA1 that emits light of a first color, a second emission area EA2 and a fourth emission area EA4 that emit light of a second color, and a third emission area EA3 that emits light of a third color. For example, the light of the first color may be light in a red wavelength range of approximately 600nm to 750nm, the light of the second color may be light in a green wavelength range of approximately 480nm to 560nm, and the light of the third color may be light in a blue wavelength range of approximately 370nm to 460nm. However, it should be understood that the present disclosure is not limited thereto.

Although the second emission area EA2 and the fourth emission area EA4 emit the same color of light (i.e., the second color of light) in the example shown in FIG. 6, the embodiments of the present disclosure are not limited thereto. The second emission area EA2 and the fourth emission area EA4 may emit light of different colors. For example, the second emission area EA2 may emit light of the second color, and the fourth emission area EA4 may emit light of the fourth color.

In addition, although each of the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may have a rectangular shape when viewed from the top in the example shown in FIG. 6, embodiments of the present disclosure are not limited thereto. When viewed from the top, each of the first emission area EA1, the second emission area EA2, the third emission area EA3, and the fourth emission area EA4 may have a polygonal shape other than a quadrilateral shape, a circular shape, or an elliptical shape.

6, the third emission area EA3 may be the largest, and the second emission area EA2 and the fourth emission area EA4 may be the smallest. The second emission area EA2 and the fourth emission area EA4 may have the same size.

The second emission areas EA2 and the fourth emission areas EA4 may be arranged alternately in the first direction (X-axis direction). The second emission areas EA2 may be arranged in the second direction (Y-axis direction). The fourth emission areas EA4 may be arranged in the second direction (Y-axis direction). Each of the fourth emission areas EA4 may have a long side in the first oblique direction DD1 and a short side in the second oblique direction DD2, and each of the second emission areas EA2 may have a long side in the second oblique direction DD2 and a short side in the first oblique direction DD1. The first oblique direction DD1 may refer to an oblique direction between the first direction (X-axis direction) and the second direction (Y-axis direction), and the second oblique direction DD2 may be perpendicular to the first oblique direction DD1.

The first emission area EA1 and the third emission area EA3 may be alternately arranged in the first direction (X-axis direction). The first emission area EA1 may be arranged in the second direction (Y-axis direction). The third emission area EA3 may be arranged in the second direction (Y-axis direction). When viewed from the top, each of the first emission area EA1 and the third emission area EA3 may have a square shape, but the embodiments of the present disclosure are not limited thereto. In this case, each of the first emission area EA1 and the third emission area EA3 may include two sides parallel to each other in the first oblique direction DD1 and two sides parallel to each other in the second oblique direction DD2.

The non-display area NDA may include a first non-display area NDA1 and a second non-display area NDA2. In the first non-display area NDA1, a structure for driving pixels of the display area DA may be positioned. The second non-display area NDA2 may be positioned on the outer side of the first non-display area NDA1. The second non-display area NDA2 may be an edge area of the non-display area NDA. In addition, the second non-display area NDA2 may be an edge area of the display panel 100.

The first non-display area NDA1 may include a scan driving circuit SDC, a first power voltage line VSL, a first dam DAM1, and a second dam DAM2.

The scan driving circuit SDC may include a plurality of stages STA. The plurality of stages STA may be connected to the scan lines extending in the first direction (X-axis direction) of the display area DA, respectively. That is, the plurality of stages STA may be connected to the scan lines extending in the first direction (X-axis direction) of the display area DA, respectively. The stages STA may sequentially apply scan signals to the scan lines.

The first power supply voltage line VSL may be positioned on the outer side of the scan driving circuit SDC. That is, the first power supply voltage line VSL may be positioned closer to the edge EG of the display panel 100 than the scan driving circuit SDC. The first power supply voltage line VSL may extend in the second direction (Y-axis direction) in the non-display area NDA on the right side of the display panel 100.

The first power voltage line VSL may be electrically connected to the common electrode 173 , and thus the common electrode 173 may receive the first power voltage from the first power voltage line VSL.

The first dam DAM1 and the second dam DAM2 are structures for preventing or reducing the situation where the organic encapsulation film TFE2 of the encapsulation layer ENC overflows to the edge EG of the display panel 100. The first dam DAM1 and the second dam DAM2 may extend in the second direction (Y-axis direction) in the non-display area NDA on the right side of the display panel 100. The second dam DAM2 may be positioned on the outer side of the first dam DAM1. The first dam DAM1 may be positioned closer to the scan driving circuit SDC than the second dam DAM2, and the second dam DAM2 may be positioned closer to the edge EG of the display panel 100 than the first dam DAM1.

Although the first dam DAM1 and the second dam DAM2 are positioned on the first power supply voltage line VSL in the example shown in FIG. 6 , the embodiments of the present disclosure are not limited thereto. For example, one of the first dam DAM1 and the second dam DAM2 may not be positioned on the first power supply voltage line VSL. Alternatively, none of the first dam DAM1 and the second dam DAM2 may be positioned on the first power supply voltage line VSL. In this case, the first dam DAM1 and the second dam DAM2 may be positioned on the outside of the first power supply voltage line VSL.

6 , the display panel 100 according to some embodiments includes two dams DAM1 and DAM2 , but embodiments of the present disclosure are not limited thereto. For example, the display panel 100 according to some embodiments may include three or more dams.

The second non-display area NDA2 may include a crack dam CRD and an edge area EGA.

The crack dam CRD may be a structure for preventing or reducing a situation where a crack occurs during a process of cutting the substrate SUB in a process of manufacturing the display device 10. The crack dam CRD may be an outermost structure positioned at an outermost position on the right side of the display panel 100. The crack dam CRD may extend in the second direction (Y-axis direction) in the non-display area NDA on the right side of the display panel 100.

The edge area EGA may extend along the edge EG of the display panel 100. The edge area EGA may be a region in which a processing mark occurs during a process of cutting the substrate SUB.

Fig. 7 is a layout diagram illustrating an example of the area B of Fig. 2 in more detail. Fig. 7 is a layout diagram illustrating a non-display area NDA positioned on the lower side of the display panel 100 according to some embodiments.

7 , the first non-display area NDA1 may include a plurality of display pads PD, a plurality of first driving pads DPD1 , a plurality of second driving pads DPD2 , a plurality of pad lines PDL, a plurality of fan-out lines FL, a first dam DAM1 , and a second dam DAM2 .

The plurality of display pads PD may be electrically connected to the circuit board 300 through a conductive adhesive member such as an anisotropic conductive film and an anisotropic conductive adhesive. The plurality of display pads PD may be respectively connected to pad lines PDL. The pad lines PDL may connect the display pads PD with the first driving pad DPD1.

The plurality of first driving pads DPD1 and the plurality of second driving pads DPD2 may be electrically connected to the driving IC 200 through a conductive adhesive member such as an anisotropic conductive film and an anisotropic conductive adhesive. The plurality of first driving pads DPD1 may be input pads for the driving IC 200 to receive signals (e.g., digital video data, data timing control signals, etc.) of the circuit board 300. The plurality of second driving pads DPD2 may be output pads for outputting signals (e.g., data voltages) of the driving IC 200. The plurality of second driving pads DPD2 may be connected to fan-out lines FL, respectively. The fan-out lines FL may connect the second driving pads DPD2 to the data lines of the display area DA.

The plurality of first driving pads DPD1 may be positioned closer to the display area DA in the second direction (Y-axis direction) than the display pad PD connected thereto. That is, among the display pad PD and the first driving pad DPD1 connected to each other, the display pad PD may be positioned closer to the edge EG of the display panel 100 in the second direction (Y-axis direction) than the first driving pad DPD1.

Each of the plurality of second drive pads DPD2 may be positioned closer to the display area DA in the second direction (Y-axis direction) than a corresponding first drive pad among the plurality of first drive pads DPD1. That is, the first drive pad DPD1 may be positioned closer to the edge EG of the display panel 100 in the second direction (Y-axis direction) than the plurality of second drive pads DPD2.

The first dam DAM1 and the second dam DAM2 may cross the fan-out line FL. The first dam DAM1 and the second dam DAM2 may extend in the first direction (X-axis direction) in the non-display area NDA on the lower side of the display panel 100. The second dam DAM2 may be positioned on the outer side of the first dam DAM1. The first dam DAM1 may be positioned closer to the display area DA than the second dam DAM2, and the second dam DAM2 may be positioned closer to the edge EG of the display panel 100 than the first dam DAM1.

Fig. 8 is a layout diagram illustrating an example of the area D of Fig. 2 in more detail. Fig. 8 is a layout diagram illustrating a display area DA and a non-display area NDA positioned on an upper side of the display panel 100 according to some embodiments.

8 , the first non-display area NDA1 may include a first power supply voltage line VSL, a first dam DAM1, and a second dam DAM2. The first non-display area NDA1 may not include a scan driving circuit SDC.

The first power voltage line VSL may extend in a first direction (X-axis direction) in the non-display area NDA on the upper side of the display panel 100. The first power voltage line VSL may be electrically connected to the common electrode 173, and thus the common electrode 173 may receive a first power voltage from the first power voltage line VSL.

The first dam DAM1 and the second dam DAM2 may extend in the first direction (X-axis direction) in the non-display area NDA on the upper side of the display panel 100. The second dam DAM2 may be positioned on the outer side of the first dam DAM1. The first dam DAM1 may be positioned closer to the display area DA than the second dam DAM2, and the second dam DAM2 may be positioned closer to the edge EG of the display panel 100 than the first dam DAM1.

Although the first dam DAM1 and the second dam DAM2 are positioned on the first power supply voltage line VSL in the example shown in FIG8 , the embodiments of the present disclosure are not limited thereto. For example, one of the first dam DAM1 and the second dam DAM2 may not be positioned on the first power supply voltage line VSL. Alternatively, none of the first dam DAM1 and the second dam DAM2 may be positioned on the first power supply voltage line VSL. In this case, the first dam DAM1 and the second dam DAM2 may be positioned on the outside of the first power supply voltage line VSL.

The second non-display area NDA2 may include a crack dam CRD and an edge area EGA.

The crack dam CRD may be an outermost structure positioned at an outermost position on the upper side of the display panel 100. The crack dam CRD may extend in a first direction (X-axis direction) in the non-display area NDA on the upper side of the display panel 100.

The edge area EGA may extend along the edge EG of the display panel 100. The edge area EGA may be a region in which a processing mark occurs during a process of cutting the substrate SUB.

Fig. 9 is a cross-sectional view showing an example of a display panel taken along line II-II' of Fig. 6. Fig. 10 is a cross-sectional view showing an example of a display panel taken along line III-III' of Fig. 7. Fig. 11 is a cross-sectional view showing an example of a display panel taken along line IV-IV' of Fig. 8.

In the cross-sectional views of FIGS. 9 to 11 , an edge EG of the display panel 100 is shown when the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant.

9 to 11 , when the substrate SUB is cut by irradiating laser and then spraying etchant, a process mark may be formed in the edge area EGA on the upper surface US of the substrate SUB by the etchant. The edge area EGA may be within approximately 30 μm.

The edge area EGA may include a first inclined surface IP1_1 formed by irradiating a laser and then spraying an etchant. An angle θ1 between the side surface SS1 and the upper surface US may be approximately 90 degrees. In other words, the side surface SS1 may be substantially perpendicular to the upper surface US. An angle θ2 between the side surface SS1 and the first inclined surface IP1_1 and an angle θ3 between the first inclined surface IP1_1 and the bottom surface BS may be an obtuse angle. A processing mark formed on the upper surface US of the substrate SUB may overlap with the first inclined surface IP1_1 in a third direction (Z-axis direction).

The crack dam CRD may be a structure for preventing or reducing a situation where a crack occurs during a process of cutting the substrate SUB in a process of manufacturing the display device 10. The crack dam CRD may be an outermost structure positioned at an outermost position on the right side of the display panel 100. A distance D1 between the crack dam CRD and the edge area EGA may be equal to or less than approximately 70 μm.

The minimum distance from the crack dam CRD to the edge EG of the display panel 100 may be equal to the sum of the width of the edge area EGA and the minimum distance D1 from the crack dam CRD to the edge area EGA. When the substrate SUB is cut by irradiating a laser and then spraying an etchant, the minimum distance between the crack dam CRD and the edge EG of the display panel 100 may vary according to the single-sided tolerance of the laser. For example, when the single-sided tolerance of the laser is 50 μm, the distance D1 between the crack dam CRD and the edge area EGA may be at least 50 μm or at most 150 μm.

The minimum distance from the display pad PD to the edge EG of the display panel 100 may be equal to the sum of the width of the edge area EGA and the minimum distance D2 from the display pad PD to the edge area EGA. When the substrate SUB is cut by irradiating a laser and then spraying an etchant, the minimum distance between the display pad PD and the edge of the substrate SUB may vary according to the single-sided tolerance of the laser. For example, when the single-sided tolerance of the laser is 50 μm, the distance D2 between the display pad PD and the edge area EGA may be at least 50 μm or at most 150 μm.

In addition, when the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant during the process of manufacturing the display panel 100, the side surface SS1 and the first inclined surface IP1_1 of the display panel 100 may be etched by the etchant. In this case, the roughness of the side surface SS1 and the first inclined surface IP1_1 of the display panel 100 may be approximately 50 μm or less. The roughness of the side surface SS1 and the first inclined surface IP1_1 of the display panel 100 when the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant may be less than the roughness of the side surface SS1 and the first inclined surface IP1_1 of the display panel 100 when the substrate SUB is cut with a cutting member and then a polishing process is performed.

When the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant, the minimum distance from the crack dam CRD to the edge EG of the display panel 100 can be reduced. Therefore, when the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant, the width of the second non-display area NDA2 can be greatly reduced. In other words, the width of the non-display area NDA can be reduced.

FIG. 12 is an enlarged cross-sectional view showing an example of the region E of FIG. 9 in more detail.

12 , the crack dam CRD may include the same material as the first organic film 160. The crack dam CRD may be positioned on the buffer film BF. The crack dam CRD may be formed of an organic layer including, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

Although the crack dam CRD includes one organic film layer in the example shown in FIG. 12 , the embodiments of the present disclosure are not limited thereto. For example, the crack dam CRD may further include another organic film layer including the same material as the second organic film 180. Alternatively, the crack dam CRD may further include another organic film layer including the same material as the bank 190. Alternatively, the crack dam CRD may further include another organic film layer including the same material as the spacer 191 (see FIG. 5 ).

The first power supply voltage line VSL may include the same material as the first data metal layer including the first connection electrode CE1 and the data line, and may be positioned at the same layer. The first power supply voltage line VSL may be positioned on the second interlayer dielectric film 142. The first power supply voltage line VSL may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The first dam DAM1 and the second dam DAM2 may be positioned on the first power supply voltage line VSL. The first dam DAM1 may include a first sub-dam SDAM1 and a second sub-dam SDAM2, and the second dam DAM2 may include a first sub-dam SDAM1, a second sub-dam SDAM2, and a third sub-dam SDAM3. The first sub-dam SDAM1 may include the same material as the first organic film 160 and may be positioned at the same layer. The second sub-dam SDAM2 may include the same material as the second organic film 180 and may be positioned at the same layer. The third sub-dam SDAM3 may include the same material as the bank 190 and may be positioned at the same layer.

The height of the first dam DAM1 may be lower than that of the second dam DAM2 , but the embodiment of the present disclosure is not limited thereto. The height of the first dam DAM1 may be substantially equal to or higher than that of the second dam DAM2 .

The common electrode 173 may be connected to a portion of the first power voltage line VSL that is exposed and not covered by the first organic film 160, the second organic film 180, and the first dam DAM1. Thus, the common electrode 173 may receive a first power voltage from the first power voltage line VSL.

The first inorganic encapsulation film TFE1 may cover the first dam DAM1, the second dam DAM2, and the crack dam CRD in the non-display area NDA on the right side of the display panel 100. The first inorganic encapsulation film TFE1 may extend to near the edge EG of the display panel 100 in the non-display area NDA on the right side of the display panel 100. A side surface of the first inorganic encapsulation film TFE1 may be aligned with a side surface of the substrate SUB.

The organic encapsulation film TFE2 may be arranged to cover the top surface of the first dam DAM1 but not the top surface of the second dam DAM2. However, it should be understood that the present disclosure is not limited thereto. The organic encapsulation film TFE2 may cover neither the top surface of the first dam DAM1 nor the top surface of the second dam DAM2. With the aid of the first dam DAM1 and the second dam DAM2, it may be possible to prevent or reduce the situation where the organic encapsulation film TFE2 overflows to the edge EG of the display panel 100.

The second inorganic encapsulation film TFE3 may cover the first dam DAM1, the second dam DAM2, and the crack dam CRD in the non-display area NDA on the right side of the display panel 100. The second inorganic encapsulation film TFE3 may extend to near the edge EG of the display panel 100 in the non-display area NDA on the right side of the display panel 100. A side surface of the second inorganic encapsulation film TFE3 may be aligned with a side surface of the substrate SUB.

An inorganic encapsulation region in which the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 contact each other may be formed from the second dam DAM2 to the edge EG of the display panel 100. The inorganic encapsulation region may surround the second dam DAM2.

Incidentally, a scanning thin film transistor STFT (including a scanning channel region STCH, a scanning source region STS, a scanning drain region STD, and a scanning gate electrode STG) of the scanning driving circuit SDC is shown in Fig. 12. Since the scanning thin film transistor STFT is substantially the same as the thin film transistor TFT described above with reference to Fig. 5; therefore, the scanning thin film transistor STFT will not be described.

FIG. 13 is an enlarged cross-sectional view showing an example of the region F of FIG. 10 in more detail.

13 , each of the display pad PD, the first driving pad DPD1 , and the second driving pad DPD2 may include a first auxiliary pad SPD1 , a second auxiliary pad SPD2 , and a third auxiliary pad SPD3 .

The first auxiliary pad SPD1 may include the same material as the first gate metal layer including the gate electrode TG, the first capacitor electrode CAE1 of the capacitor Cst, and the scan line, and may be positioned on the same layer. The first auxiliary pad SPD1 may be positioned on the gate insulator 130. The first auxiliary pad SPD1 may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The second auxiliary pad SPD2 may include the same material as the second gate metal layer including the second capacitor electrode CAE2, and may be positioned at the same layer. The second auxiliary pad SPD2 may be positioned on the first interlayer dielectric film 141. The second auxiliary pad SPD2 may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The third auxiliary pad SPD3 may include the same material as the first data metal layer including the first connection electrode CE1 and the data line, and may be positioned at the same layer. The third auxiliary pad SPD3 may be positioned on the second interlayer dielectric film 142. The third auxiliary pad SPD3 may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The third auxiliary pad SPD3 of the display pad PD may be electrically connected to the circuit board 300 through a conductive adhesive member such as an anisotropic conductive film and an anisotropic conductive adhesive. The third auxiliary pad SPD3 of the first driving pad DPD1 may be electrically connected to the input bump IBP of the driving IC 200 through a conductive adhesive member such as an anisotropic conductive film and an anisotropic conductive adhesive. The third auxiliary pad SPD3 of the second driving pad DPD2 may be electrically connected to the output bump OBP of the driving IC 200 through a conductive adhesive member such as an anisotropic conductive film and an anisotropic conductive adhesive. In FIG. 13 , for convenience of explanation, the driving IC 200 and the circuit board 300 are briefly shown.

The first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may be arranged to cover the first dam DAM1 and partially cover the second dam DAM2. For example, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may be arranged so that they do not cover a portion of the upper surface of the second dam DAM2. Optionally, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may cover the first dam DAM1 and the second dam DAM2, but in this case, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may not cover the third auxiliary pad SPD3 of the second driving pad DPD2. That is, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may not extend to the display pad PD, the first driving pad DPD1 and the second driving pad DPD2 located adjacent to the edge EG of the display panel 100.

FIG. 14 is an enlarged cross-sectional view showing an example of the region G of FIG. 11 in more detail.

14 , the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may be arranged so that they do not cover the crack dam CRD in the non-display area NDA on the upper side of the display panel 100. That is, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may not extend to the edge EG of the display panel 100 in the non-display area NDA on the upper side of the display panel 100.

In addition, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may be arranged such that they cover the crack dam CRD in the non-display area NDA on the left and right sides of the display panel 100, except for the non-display area NDA on the upper side of the display panel 100. That is, the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 may extend to the edge EG of the display panel 100 in the non-display area NDA on the left and right sides of the display panel 100, except for the non-display area NDA on the upper side of the display panel 100.

FIG15 is a layout diagram showing examples of through holes, inorganic encapsulation areas, wiring areas, and display areas of a display panel of region I of FIG2 according to some embodiments. FIG16 is a cross-sectional view showing an example of a display panel taken along line V-V' of FIG15. FIG17 is an enlarged cross-sectional view showing an example of region K of FIG16 in more detail. FIG18 to FIG22 are enlarged cross-sectional views showing various examples of region L of FIG16.

15 to 17 , the display panel 100 according to some embodiments of the present disclosure includes an inorganic encapsulation area IEA surrounding the through hole TH and a wiring area WLA surrounding the inorganic encapsulation area IEA.

In the inorganic encapsulation area IEA, the first and second inorganic encapsulation films TFE1 and TFE3 of the encapsulation layer ENC contact each other to prevent or reduce penetration of oxygen or moisture into the light emitting element layer EML of the display layer DISL through the through holes TH.

The inorganic encapsulation area IEA may include at least one dam, at least one tip, and at least one groove. For example, as shown in FIG. 17 , the inorganic encapsulation area IEA may include a first dam HDAM1, a second dam HDAM2, first to eighth tips T1 to T8, and first to third grooves GR1 to GR3, which will be described later.

The first tip T1 and the second tip T2 may be positioned closer to the wiring area WLA than the first dam HDAM1. The first tip T1 may be positioned closer to the wiring area WLA than the second tip T2. The second tip T2 may be positioned between the first tip T1 and the first dam HDAM1.

The third tip T3, the fourth tip T4, the fifth tip T5, and the sixth tip T6 may be positioned between the first dam HDAM1 and the second dam HDAM2. At least a portion of the third tip T3 may overlap the first dam HDAM1 in the third direction (Z-axis direction).

The seventh and eighth tips T7 and T8 may be located closer to the through hole TH than the second dam HDAM2. At least a portion of the seventh tip T7 may overlap the second dam HDAM2 in the third direction (Z-axis direction). The distance between the eighth tip T8 and the through hole TH may be approximately 50 μm.

The first groove GR1 may be positioned between the first tip T1 and the second tip T2. The second groove GR2 may be positioned between the third tip T3 and the fourth tip T4. The third groove GR3 may be positioned between the fifth tip T5 and the sixth tip T6.

In the wiring area WLA, wires extend around the through hole TH. Some of these wires may be connected to the data line, and some other of them may be connected to the second power supply voltage line from which a second power supply voltage higher than the first power supply voltage is applied. Still other of them may be connected to the scan line. The wiring area WLA may be surrounded by the display area DA.

The edge TEG of the through hole TH when the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant is shown in the cross-sectional view of FIG. 16 .

16, when the substrate SUB is cut by irradiating laser and then spraying etchant, a process mark may be formed in the through hole edge area TEGA on the upper surface US of the substrate SUB by the etchant. The through hole edge area TEGA may be within approximately 30 μm.

The through hole edge area TEGA may include a first surface IS1, a second surface IS2, and a third surface IS3 between the first surface IS1 and the second surface IS2, which are formed by spraying an etchant after irradiating the laser. The first surface IS1 and the second surface IS2 may be inclined surfaces. The first surface IS1 and the second surface IS2 may be spaced apart from each other, with the third surface IS3 therebetween. In other words, the substrate SUB may include a plurality of inclined surfaces spaced apart from each other.

The angle θ4 between the side surface SS1 and the upper surface US may be approximately 90 degrees. In other words, the side surface SS1 may be substantially perpendicular to the upper surface US. The angle θ5 between the bottom surface BS and the first surface IS1 and the angle θ6 between the third surface IS3 and the second surface IS2 may be an obtuse angle. The processing mark formed on the upper surface US of the substrate SUB may overlap with the second surface IS2 in the third direction (Z-axis direction). However, it should be understood that the present disclosure is not limited thereto. The processing mark formed on the upper surface US of the substrate SUB may overlap with the first surface IS1, the second surface IS2, and the third surface IS3.

When the substrate SUB of the display panel 100 is cut by irradiating laser and then spraying etchant, the angle θ5 between the bottom surface BS and the first surface IS1 and the angle θ6 between the third surface IS3 and the second surface IS2 may vary according to the depth of the laser irradiation area formed by the laser. The depth of the laser irradiation area formed by the laser for cutting along the edge EG of the display panel 100 may be different from the depth of the laser irradiation area formed by the laser for cutting along the edge TEG of the through hole TH. The first surface IS1, the second surface IS2, and the third surface IS3 will be described in more detail with reference to FIGS. 18 to 22 to be described later.

17, the first dummy pattern DP1 may include the same material as the second gate metal layer including the second capacitor electrode CAE2 of the capacitor Cst, and may be positioned at the same layer. For example, the first dummy pattern DP1 may be positioned on the first interlayer dielectric film 141. The first dummy pattern DP1 may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The second dummy pattern DP2 may include the same material as the first data metal layer including the first connection electrode CE1 and the data line, and may be positioned on the same layer. For example, the second dummy pattern DP2 may be positioned on the second interlayer dielectric film 142. The second dummy pattern DP2 may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

The second dummy pattern DP2 may overlap the first dummy pattern DP1 in the third direction (Z-axis direction).

The first to eighth tips T1 to T8 may include the same material as the second data metal layer including the second connection electrode CE2, and may be positioned at the same layer. For example, the first to eighth tips T1 to T8 may be positioned on the first organic film 160. The first to eighth tips T1 to T8 may be composed of a single layer or multiple layers of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

Each of the first tip T1 to the eighth tip T8 may be connected to the second dummy pattern DP2 through a contact hole penetrating the first organic film 160. Each of the first tip T1 to the eighth tip T8 may include an eaves structure having a lower surface (or bottom surface) and an upper surface that are not covered and exposed by the first organic film 160, the second organic film 180, the first dam HDAM1 and the second dam HDAM2. The fourth tip T4 and the fifth tip T5 may be formed integrally. Each of the first tip T1 to the eighth tip T8 may be a protrusion pattern or a groove pattern for forming a groove (or a groove). The eighth tip T8 may be the outermost structure adjacent to the edge TEG of the through hole TH. Although the eighth tip T8 is depicted as the outermost structure adjacent to the edge TEG of the through hole TH in FIG. 17, the embodiments of the present disclosure are not limited thereto. For example, if the seventh tip T7 and the eighth tip T8 are removed, the second dam HDAM2 may be the outermost structure adjacent to the edge TEG of the through hole TH, which may prevent or reduce the overflow of the organic encapsulation film TFE2 of the encapsulation layer ENC. Alternatively, if the seventh and eighth tip ends T7 and T8 are removed, the groove separating the emission layer 172 from the common electrode 173 may be an outermost structure adjacent to the edge TEG of the through hole TH.

A distance from the eighth tip T8 to the edge TEG of the through hole TH may be approximately 300 μm. A through hole edge area TEGA may be positioned between the eighth tip T8 and the edge TEG of the through hole TH.

The first groove GR1 may be formed between the first tip T1 and the second tip T2, the second groove GR2 may be formed between the third tip T3 and the fourth tip T4, and the third groove GR3 may be formed between the fifth tip T5 and the sixth tip T6. The first groove GR1 may have an eaves structure formed by the first tip T1 and the second tip T2, the second groove GR2 may have an eaves structure formed by the third tip T3 and the fourth tip T4, and the third groove GR3 may have an eaves structure formed by the fifth tip T5 and the sixth tip T6.

Since the emission layer 172 is deposited by evaporation and the common electrode 173 is deposited by sputtering, the step coverage is low, and thus it may be broken in each of the first groove GR1, the second groove GR2, and the third groove GR3. On the other hand, since the first inorganic encapsulation film TFE1 and the second inorganic encapsulation film TFE3 are deposited by chemical vapor deposition, atomic layer deposition, etc., they have high step coverage and thus will not be broken in each of the first groove GR1, the second groove GR2, and the third groove GR3. Here, the step coverage refers to the ratio of the film applied on the inclined portion to the film applied on the flat portion. In each of the first groove GR1, the second groove GR2, and the third groove GR3, there may be a residue 172_D disconnected from the emission layer 172 and a residue 173_D disconnected from the common electrode 173.

The first dam HDAM1 may include a first sub-dam HDA1, a second sub-dam HDA2, a third sub-dam HDA3, and a fourth sub-dam HDA4. The first sub-dam HDA1 may be positioned on the first organic film 160, and may include the same material as the second organic film 180. The first sub-dam HDA1 may be positioned on the second tip T2 and the third tip T3. The second sub-dam HDA2 may be positioned on the first sub-dam HDA1, and may include the same material as the embankment 190. The third sub-dam HDA3 and the fourth sub-dam HDA4 may be positioned on the second sub-dam HDA2, and may include the same material as the spacer 191. However, it should be understood that the present disclosure is not limited thereto. The fourth sub-dam HDA4 may be positioned closer to the through hole TH than the third sub-dam HDA3. The thickness of the fourth sub-dam HDA4 may be greater than the thickness of the third sub-dam HDA3.

The second dam HDAM2 may include a fifth sub-dam HDA5, a sixth sub-dam HDA6, and a seventh sub-dam HDA7. The fifth sub-dam HDA5 may be positioned on the first organic film 160, and may include the same material as the second organic film 180. The fifth sub-dam HDA5 may be positioned on the seventh tip T7. The sixth sub-dam HDA6 may be positioned on the fifth sub-dam HDA5, and may include the same material as the embankment 190. The seventh sub-dam HDA7 may be positioned on the sixth sub-dam HDA6, and may include the same material as the spacer 191. However, it should be understood that the present disclosure is not limited thereto.

With the help of the first dam HDAM1 and the second dam HDAM2 , it may be possible to prevent or reduce the overflow of the organic encapsulation film TFE2 into the through hole TH.

The residue 172_D, the residue 173_D, the first inorganic encapsulation film TFE1, and the second inorganic encapsulation film TFE3 may extend to the edge TEG of the through hole TH. Ends of the residue 172_D, the residue 173_D, the first inorganic encapsulation film TFE1, and the second inorganic encapsulation film TFE3 may be aligned with the edge TEG of the through hole TH.

As shown in Figure 17, the emission layer 172 and the common electrode 173 are disconnected in each of the first groove GR1, the second groove GR2 and the third groove GR3 formed by the first tip T1 to the eighth tip T8, and it may be possible to prevent or reduce the penetration of oxygen, moisture, etc. through the emission layer 172 and the common electrode 173 exposed through the through hole TH.

According to some embodiments as shown in FIG. 18, there may be a step edge between the side surface SS1 and the bottom surface BS in the through hole TH of the substrate SUB. For example, the substrate SUB may include a first surface IS1, a second surface IS2, and a third surface IS3 between the side surface SS1 and the bottom surface BS. The first surface IS1 may intersect with the bottom surface BS and may extend from the bottom surface BS at a predetermined angle. The second surface IS2 may intersect with the side surface SS1 and may extend from the side surface SS1 at a predetermined angle. The third surface IS3 may be positioned between the first surface IS1 and the second surface IS2, and one end may intersect with the first surface IS1 and the other end may intersect with the second surface IS2.

An angle θ5 between the bottom surface BS and the first surface IS1 and an angle θ6 between the second surface IS2 and the third surface IS3 may be an obtuse angle. An angle θ7 between the first surface IS1 and the third surface IS3 may be equal to the angle θ5 between the bottom surface BS and the first surface IS1. An angle θ7 between the first surface IS1 and the third surface IS3 may be an outer angle of the substrate SUB.

According to some embodiments of the present disclosure, the first surface IS1, the second surface IS2, and the third surface IS3 between the side surface SS1 and the bottom surface BS may be formed on the substrate SUB. There may be step edges (i.e., two steps) between the bottom surface BS and the third surface IS3 and between the third surface IS3 and the side surface SS1. These steps may be formed by a laser irradiation area, which is formed by laser irradiation twice or more, which will be described later. A more detailed description thereof will be given below.

The first surface IS1 and the second surface IS2 may be inclined surfaces. The length of the first surface IS1 in the inclined direction may be equal to the length of the second surface IS2 in the inclined direction. The lengths of the first surface IS1 and the second surface IS2 may be adjusted according to the interval or depth of the laser irradiation area, which will be described later. The third surface IS3 may extend parallel to the bottom surface BS or the upper surface US. The length of the third surface IS3 between the first surface IS1 and the second surface IS2 may be less than the length of each of the first surface IS1 and the second surface IS2. However, it should be understood that the present disclosure is not limited thereto.

In addition, the length TAL formed by the first surface IS1, the second surface IS2, and the third surface IS3 between the side surface SS1 and the bottom surface BS may be approximately 100 μm to 500 μm. For example, when viewed from the top, the length TAL between the end of the bottom surface BS and the side surface SS1 may be approximately 100 μm to 500 μm. However, it will be understood that the present disclosure is not limited to this. As the length TAL formed by the first surface IS1, the second surface IS2, and the third surface IS3 increases, the substrate SUB may be easily separated from the mother substrate at the through hole TH. If the substrate SUB is not easily separated from the mother substrate, it may be considered to separate the substrate SUB by physical impact. However, there may be a problem of fracture in which the substrate SUB is damaged at the edge of the through hole TH. According to some embodiments, by forming a substrate SUB including a first surface IS1, a second surface IS2, and a third surface IS3, it may be possible to easily separate the substrate SUB at the through hole TH.

According to some embodiments of the present disclosure, the substrate SUB has a step between the bottom surface BS and the third surface IS3 and a step between the third surface IS3 and the side surface SS1, thereby reducing the angle of the edge of the side surface of the substrate SUB. In this way, it may be possible to prevent or reduce the situation where the substrate SUB is easily damaged by an external impact due to a sharp edge on the side surface of the substrate SUB.

19 and 20 , in a substrate SUB according to some embodiments, a length of the first surface IS1 in an inclined direction may be different from a length of the second surface IS2 in the inclined direction, and an angle θ5 between the bottom surface BS and the first surface IS1 may be different from an angle θ6 between the second surface IS2 and the third surface IS3.

As shown in FIG. 19, the length of the second surface IS2 in the oblique direction may be greater than the length of the first surface IS1 in the oblique direction. The length of the second surface IS2 in the oblique direction may be formed by increasing the depth of a second laser irradiation region to be described later, the second laser irradiation region being formed by irradiating the second laser. In addition, the length of the second surface IS2 in the oblique direction may be formed by increasing the interval between a third laser irradiation region to be described later and the second laser irradiation region, the third laser irradiation region being formed by irradiating the third laser.

In addition, an angle θ5 between the bottom surface BS and the first surface IS1 may be greater than an angle θ6 between the second surface IS2 and the third surface IS3 Such a structural feature may be formed by adjusting the interval or depth of the laser irradiation region as described above.

In the example shown in FIG. 19 , the length of the second surface IS2 in the inclined direction is greater than the length of the first surface IS1 in the inclined direction, and the angle θ5 between the bottom surface BS and the first surface IS1 is greater than the angle θ6 between the second surface IS2 and the third surface IS3. However, it should be understood that the present disclosure is not limited thereto. The length of the second surface IS2 in the inclined direction may be greater than the length of the first surface IS1 in the inclined direction, and the angle θ5 between the bottom surface BS and the first surface IS1 may be equal to the angle θ6 between the second surface IS2 and the third surface IS3. In addition, the angle θ5 between the bottom surface BS and the first surface IS1 may be greater than the angle θ6 between the second surface IS2 and the third surface IS3, and the length of the second surface IS2 in the inclined direction may be equal to the length of the first surface IS1 in the inclined direction.

As shown in FIG. 20, the length of the first surface IS1 in the inclined direction may be greater than the length of the second surface IS2 in the inclined direction. The length of the first surface IS1 in the inclined direction may be formed by increasing the depth of a third laser irradiation region to be described later, the third laser irradiation region being formed by irradiating a third laser. In addition, the angle θ6 between the second surface IS2 and the third surface IS3 may be greater than the angle θ5 between the bottom surface BS and the first surface IS1. Such a structural feature may be formed by adjusting the depth of the laser irradiation region as described above.

In the example shown in FIG. 20, the length of the first surface IS1 in the inclined direction is greater than the length of the second surface IS2 in the inclined direction, and the angle θ6 between the second surface IS2 and the third surface IS3 is greater than the angle θ5 between the bottom surface BS and the first surface IS1. However, it should be understood that the present disclosure is not limited thereto. The length of the first surface IS1 in the inclined direction may be greater than the length of the second surface IS2 in the inclined direction, and the angle θ5 between the bottom surface BS and the first surface IS1 may be equal to the angle θ6 between the second surface IS2 and the third surface IS3. In addition, the angle θ6 between the second surface IS2 and the third surface IS3 may be greater than the angle θ5 between the bottom surface BS and the first surface IS1, and the length of the first surface IS1 in the inclined direction may be equal to the length of the second surface IS2 in the inclined direction.

Incidentally, the third surface IS3 of the substrate SUB may not be parallel to the bottom surface BS or the upper surface US.

21, according to some embodiments, the third surface IS3 may be an inclined surface. For example, the angle θ7 between the third surface IS3 and the first surface IS1 may be different from the angle θ5 between the bottom surface BS and the first surface IS1. The angle θ7 between the third surface IS3 and the first surface IS1 may be greater than the angle θ5 between the bottom surface BS and the first surface IS1. In addition, the angle θ7 between the third surface IS3 and the first surface IS1 may be greater than the angle θ6 between the third surface IS3 and the second surface IS2.

In addition, unlike the flat surfaces according to the above-described embodiments of FIGS. 18 to 21 , the first and second surfaces IS1 and IS2 of the substrate SUB may be curved surfaces.

22, according to some embodiments, the first surface IS1 and the second surface IS2 of the substrate SUB may be curved surfaces. For example, the first surface IS1 may be a convex surface between the bottom surface BS and the third surface IS3. The second surface IS2 may be a convex surface between the side surface SS1 and the third surface IS3. However, it should be understood that the present disclosure is not limited thereto. One of the first surface IS1 and the second surface IS2 may be a curved surface, and the other may be a flat surface.

Although the first surface IS1 and the second surface IS2 are convex surfaces in FIG. 22, the present disclosure is not limited thereto. At least one of the first surface IS1 and the second surface IS2 may be a concave surface. In addition, although the third surface IS3 is a flat surface, the present disclosure is not limited thereto. The third surface IS3 may not be parallel to the bottom surface BS and may be a convex surface.

Hereinafter, a method of manufacturing the above-mentioned display device will be described with reference to other drawings.

FIG23 is a flow chart for illustrating a method for manufacturing a display device according to some embodiments of the present disclosure. FIG24 to FIG39 are views for illustrating a method for manufacturing a display device according to some embodiments of the present disclosure. In the description of the method for manufacturing a display device, FIG27 is a cross-sectional view taken along line VII-VII' of FIG26, and in addition, the remaining cross-sectional views are cross-sectional views taken along line VI-VI' of the corresponding plan view.

First, as shown in FIGS. 24 and 25 , a plurality of display cells DPC are formed on a first surface of a mother substrate MSUB ( S110 of FIG. 23 ).

A display layer DISL of each of the plurality of display cells DPC is formed on the first surface of the mother substrate MSUB. The display layer DISL includes a thin film transistor layer TFTL, a light emitting element layer EML, an encapsulation layer ENC, and a sensor electrode layer SENL.

Next, as shown in FIG. 26 and FIG. 27 , a plurality of first protection films PRF1 are attached to a plurality of display cells DPC, and the plurality of display cells DPC are inspected ( S120 of FIG. 23 ).

First, a first protective film layer is attached to cover the plurality of display units DPC and the mother substrate MSUB between the plurality of display units DPC. Then, by partially removing the first protective film layer positioned on the mother substrate MSUB, the plurality of first protective films PRF1 can be positioned on the plurality of display units DPC, respectively. That is, the first protective film layer can be partially removed, and the remaining portion can be the plurality of first protective films PRF1. Therefore, the plurality of first protective films PRF1 can be positioned on the plurality of display units DPC, respectively. In other words, the number of the first protective films PRF1 can be equal to the number of the plurality of display units DPC.

Each of the plurality of first protection films PRF1 may be a buffer film for protecting the display unit DPC from external impact. The plurality of first protection films PRF1 may be made of a transparent material.

Third, as shown in FIGS. 26 and 27 , the first laser LR1 is irradiated onto the second surface of the mother substrate MSUB so that a plurality of first laser irradiation regions CH1 are formed along the edges of the plurality of display cells DPC ( S130 of FIG. 23 ).

According to some embodiments of the present disclosure, any of various lasers may be used as the first laser LR1. Here, as an example, the first laser LR1 is an infrared Bessel beam having a wavelength of approximately 1030 nm.

The first cutting line CL1 may be defined as an imaginary line formed by connecting a plurality of first laser irradiation regions CH1. The first cutting line CL1 may be formed by irradiating the first laser LR1 emitted by the first laser module LD1 to form a plurality of first laser irradiation regions CH1 along edges of the plurality of display cells DPC.

When the first laser LR1 is irradiated on the second surface of the mother substrate MSUB, the depth (or approximate length) TCH1 of each of the plurality of first laser irradiation areas CH1 formed by the first laser LR1 as shown in FIG. 28 may be adjusted by adjusting the repetition rate, the processing speed, and the pulse energy. For example, as shown in a of FIG. 28 , the depth TCH1 of each of the plurality of first laser irradiation areas CH1 may be at least 200 μm from the first surface of the mother substrate MSUB. In addition, since the thickness of the mother substrate MSUB is approximately 500 μm, the depth TCH1 of each of the plurality of first laser irradiation areas CH1 may be as high as 500 μm as shown in b of FIG. 28 . That is, the depth TCH1 of each of the plurality of first laser irradiation areas CH1 may be approximately 225 μm to 500 μm from the first surface of the mother substrate MSUB. According to some embodiments, the depth TCH1 of the first laser irradiation area CH1 is equal to the thickness of the mother substrate MSUB.

The first laser LR1 for forming the first laser irradiation area CH1 may be irradiated at a repetition rate of 10 kHz to 250 kHz, a process speed of 10 mm/s to 250 mm/s, and a pulse energy of 10 μJ to 300 μJ. In order for the first laser LR1 to have a depth of approximately 225 μm from the first surface of the mother substrate MSUB, it is desirable that the first laser LR1 be irradiated at a repetition rate of approximately 17.5 kHz to 125 kHz, a process speed of 17.5 mm/s to 125 mm/s, and a pulse energy of 25 μJ to 178 μJ.

Fourth, as shown in Figures 29 to 32, by irradiating the second laser LR2 and the third laser LR3 on the second surface of the mother substrate MSUB, a plurality of second laser irradiation areas CH2 and third laser irradiation areas CH3 for forming a through hole in each of the plurality of display units DPC are formed (S140 of Figure 23).

Although step S140 is performed after step S130 in the example shown in FIG29 , the embodiments of the present disclosure are not limited thereto. To shorten the process time, steps S130 and S140 may be performed simultaneously using a plurality of laser modules (eg, the second laser module LD2 and the third laser module LD3 ).

The second cutting line CL2 may be defined as an imaginary line formed by connecting a plurality of second laser irradiation regions CH2. The second cutting line CL2 may be formed by irradiating the second laser LR2 to form a plurality of second laser irradiation regions CH2 along the edge of the through hole TH. The second cutting line CL2 may depend on the shape of the through hole. For example, when the through hole TH has a circular shape when viewed from the top, the second cutting line CL2 may be formed in a circular shape.

The third cutting line CL3 may be defined as an imaginary line formed by connecting a plurality of third laser irradiation regions CH3. The third cutting line CL3 may be formed by irradiating the third laser LR3 to form a plurality of third laser irradiation regions CH3 along the edge of the second cutting line CL2. The third cutting line CL3 may depend on the shape of the through hole. For example, when the through hole TH has a circular shape when viewed from the top, the third cutting line CL3 may be formed in a circular shape.

According to some embodiments of the present disclosure, any of various lasers may be used as the second laser LR2 and the third laser LR3. Here, as an example, each of the second laser LR2 and the third laser LR3 is an infrared Bessel beam having a wavelength of approximately 1030 nm.

The depth of each of the second laser irradiation regions CH2 formed by the second laser LR2 may be different from the depth (approximate length) of each of the third laser irradiation regions CH3 formed by the third laser LR3. The depth of the second laser irradiation region CH2 may be defined as the depth (or approximate length) of the second laser irradiation region CH2, and the depth of the third laser irradiation region CH3 may be defined as the depth (or approximate length) of the third laser irradiation region CH3.

Each of the plurality of second laser irradiation regions CH2 may have a depth of approximately 500 μm from the first surface of the mother substrate MSUB. Since the thickness of the mother substrate MSUB is approximately 500 μm, each of the plurality of second laser irradiation regions CH2 may have a depth of approximately 500 μm from the first surface of the mother substrate MSUB. That is, the depth of each of the plurality of second laser irradiation regions CH2 may be equal to the thickness of the mother substrate MSUB.

Each of the plurality of third laser irradiation regions CH3 may have a depth of approximately 225 μm from the first surface of the mother substrate MSUB. Since the thickness of the mother substrate MSUB is approximately 500 μm, each of the plurality of third laser irradiation regions CH3 may have a depth of approximately 200 μm to 500 μm from the first surface of the mother substrate MSUB. According to some embodiments of the present disclosure, the depth of the second laser irradiation region CH2 from the first surface of the mother substrate MSUB may be greater than the depth of the third laser irradiation region CH3 from the first surface of the mother substrate MSUB.

As shown in FIG32, the depth (or approximate length) of the laser irradiation areas CH2 and CH3 can be adjusted according to the repetition rate, processing speed, and pulse energy of the second laser LR2 and the third laser LR3. If the depth (or approximate length) of the second laser irradiation area CH2 formed by the second laser LR2 is different from the depth (or approximate length) of the third laser irradiation area CH3 formed by the third laser LR3, the second laser LR2 and the third laser LR3 have different repetition rates, processing speeds, pulse energies, etc.

For example, the second laser LR2 may be irradiated at a repetition rate of 1 kHz to 50 kHz, a processing speed of 1 mm/s to 50 mm/s, and a pulse energy of 10 μJ to 300 μJ. In order for the second laser LR2 to have a depth of approximately 400 μm to 500 μm from the first surface of the mother substrate MSUB, the second laser LR2 may be irradiated at a repetition rate of approximately 10 kHz, a processing speed of 10 mm/s, and a pulse energy of 60 μJ to 178 μJ.

For example, the third laser LR3 may be irradiated at a repetition rate of 10 kHz to 250 kHz, a processing speed of 10 mm/s to 250 mm/s, and a pulse energy of 10 μJ to 300 μJ. In order for the third laser LR3 to have a depth of approximately 225 μm or more from the first surface of the mother substrate MSUB, it is desirable that the third laser LR3 be irradiated at a repetition rate of approximately 17.5 kHz to 125 kHz, a processing speed of 17.5 mm/s to 125 mm/s, and a pulse energy of 25 μJ to 178 μJ.

The single-side tolerance of each of the second laser LR2 and the third laser LR3 may be within approximately 50 μm, and the double-side tolerance may be within approximately 100 μm. Here, the single-side tolerance may refer to a cutting error in one direction (eg, X-axis direction) when forming a laser irradiation area with laser.

In addition, the interval SDL between the second laser irradiation area CH2 formed by the second laser LR2 and the third laser irradiation area CH3 formed by the third laser LR3 may be approximately 50 μm. The interval SDL between the second laser irradiation area CH2 and the third laser irradiation area CH3 may determine the length of the first surface IS1 and the second surface IS2 of the substrate SUB. For example, as the interval SDL between the second laser irradiation area CH2 and the third laser irradiation area CH3 increases, the length of the second surface IS2 in the oblique direction may become greater than the length of the first surface IS1 in the oblique direction.

Fifth, as shown in FIG. 33 , the second protection film PRF2 is attached on the plurality of first protection films PRF1 ( S150 of FIG. 23 ).

The second protective film PRF2 may be attached to the first protective film PRF1 and the exposed portion of the mother substrate MSUB not covered by the plurality of first protective films PRF1. The second protective film PRF2 may cover the plurality of first laser irradiation regions CH1, the plurality of second laser irradiation regions CH2, and the plurality of third laser irradiation regions CH3. The second protective film PRF2 may be an acid-resistant film for protecting the plurality of display cells DPC from the influence of an etchant in a subsequent process of etching the mother substrate MSUB.

Sixth, as shown in Figures 34 to 37, an etchant is sprayed on the second surface of the mother substrate MSUB without an additional mask, so that the thickness of the mother substrate MSUB is reduced. In addition, the mother substrate MSUB is cut along the plurality of first laser irradiation regions CH1 and the second laser irradiation regions CH2, and the second protective film PRF2 is separated (S160 of Figure 23).

When the etchant is sprayed on the second surface of the mother substrate MSUB, the mother substrate MSUB can be reduced from the first thickness T1' (see FIG. 24) to the second thickness T2'. Since the mother substrate MSUB is etched without an additional mask, the mother substrate MSUB can be uniformly etched throughout the entire area of the second surface.

Each of the first laser irradiation regions CH1 may include a physical hole formed by the first laser LR1 and a region where the physical property is changed by the laser as the periphery of the physical hole. Alternatively, each of the plurality of first laser irradiation regions CH1 may be a region where the physical property is changed by the first laser LR1 without the physical hole. Therefore, the etching rate of the etchant in each of the plurality of first laser irradiation regions CH1 may be higher than the etching rate in other regions of the mother substrate MSUB where the laser is not irradiated.

Each of the second laser irradiation regions CH2 may include a physical hole formed by the second laser LR2 and an area where the physical property is changed by the laser as the periphery of the physical hole. Alternatively, each of the plurality of second laser irradiation regions CH2 may be an area where the physical property is changed by the second laser LR2 without the physical hole. Therefore, the etching rate of the etchant in each of the plurality of second laser irradiation regions CH2 may be higher than the etching rate in other areas of the mother substrate MSUB that are not irradiated with the laser.

Each of the third laser irradiation regions CH3 may include a physical hole formed by the third laser LR3 and an area where the physical property is changed by the laser as the periphery of the physical hole. Alternatively, each of the plurality of third laser irradiation regions CH3 may be an area where the physical property is changed by the third laser LR3 without the physical hole. Therefore, the etching rate of the etchant in each of the plurality of third laser irradiation regions CH3 may be higher than the etching rate in other areas of the mother substrate MSUB not irradiated with the laser. The third laser irradiation region CH3 may surround the second laser irradiation region CH2.

As shown in FIG. 35 , thinning is performed with an etchant to reduce the thickness of the mother substrate MSUB. At the same time, the etchant penetrates into the plurality of second laser irradiation regions CH2 formed by the second laser LR2. Since the depth of each of the plurality of second laser irradiation regions CH2 is greater than the depth of each of the plurality of third laser irradiation regions CH3, the etchant may first penetrate into the plurality of second laser irradiation regions CH2. When the etchant penetrates into the second laser irradiation region CH2, there may be a difference in etching rate between the second laser irradiation region CH2 and the region where the second laser irradiation region CH2 is not formed. As a result, thinning may be performed at an inclination near the second laser irradiation region CH2.

As shown in FIG. 36, when the etchant penetrates into the third laser irradiation region CH3, there may be a difference in etching rate between the third laser irradiation region CH3 and the region where the third laser irradiation region CH3 is not formed. Specifically, there may be a difference in etching rate between the third laser irradiation region CH3 and the second laser irradiation region CH2. Therefore, thinning is performed at an inclination in the vicinity of the second laser irradiation region CH2 and the third laser irradiation region CH3. When the inclination can be reduced at some regions between the third laser irradiation region CH3 and the second laser irradiation region CH2, thinning can be performed.

As shown in FIG37, since etching is first performed in the second laser irradiation region CH2, the substrate SUB may be cut at the second cutting line CL2 formed by the second laser irradiation region CH2, so that the substrate SUB may be separated from the mother substrate MSUB. Therefore, the substrate SUB may form a through hole TH, and a step may exist between the side surface SS1 and the bottom surface BS in the through hole TH, so that the first surface IS1, the second surface IS2, and the third surface IS3 between the first surface IS1 and the second surface IS2 may be formed.

In addition, as the etchant penetrates into the plurality of first laser irradiation regions CH1 formed by the first laser LR1 , the mother substrate MSUB may be separated along the first cutting line CL1 . In other words, each of the plurality of display cells DPC may be separated from the mother substrate MSUB.

The etchant does not penetrate into the first surface of the substrate SUB separated from the mother substrate MSUB due to the second protection film PRF2, while the second surface of the substrate SUB is etched by the etchant. Therefore, the first surface and the second surface of the substrate SUB may have differences in roughness, hardness, light transmittance, light reflectivity, local density, surface chemical structure, etc.

After the etching process is completed, the second protection film PRF2 may be separated.

Seventh, as shown in FIGS. 38 and 39 , the driving IC 200 and the circuit board 300 are attached to each of the plurality of display cells DPC, and the first protection film PRF1 is separated from each of the plurality of display cells DPC ( S170 of FIG. 23 ).

As described above, by using an etching process, the thickness of the mother substrate MSUB can be reduced, the substrate SUB of each of the plurality of display cells DPC can be separated from the mother substrate MSUB, and the through hole TH can be formed. In this way, it may be possible to improve the efficiency of the manufacturing process.

40 to 42 are cross-sectional views for illustrating a method of manufacturing a display device according to some embodiments of the present disclosure.

40 to 42 , according to some embodiments, after the second laser LR2 and the third laser LR3 are irradiated, a fourth laser irradiation region CH4 may be further formed by irradiating a fourth laser LR4 .

The fourth laser LR4 may be irradiated between the third laser irradiation regions CH3 adjacent to the second laser irradiation region CH2. When the through hole TH has a circular shape when viewed from the top, the fourth laser irradiation region CH4 formed by the fourth laser LR4 may have a circular shape when viewed from the top. The fourth laser LR4 may be an infrared Bessel beam having a wavelength of approximately 1030 nm similar to the third laser LR3, and may be irradiated under the same conditions as the third laser LR3.

The depth of the fourth laser irradiation region CH4 formed by the fourth laser LR4 may be smaller than the depth of the third laser irradiation region CH3 because if the depth of the fourth laser irradiation region CH4 is relatively large, the substrate SUB may be cut at the fourth laser irradiation region CH4.

As shown in FIG41, when the etchant penetrates into the fourth laser irradiation region CH4, there may be a difference in etching rate between the fourth laser irradiation region CH4 and the region where the fourth laser irradiation region CH4 is not formed. Specifically, there may be a difference in etching rate between the fourth laser irradiation region CH4 and the second laser irradiation region CH2. Therefore, thinning is performed with an inclination in the vicinity of the fourth laser irradiation region CH4. When there is substantially no inclination between the fourth laser irradiation region CH4 and the second laser irradiation region CH2, thinning can be performed.

As shown in FIG. 42, since etching is first performed in the second laser irradiation region CH2, the substrate SUB can be cut at the second cutting line CL2 formed by the second laser irradiation region CH2, so that the substrate SUB can be separated from the mother substrate MSUB. The side surface of the mother substrate MSUB formed with the through hole TH forms a step edge similar to that of the substrate SUB. The step edge of the side surface of the mother substrate MSUB can reduce the angle of the edge of the mother substrate MSUB and can increase the width of the step edge. Therefore, when the mother substrate MSUB is separated from the substrate SUB, the through hole TH has a larger width, so that it can be separated more easily.

Fig. 43 is an image showing a through hole of a display device according to a comparative example. Fig. 44 is an image showing a through hole of a display device according to some embodiments of the present disclosure.

Figure 43 shows a via formed via a laser ablation process. Figure 44 shows a via formed by laser irradiation and etchant as described above.

It can be seen from Fig. 43 that the display device according to the comparative example is damaged due to high heat in the vicinity of the through hole TH. In contrast, as shown in Fig. 44, in the display device according to some embodiments, damage hardly occurs in the vicinity of the through hole TH.

In view of the above, it may be possible to prevent or reduce the display device according to some embodiments from being damaged near the through hole by forming the through hole using laser irradiation and an etchant.

In summarizing the detailed description, it will be appreciated by those skilled in the art that many changes and modifications may be made to the exemplary embodiments without departing substantially from the principles of the present invention. Therefore, the exemplary embodiments of the disclosed utility model are used only in a general and descriptive sense, and not for the purpose of limitation.

Claims (10)

1. A display device, characterized in that the display device comprises: A substrate, comprising an upper surface carrying a light emitting element, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface, The substrate includes: a side surface intersecting with the upper surface in the through hole; a first surface intersecting with the bottom surface; a second surface intersecting with the side surface; and a third surface between the first surface and the second surface, and The first surface and the second surface are spaced apart from each other, the third surface is between the first surface and the second surface, and the first surface and the second surface are inclined surfaces. 2. The display device according to claim 1, characterized in that One end of the third surface intersects with the first surface; and Opposite ends of the third surface intersect the second surface. 3 . The display device according to claim 1 , wherein an angle between the bottom surface and the first surface and an angle between the third surface and the second surface are obtuse angles. 4 . The display device according to claim 1 , wherein an angle between the bottom surface and the first surface is equal to, greater than, or less than an angle between the third surface and the second surface. 5 . The display device according to claim 1 , wherein a length of the first surface in an inclined direction is equal to, greater than, or less than a length of the second surface in the inclined direction. 6. The display device according to claim 1, wherein the third surface extends parallel to the bottom surface or the upper surface; or The third surface is an inclined surface. 7 . The display device according to claim 1 , wherein at least one of the first surface and the second surface is a flat surface or a curved surface. 8 . The display device according to claim 1 , wherein a length between the bottom surface and the side surface on a plane formed by the first surface, the second surface, and the third surface is 100 μm to 500 μm. 9. A display device, characterized in that the display device comprises: A substrate, comprising an upper surface carrying a light emitting element, a bottom surface facing the upper surface, and a through hole penetrating the upper surface and the bottom surface, The substrate includes: a side surface intersecting with the upper surface in the through hole; a first surface intersecting with the bottom surface; a second surface intersecting with the side surface; and a third surface between the first surface and the second surface. wherein the angle between the bottom surface and the first surface and the angle between the third surface and the second surface are obtuse angles, and Wherein, the bottom surface and the third surface form a step edge. 10 . The display device according to claim 9 , further comprising: an optical device at least partially embedded in the through hole.