CN220984523U - Semiconductor packaging structure - Google Patents

Semiconductor packaging structure Download PDF

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Publication number
CN220984523U
CN220984523U CN202322234891.4U CN202322234891U CN220984523U CN 220984523 U CN220984523 U CN 220984523U CN 202322234891 U CN202322234891 U CN 202322234891U CN 220984523 U CN220984523 U CN 220984523U
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connection
pin
semiconductor package
chip
package according
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CN202322234891.4U
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Chinese (zh)
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黄轶愚
刘锐
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Hunan Sanan Semiconductor Co Ltd
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Hunan Sanan Semiconductor Co Ltd
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Priority to CN202322234891.4U priority Critical patent/CN220984523U/en
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Abstract

The application provides a semiconductor packaging structure, which comprises a plastic package body, a chip, a substrate, a first pin and a second pin, wherein the chip is arranged on the first surface of the substrate, a first bonding pad is arranged on the back surface of the chip, and a second bonding pad is arranged on the front surface of the chip; the chip is electrically connected with the substrate through the first bonding pad, and one end of the second pin is connected with the second bonding pad through the metal clip; the metal clip comprises a first connecting plate connected with the second bonding pad, the first connecting plate is connected with the second bonding pad through solder, and a plurality of first through holes are formed in the first connecting plate. Specifically, through set up a plurality of first through-holes on first connecting plate, the gas's after the solder melts the loss passageway when having provided chip and first connecting plate welding, reduced the probability of the cavity of solder layer between chip and the first connecting plate, and then improve the connection reliability of chip and second pin.

Description

Semiconductor packaging structure
Technical Field
The present disclosure relates to semiconductor packaging technology, and more particularly, to a semiconductor packaging structure.
Background
Semiconductor packages are commonly used to house and protect semiconductor chips including silicon, silicon carbide (SiC), gallium nitride (GaN), and the like. These semiconductor chips may be configured with a variety of different device types, such as microprocessors, discrete devices, amplifiers, controllers, sensors, and the like.
In the related art, the semiconductor chip is usually interconnected with the external pins through solder, but the reliability of the existing interconnection mode of the semiconductor chip and the external pins is poor, which results in poor reliability of the device after long-term use.
Disclosure of utility model
The application provides a semiconductor packaging structure which can solve the problem of poor reliability of the interconnection mode of the traditional semiconductor chip and an external pin.
In order to solve the technical problems, the application adopts a technical scheme that: provided is a semiconductor package structure including: a plastic package body; the chip comprises a front surface and a back surface, wherein the back surface of the chip is provided with a first bonding pad, and the front surface of the chip is provided with a second bonding pad; the chip is arranged on the first surface and is electrically connected with the substrate through the first bonding pad, the first surfaces of the chip and the substrate are encapsulated in the plastic package, and at least part of the second surface of the substrate is exposed out of the plastic package; one end of the first pin is connected with the substrate, and the other end of the first pin extends out from the first side of the plastic package body and extends towards the direction of the first surface; one end of the second pin is connected with the second bonding pad through a metal clamp, the other end of the second pin extends out of the second side of the plastic package body and extends towards the direction of the first surface, and the first side and the second side are two opposite sides on the plastic package body; the metal clip comprises a first connecting plate connected with the second bonding pad, wherein the first connecting plate is connected with the second bonding pad through solder, and a plurality of first through holes are formed in the first connecting plate.
In an embodiment, the first through hole is located at a middle portion of the first connection plate.
In an embodiment, the total area of the first through holes is less than 30% of the area of the surface of the first connection plate.
In an embodiment, a surface of the first connection plate facing the second bonding pad is provided with a plurality of protruding portions.
In an embodiment, the number of the protruding portions is 4, and the 4 protruding portions are respectively located at four corners of the first connecting plate.
In an embodiment, a surface of the first connection plate facing the second bonding pad is provided with a plurality of protruding portions, and the protruding portions are disposed around the first through hole.
In an embodiment, the number of the first through holes is one.
In an embodiment, the first connecting plate is connected with a rocker in a direction close to the first side, the rocker is configured to be away from the first surface and connected with the first connecting plate through a first connecting section, a connection part of the first connecting section and the first connecting plate is provided with a first included angle facing to the second side, the first included angle is an obtuse angle, and the first connecting plate, the first connecting section and the rocker are integrally formed.
In an embodiment, the metal clip further includes a second connection plate, in a direction from the second surface to the first surface, the second connection plate is configured to be away from the first surface, the second pin is configured to be away from the first surface, in the first side to the second side direction, the second pin is configured to be away from the substrate, in a direction from the first connection plate to the first side, one end of the second connection plate is connected to the first connection plate through a second connection section, and the other end of the second connection plate is connected to the second pin through a third connection section.
In an embodiment, in a direction from the second surface to the first surface, an end of the second pin connected to the third connection section is closer to the first surface than the second connection board, wherein a connection between the second connection section and the first connection board has a second included angle towards the first side, the second included angle is an obtuse angle, a connection between the third connection section and the second connection board has a third included angle towards the first side, and the third included angle is an obtuse angle.
In an embodiment, the plastic package body has a third side and a fourth side connecting the first side and the second side, a width L1 of the first connection plate is smaller than a width L2 of the second connection plate in a direction from the third side to the fourth side, a width L3 of the second connection section in a direction from the third side to the fourth side, and a width L3 of the second connection section gradually increases in an extending direction from the first connection plate to the second connection plate.
In an embodiment, the orthographic projection of the second connection section on the first surface is an isosceles trapezoid.
In an embodiment, the second connecting plate is exposed outside the plastic package.
In an embodiment, the second connecting plate includes a third surface facing the first surface and a fourth surface facing away from the third surface; the fourth surface of the second connecting plate is exposed out of the plastic package body, and the third surface of the second connecting plate, the first connecting plate, the second connecting section and the third connecting section are all encapsulated in the plastic package body.
In an embodiment, a plurality of second through holes are formed in the second connecting plate.
In an embodiment, the total area of the plurality of second through holes is less than 40% of the area of the surface of the metal clip.
In one embodiment, the metal clip is a copper clip; the surface of the second bonding pad is plated with a metal layer, the metal layer is a lamination of a Ni layer, a Pb layer and an Au layer, or the metal layer is a lamination of a Ni layer and an Au layer, or the metal layer is an Ag layer, or the metal layer is a Cu layer.
In an embodiment, the first pin is integrally formed with the substrate.
In one embodiment, the front surface of the chip is further provided with a third bonding pad and a fourth bonding pad; the semiconductor packaging structure further comprises a third pin and a fourth pin, one end of the third pin is connected with the third bonding pad through a metal wire, the other end of the third pin extends out of the second side of the plastic package body and extends towards the direction of the first surface, one end of the fourth pin is connected with the fourth bonding pad through a metal wire, and the other end of the fourth pin extends out of the second side of the plastic package body and extends towards the direction of the first surface.
In an embodiment, the surfaces of the first pin and the second pin are plated with a tin layer, and the thickness of the tin layer is 5 micrometers to 20 micrometers.
Compared with the prior art, the semiconductor packaging structure provided by the application has the beneficial effects that the semiconductor packaging structure comprises a plastic package body, a chip, a substrate, a first pin and a second pin, wherein the chip is arranged on the first surface of the substrate, the back surface of the chip is provided with a first bonding pad, and the front surface of the chip is provided with a second bonding pad; and the chip is electrically connected with the substrate through the first bonding pad, and one end of the second pin is connected with the second bonding pad through the metal clip. The metal clip comprises a first connecting plate connected with the second bonding pad, the first connecting plate is connected with the second bonding pad through solder, a plurality of first through holes are formed in the first connecting plate, and through the arrangement of the plurality of first through holes in the first connecting plate, a dissipation channel for gas after the solder melts when the chip is welded with the first connecting plate is provided, the probability of a cavity of a solder layer between the chip and the first connecting plate is reduced, and then the connection reliability of the chip and the second pin is improved.
Drawings
For a clearer description of the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the description below are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art, wherein:
Fig. 1 is a schematic structural diagram of a semiconductor package according to an embodiment of the present application;
FIG. 2 is a schematic view of the semiconductor package shown in FIG. 1 from another perspective;
FIG. 3 is a schematic view of an embodiment of a semiconductor package with a plastic package removed;
Fig. 4 is a schematic structural diagram of the semiconductor package structure with the plastic package removed shown in fig. 3 in another view angle;
fig. 5 is a schematic structural diagram of the semiconductor package structure with the plastic package removed shown in fig. 3 in another view angle;
fig. 6 is a longitudinal cross-sectional view of the semiconductor package shown in fig. 1;
fig. 7 is a longitudinal cross-sectional view of another embodiment of a semiconductor package structure provided by the present application;
FIG. 8 is an enlarged view of the structure of the metal clip provided by the present application;
FIG. 9 is an enlarged view of the structure of area A in FIG. 6;
FIG. 10 is a schematic diagram of a prior art process for molding a first lead, a substrate, and a second lead;
fig. 11 is a flow chart of a rib cutting forming embodiment of the first pin, the substrate and the second pin in the present application.
Description of the reference numerals:
-100 of a semiconductor package;
A plastic package body 10;
A chip 20; a second pad 21; a third pad 22; a fourth pad 23; a metal wire 24;
A solder layer 70;
A substrate 30; a heat dissipation area 31;
A first pin 40; a second pin 50; a third pin 80; a fourth pin 90;
a metal clip 60; a first connection plate 61; rocker 62; a first connection section 63; a second connection plate 64; a second connecting section 65; a third connecting section 66;
A first through hole A1; a second through hole A2; a third through hole A3; a boss B; a first notch C1; a second notch C2; a bump C3; annular slot C4; a strip-shaped groove C5;
a first included angle alpha 1; a second included angle alpha 2; and a third included angle alpha 3.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms "first," "second," "third," and the like in this disclosure are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first", "a second", and "a third" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise. All directional indications (such as up, down, left, right, front, back … …) in the embodiments of the present application are merely used to explain the relative positional relationship, movement, etc. between the components in a particular gesture (as shown in the drawings), and if the particular gesture changes, the directional indication changes accordingly. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
The present application will be described in detail with reference to the accompanying drawings and examples.
Referring to fig. 1 to 9, fig. 1 is a schematic structural diagram of a semiconductor package structure according to an embodiment of the present application under a view angle; FIG. 2 is a schematic view of the semiconductor package shown in FIG. 1 from another perspective; FIG. 3 is a schematic view of an embodiment of a semiconductor package with a plastic package removed; fig. 4 is a schematic structural diagram of the semiconductor package structure with the plastic package removed shown in fig. 3 in another view angle; fig. 5 is a schematic structural diagram of the semiconductor package structure with the plastic package removed shown in fig. 3 in another view angle; fig. 6 is a longitudinal cross-sectional view of the semiconductor package shown in fig. 1; fig. 7 is a longitudinal cross-sectional view of another embodiment of a semiconductor package structure provided by the present application; FIG. 8 is an enlarged view of the structure of the metal clip provided by the present application; fig. 9 is an enlarged view of the structure of the region a in fig. 6.
Specifically, referring to fig. 1-4, the present application provides a semiconductor package 100, where the semiconductor package 100 includes a plastic package 10, a chip 20, a substrate 30, a first lead 40, and a second lead 50.
The chip 20 includes a front surface and a back surface, the back surface of the chip 20 is provided with a first bonding pad (not shown), and the front surface of the chip 20 is provided with a second bonding pad 21.
The substrate 30 includes a first surface and a second surface that are opposite to each other, the chip 20 is disposed on the first surface, and the chip 20 is electrically connected to the substrate 30 through a first pad. The first surface of the substrate 30 and the chip 20 are encapsulated in the plastic package 10, at least a portion of the second surface of the substrate 30 is exposed out of the plastic package 10 to form a heat dissipation area 31, and the heat dissipation area 31 can be used for dissipating heat from the chip 20. The heat dissipation area 31 may be formed outside the plastic package 10 by exposing at least a portion of the second surface of the substrate 30, where the heat dissipation area 31 is formed outside the plastic package 10 by exposing a portion of the second surface of the substrate 30, and where the heat dissipation area 31 is formed outside the plastic package 10 by exposing all of the second surface of the substrate 30, i.e., the heat dissipation area 31 is formed outside the plastic package 10 by exposing all of the second surface. The first pads of the chip 20 and the substrate 30 may be connected by a solder material in particular to achieve an electrical connection therebetween.
One end of the first pin 40 is connected to the substrate 30, and further connected to the first pad of the chip 20 through the substrate 30, and the other end of the first pin 40 extends from the first side of the plastic package 10 and extends toward the direction of the first surface.
One end of the second pin 50 is connected to the second bonding pad 21 through the metal clip 60, and the other end of the second pin 50 extends from the second side of the plastic package body 10 and extends toward the direction of the first surface, where the first side and the second side are opposite sides on the plastic package body 10.
Specifically, the first bonding pad of the chip 20 is electrically connected to the first pin 40 of the substrate 30, the second bonding pad 21 of the chip 20 is electrically connected to the second pin 50 through the metal clip 60, and the first pin 40 and the second pin 50 are used to realize external access to the chip 20.
Referring to fig. 6 and 7, the metal clip 60 may be completely enclosed within the plastic package 10; or at least part of the metal clip 60 may expose the plastic package body 10, and the area of the metal clip 60 exposing the plastic package body 10 may serve as a new heat dissipation channel for dissipating heat from the chip 20.
Specifically, the plastic package 10 encapsulates the chip 20, at least a portion of the substrate 30, a portion of the first leads 40, a portion of the second leads 50, and at least a portion of the metal clip 60, and is capable of sealing and protecting the chip 20 from moisture and dust particles, and providing corresponding insulation and support properties for the above components.
It can be appreciated that at least a portion of the second surface of the substrate 30 is exposed outside the plastic package body 10 for implementing heat dissipation to the chip 20, and the first pins 40 and the second pins 50 connected to the chip 20 are respectively located at opposite sides of the plastic package body 10 and extend towards the direction of the first surface, that is, the extending directions of the first pins 40 and the second pins 50 are opposite to the second surface of the substrate 30.
Referring to fig. 5, 6 and 9, in the embodiment of the application, the metal clip 60 includes a first connection board 61 connected to the second bonding pad 21, the first connection board 61 is connected to the second bonding pad 21 through solder, and a plurality of first through holes A1 are formed in the first connection board 61.
The first connection plate 61 being connected to the second pad 21 by solder can also be understood as the first connection plate 61 being connected to the second pad 21 by soldering. Specifically, by providing the first connection plate 61 with the plurality of first through holes A1, the plurality of first through holes A1 provide a dissipation channel for gas after solder melts when the chip 20 is soldered with the first connection plate 61, so that the probability of a cavity of the solder layer 70 formed between the chip 20 and the first connection plate 61 is reduced, and further, the reliability of connection between the chip 20 and the second pins 50 through the metal clip 60 is improved.
In some embodiments, the solder includes SnSb and/or SnAg. Specifically, snSb and SnAg are both high thermal conductive solders, so that SnSb and/or SnAg are used as solders, so that not only can electrical connection between the chip 20 and the first connection board 61 be provided, but also the chip 20 can transfer heat to the first connection board 61 and other components connected to the first connection board 61, such as the metal clip 60 and the second pins 50, through the solder layer 70, thereby providing a new thermal conduction path for the chip 20. It should be noted that in other embodiments, the solder may be other suitable materials other than SnSb and SnAg.
In some embodiments, the surface of the second pad 21 is plated with a metal layer, which is a stack of a Ni layer, a Pb layer, and an Au layer, or a stack of a Ni layer and an Au layer, or an Ag layer, or a Cu layer. Specifically, by plating the surface of the second bonding pad 21 with a metal layer, the soldering effect between the chip 20 and the first connection board 61 can be improved.
In some embodiments, the material of the metal clip 60 is copper or aluminum, i.e., the metal clip 60 is a copper clip or an aluminum clip. Wherein copper has lower resistance than aluminum, the chip 20 and the second pin 50 are connected by a copper clip, i.e. a metal clip 60 made of copper, and the metal clip 60 can provide higher current passing capability.
In one embodiment, the first through hole A1 is located at the middle of the first connection plate 61. Specifically, the first through hole A1 is disposed in the middle of the first connection board 61, that is, the first through hole A1 is disposed in the middle of the solder between the first connection board 61 and the second pad 21, so that when the first connection board 61 is soldered to the chip 20, on the one hand, the dissipation of gas during soldering can be more facilitated, and on the other hand, the difference between the regions of the solder layer 70 formed by the solder can be reduced as much as possible, thereby improving the connection reliability of the chip 20 and the first connection board 61.
In some embodiments, the number of first through holes A1 may be one or more; when the number of the first through holes A1 is one, one first through hole A1 is provided in the middle of the first connection plate 61. When the number of the first through holes A1 is plural, the plural first through holes A1 are provided around the middle of the first connection plate 61, thereby reducing the variability between the regions of the solder layer 70 where the solder is formed as much as possible.
It should be noted that, if the area of the first through holes A1 occupies too large a proportion of the surface area of the first connection board 61, the area of the first connection board 61 connected to the chip 20 is too small, so as to affect the connection reliability, and therefore, in the embodiment of the application, the total area of the plurality of first through holes A1 is less than 30% of the surface area of the first connection board 61. For example, the total area of the plurality of first through holes A1 is 30%, 25%, 20% or 15% of the area of the surface of the first connection plate 61, or the like.
Of course, the ratio of the area of the first through hole A1 to the surface area of the first connection plate 61 is not too small, and too small may cause too small escape passage of the gas after melting the solder during soldering, and the exhaust effect is not ideal. Specifically, the total area of the plurality of first through holes A1 may be set to be smaller than 30% of the area of the surface of the first connection plate 61 and larger than 10% of the area of the surface of the first connection plate 61, for example.
With continued reference to fig. 9, in some embodiments, a surface of the second pad 21 facing the first connection plate 61 is provided with a plurality of protrusions B; and/or the surface of the first connection plate 61 facing the second pad 21 is provided with a plurality of protrusions B.
Specifically, by providing the plurality of protrusions B on the surface of the second bonding pad 21 facing the first connecting plate 61 and/or the surface of the first connecting plate 61 facing the second bonding pad 21, the protrusions B are used for pressing solder and directly contacting each other when the second bonding pad 21 is welded with the first connecting plate 61, so that the first connecting plate 61 and the second bonding pad 21 are ensured to be parallel during welding, further, the flatness of the metal clip 60 and the second bonding pad 21 is ensured, and the solder is located in the gap between the adjacent protrusions B, thereby improving the consistency of the thickness of the solder.
Wherein, the surface of the second bonding pad 21 facing the first connecting plate 61 and/or the surface of the first connecting plate 61 facing the second bonding pad 21 are provided with a plurality of protruding portions B, and the plurality of protruding portions B may be disposed around the first through hole A1, so as to ensure that the first connecting plate 61 and the second bonding pad 21 are parallel during welding.
In the embodiment of the present application, in order to simplify the preparation of the protruding portions B, a surface of the first connection plate 61 facing the second pad 21 is provided with a plurality of protruding portions B, specifically, the number of protruding portions B may be 4, and the 4 protruding portions B are located at four corners of the first connection plate 61 respectively. Wherein the plurality of protrusions B are formed through an extrusion or etching process.
With continued reference to fig. 6, in an embodiment, the first connecting plate 61 is connected with a rocker 62 in a direction approaching the first side, and in a direction from the second surface to the first surface, the rocker 62 is configured away from the first surface and is connected to the first connecting plate 61 by a first connecting section 63, a connection between the first connecting section 63 and the first connecting plate 61 has a first angle α1 facing the second side, the first angle α1 is an obtuse angle, and the first connecting plate 61, the first connecting section 63 and the rocker 62 are integrally formed.
Specifically, the reliability of the first connecting plate 61, the first connecting section 63 and the rocker 62, which are integrally formed, is higher, and better mechanical properties are achieved. And set up the first contained angle α1 of the junction of first linkage segment 63 and first connecting plate 61 for the obtuse angle for the wane 62 that is located first linkage segment 63 and keeps away from first connecting plate 61 one end keeps away from first surface, and then increases integrated into one piece design's first connecting plate 61, first linkage segment 63 and wane 62 to plastic envelope body 10 lock membrane ability.
With continued reference to fig. 6, in an embodiment, the metal clip 60 further includes a second connection plate 64, in a direction from the second surface to the first surface, the second connection plate 64 is disposed away from the first surface, the second pin 50 is disposed away from the first surface, in a direction from the first side to the second side, the second pin 50 is disposed away from the substrate 30, and in a direction from the first side of the first connection plate 61, one end of the second connection plate 64 is connected to the first connection plate 61 through a second connection section 65, and the other end of the second connection plate 64 is connected to the second pin 50 through a third connection section 66.
Specifically, in the direction of the first connecting plate 61 away from the first side, opposite ends of the second connecting plate 64 are respectively connected with the first connecting plate 61 and the second pins 50 through the second connecting section 65 and the third connecting section 66, and in the direction from the second surface to the first surface, the second connecting plate 64 is configured away from the first surface, so that the second connecting plate 64, the second connecting section 65 and the third connecting section 66 form an arch structure, the distance between the metal clip 60 and the substrate 30 is increased, and further short circuits are avoided.
Referring to fig. 5, in an embodiment, the second connecting plate 64 is further exposed outside the plastic package 10, and the second connecting plate 64 and the heat dissipation area 31 respectively dissipate heat from the front surface and the back surface of the chip 20. Specifically, the second connecting plate 64 may be partially exposed outside the plastic package body 10, or the second connecting plate 64 may be entirely exposed outside the plastic package body 10.
In one embodiment, the second connecting plate 64 includes a third surface facing the first surface and a fourth surface facing away from the third surface; the fourth surface of the second connecting plate 64 is exposed outside the plastic package body 10, and the third surface of the second connecting plate 64, the first connecting plate 61, the second connecting section 65 and the third connecting section 66 are all encapsulated in the plastic package body 10. That is, the fourth surface of the second connecting plate 64 is flush with the surface of the plastic package body 10 located on the same side as the first surface, so that the semiconductor package structure 100 is more attractive in appearance on the basis of adding a heat dissipation channel.
Of course, in other embodiments, the third surface and the fourth surface of the second connecting plate 64, the connection between the second connecting section 65 and the second connecting plate 64, and the connection between the third connecting section 66 and the second connecting plate 64 may be exposed outside the plastic package 10, and the portions of the first connecting plate 61, the second connecting section 65, and the portions of the third connecting section 66, other than the connection with the second connecting plate 64, may be enclosed in the plastic package 10. That is, the second connection plate 64 protrudes from the molding body 10. Specifically, the second connection plate 64 is not limited to this, as long as it can exert a heat dissipation effect on the chip 20.
Further, referring to fig. 3 or fig. 5, in the embodiment of the present application, a plurality of second through holes A2 are further disposed on the second connecting plate 64. Specifically, by providing the second through hole A2 on the second connecting plate 64, when the injection molding process is performed, the molding material forming the plastic package body 10 flows through the second through hole A2, so that the second connecting plate 64 plays a role in fixing the plastic package body 10 after the injection molding process is completed.
In one embodiment, the molded package 10 has a third side and a fourth side connecting the first side and the second side; the second through hole A2 is a strip-shaped hole, and the length of the strip-shaped hole in the direction from the first side to the second side is larger than the width of the strip-shaped hole in the direction from the third side to the fourth side. Of course, in other embodiments, the shape of the second through hole A2 includes, but is not limited to, circular, diamond, rectangular, other irregular shapes, and the like.
It should be noted that, if the area of the second through holes A2 is too large in proportion to the area of the surface of the metal clip 60, the electrical performance (such as the current conducting capability) and the mechanical performance (such as the supporting performance) of the metal clip 60 are affected, so in the embodiment of the present application, the total area of the second through holes A2 is smaller than 40% of the area of the surface of the metal clip 60. For example, the total area of the plurality of second through holes A2 is set to 40%, 35%, 30%, 25% or the like of the area of the surface of the metal clip 60.
Of course, the area ratio of the second through hole A2 to the surface of the metal clip 60 is not too small, and the fixing effect on the plastic package 10 is not good. Specifically, the total area of the plurality of second through holes A2 may be smaller than 40% of the area of the surface of the metal clip 60 and larger than 15% of the area of the surface of the metal clip 60.
In the embodiment of the present application, the number of the second through holes A2 is one.
Referring to fig. 6, 7 and 9, in an embodiment, in a direction from the second surface to the first surface, an end of the second pin 50 connected to the third connection section 66 is closer to the first surface than the second connection plate 64, wherein a connection between the second connection section 65 and the first connection plate 61 has a second included angle α2 facing the first side, the second included angle α2 is an obtuse angle, and a connection between the third connection section 66 and the second connection plate 64 has a third included angle α3 facing the first side, and the third included angle α3 is an obtuse angle.
Specifically, through the above design, the metal clip 60 is in an arch structure design, so that the risk of short circuit between the metal clip 60 and the substrate 30 is reduced, and the end, connected to the third connecting section 66, of the second pin 50 is accommodated in the plastic package body 10, so that the plastic package body is prevented from being affected by moisture and dust particles.
Referring to fig. 5 and 8, in an embodiment, the width L1 of the first connecting plate 61 is smaller than the width L2 of the second connecting plate 64, that is, L2 is larger than L1, and the width L3 of the second connecting section 65 gradually increases in the extending direction from the first connecting plate 61 to the second connecting plate 64 in the direction from the third side to the fourth side, where the width L3 of the second connecting section 65 is L3.
Specifically, through the above arrangement, the first connection plate 61 may correspond to the size of the chip 20, so that the first connection plate 61 is convenient to be welded with the second bonding pad 21 of the chip 20, and the width L3 of the second connection section 65 is gradually increased in the extending direction from the first connection plate 61 to the second connection plate 64, and the width L2 of the second connection plate 64 is set to be larger than the width L1 of the first connection plate 61, so that the current conducting capability and connection reliability of the second connection section 65 and the second connection plate 64 can be improved, and the heat dissipation effect of the second connection plate 64 to the chip 20 can be improved.
The orthographic projection of the second connection section 65 on the first surface is trapezoidal, as long as the purpose of transition between the width L1 of the first connection plate 61 and the width L2 of the second connection plate 64 is achieved. In the embodiment of the present application, the orthographic projection of the second connecting section 65 on the first surface is isosceles trapezoid. In other embodiments, the orthographic projection of the second connecting section 65 on the first surface may also be right trapezoid or trapezoid with other angles.
With continued reference to fig. 6, in an embodiment, one end of the first pin 40 is connected to a side wall of the substrate 30, and one end of the first pin 40 connected to the side wall of the substrate 30 has a fifth surface and a sixth surface facing away from each other, where the fifth surface is coplanar with the first surface, and the sixth surface is located between a plane where the first surface is located and a plane where the second surface is located.
Specifically, the present inventors have found that, in the related art, as shown in fig. 10, fig. 10 is a schematic flow chart of the rib cutting forming of the first lead, the substrate and the second lead in the prior art, the first lead 40, the substrate 30 and the second lead 50 are integrally formed before the rib cutting forming, and the first lead 40 and the second lead 50 are generally designed to be connected to the second surface of the substrate 30 before the rib cutting forming, in the course of the coarse aluminum wire bonding process, since the bonding quality between the copper material lead structure (the first lead 40 and the second lead 50) and the aluminum wire is low, the bonding quality needs to be increased by electroplating a plating layer on the bonding area. Because the window size of the electroplating tool has errors, the side surface of the substrate 30 is usually electroplated, but the adhesion capability of the electroplated layer and the plastic packaging material is poor, and defects such as layering phenomenon caused by poor adhesion quality between the side surface of the substrate 30 and the plastic packaging material can occur after the plastic packaging process is completed, so that water vapor enters the plastic packaging body 10 along the side wall of the substrate 30, and the reliability of the device is reduced.
In order to solve the above problems, as shown in fig. 11, fig. 11 is a schematic flow chart of an embodiment of the present application for cutting and forming the first leads, the substrate and the second leads, and the first leads 40 and the second leads 50 are designed to be on the same plane with the first surface of the substrate 30, and since the side surface of the substrate 30 is located at the lower side and is blocked by the lead structure, even if there is a window error in the electroplating tool during electroplating, the side surface of the substrate 30 will not obtain the electroplated layer, thereby improving the bonding quality of the plastic package material with the first leads 40 and the substrate 30, reducing the probability of occurrence of defects (delamination) of the plastic package body 10, and improving the reliability of the device.
In addition, in the embodiment of the present application, the first lead 40 and the substrate 30 are integrally formed, so that the structural strength of the lead frame formed by the first lead 40 and the substrate 30 can be improved.
In one embodiment, the surfaces of the first and second pins 40 and 50 are plated with a tin layer having a thickness of 5 micrometers to 20 micrometers. For example, the tin layer may have a thickness of 5 microns, 10 microns, 15 microns, 20 microns, or the like.
Specifically, the tin layer can enable the cut section to spontaneously form a tin-coated structure when the first pin and the second pin are cut and molded, so that the oxidation resistance of the first pin 40 and the second pin 50 is improved; and to improve solderability of the first and second pins 40, 50 with other circuit devices.
In an embodiment, if the chip 20 includes only the first pad and the second pad 21, the chip 20 may be a diode such as FRD/SRD/SBD.
Referring to fig. 5, in another embodiment, the chip 20 is a controllable device such as a MOSFET/IGBT, and the front surface of the chip 20 is further provided with a third bonding pad 22; the semiconductor package 100 further includes a third lead 80, one end of the third lead 80 is connected to the third pad 22 through the metal wire 24, and the other end of the third lead 80 extends from the second side of the plastic package 10 and extends toward the first surface. The third pad 22 is generally used as a gate pad or a driving pad, so that the third pin 80 connected to the third pad 22 does not need to bear large current and voltage, and therefore, the electrical connection structure between the third pin 80 and the third pad 22 has relatively low requirements on electrical-thermal properties, and the conventional metal wire 24 is used for connection to meet the performance requirements, so that the cost can be saved.
With continued reference to fig. 5, further, the front surface of the chip 20 is further provided with a fourth bonding pad 23, the semiconductor package structure 100 further includes a fourth pin 90, one end of the fourth pin 90 is connected to the fourth bonding pad 23 through a metal wire 24, and the other end of the fourth pin 90 extends from the second side of the plastic package body 10 and extends toward the direction of the first surface. The fourth bonding pad 23 may be a kelvin source floating island, so the fourth pin 90 connected to the fourth bonding pad 23 does not need to bear large current and voltage, so the electrical connection structure between the fourth pin 90 and the fourth bonding pad 23 has relatively low requirements on electrical-thermal properties, and the conventional metal wire 24 is used for connection to meet the performance requirements, thereby saving cost.
Referring to fig. 3, in some embodiments, a plurality of third through holes A3 are disposed at an end of the first pin 40 connected to the substrate 30.
And/or, an edge of one end of the first pin 40 far away from the substrate 30 is provided with a plurality of first notches C1.
And/or, a side of the substrate 30 corresponding to the third side of the plastic package 10 is provided with a plurality of bumps C3.
And/or, a side of the substrate 30 corresponding to the fourth side of the plastic package 10 is provided with a plurality of bumps C3.
Specifically, the third through holes A3, the first notches C1 and the bumps C3 are used for flowing the molding material through the third through holes A3, the first notches C1 and the second notches C2 when the injection molding process is performed, and for fixing the molding body 10 after the injection molding process is completed.
Referring to fig. 1, in an embodiment, a plurality of second notches C2 are disposed on a third side and/or a fourth side of the molding compound 10. Specifically, the second notches C2 penetrate through the first surface of the substrate 30, and the second notches C2 can be used for preventing the occurrence of glue overflow of the substrate 30, delamination or cracking between the plastic package 10 and the substrate 30 during injection molding.
Referring to fig. 3, in one embodiment, the first surface of the substrate 30 is provided with an annular slot C4, and the annular slot C4 is disposed around the chip 20.
In particular, the annular groove C4 helps to increase the adhesion between the substrate 30 and the molding compound 10 and reduce moisture penetration in the external environment.
Referring to fig. 2, in an embodiment, a strip-shaped slot C5 is formed on the top surface of the plastic package body 10, and the strip-shaped slot C5 is located on a side of the second surface of the substrate 30, which is close to the second pins 50.
Specifically, the strip-shaped slot C5 increases the creepage distance between the heat dissipation area 31 and the second pin 50 extending out of the portion of the plastic package body 10, thereby improving the safety and reliability of the device.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application or directly or indirectly applied to other related technical fields are included in the scope of the present application.

Claims (20)

1. A semiconductor package structure, comprising:
a plastic package body;
The chip comprises a front surface and a back surface, wherein the back surface of the chip is provided with a first bonding pad, and the front surface of the chip is provided with a second bonding pad;
The chip is arranged on the first surface and is electrically connected with the substrate through the first bonding pad, the first surfaces of the chip and the substrate are encapsulated in the plastic package, and at least part of the second surface of the substrate is exposed out of the plastic package;
One end of the first pin is connected with the substrate, and the other end of the first pin extends out from the first side of the plastic package body and extends towards the direction of the first surface;
One end of the second pin is connected with the second bonding pad through a metal clamp, the other end of the second pin extends out of the second side of the plastic package body and extends towards the direction of the first surface, and the first side and the second side are two opposite sides on the plastic package body;
The metal clip comprises a first connecting plate connected with the second bonding pad, wherein the first connecting plate is connected with the second bonding pad through solder, and a plurality of first through holes are formed in the first connecting plate.
2. The semiconductor package according to claim 1, wherein the first via is located in a middle portion of the first connection board.
3. The semiconductor package according to claim 1, wherein a total area of the plurality of first through holes is less than 30% of an area of the surface of the first connection board.
4. The semiconductor package according to claim 1, wherein a surface of the first connection board facing the second pad is provided with a plurality of protruding portions.
5. The semiconductor package according to claim 4, wherein the number of the protruding portions is 4, and the 4 protruding portions are located at four corners of the first connection board, respectively.
6. The semiconductor package according to claim 2, wherein a surface of the first connection board facing the second pad is provided with a plurality of protruding portions, and a plurality of protruding portions are disposed around the first through hole.
7. The semiconductor package according to claim 6, wherein the number of the first through holes is one.
8. The semiconductor package according to claim 1, wherein the first connection board is connected with a rocker in a direction approaching the first side, the rocker is configured to be away from the first surface and connected with the first connection board through a first connection section, a connection portion of the first connection section and the first connection board has a first included angle toward the second side, the first included angle is an obtuse angle, and the first connection board, the first connection section, and the rocker are integrally formed.
9. The semiconductor package according to claim 1, wherein the metal clip further comprises a second connection plate, the second connection plate being disposed away from the first surface in a direction from the second surface to the first surface, the second pin being disposed away from the first surface in the first side to the second side direction, the second pin being disposed away from the substrate, one end of the second connection plate being connected to the first connection plate through a second connection section, and the other end of the second connection plate being connected to the second pin through a third connection section in a direction from the first connection plate to the first side.
10. The semiconductor package according to claim 9, wherein in a direction from the second surface to the first surface, an end of the second lead connected to the third connection section is closer to the first surface than the second connection board, wherein a connection between the second connection section and the first connection board has a second angle toward the first side, the second angle is an obtuse angle, a connection between the third connection section and the second connection board has a third angle toward the first side, and the third angle is an obtuse angle.
11. The semiconductor package according to claim 10, wherein the plastic package has a third side and a fourth side connecting the first side and the second side, a width L1 of the first connection plate is smaller than a width L2 of the second connection plate in a direction from the third side to the fourth side, a width L3 of the second connection section in a direction from the third side to the fourth side, and a width L3 of the second connection section gradually increases in an extending direction from the first connection plate to the second connection plate.
12. The semiconductor package according to claim 11, wherein an orthographic projection of the second connection section on the first surface is an isosceles trapezoid.
13. The semiconductor package according to claim 9, wherein the second connection board is exposed outside the plastic package.
14. The semiconductor package according to claim 13, wherein the second connection plate includes a third surface facing the first surface and a fourth surface facing away from the third surface;
The fourth surface of the second connecting plate is exposed out of the plastic package body, and the third surface of the second connecting plate, the first connecting plate, the second connecting section and the third connecting section are all encapsulated in the plastic package body.
15. The semiconductor package according to claim 9, wherein the second connection board is provided with a plurality of second through holes.
16. The semiconductor package according to claim 15, wherein a total area of the plurality of second through holes is less than 40% of an area of the surface of the metal clip.
17. The semiconductor package according to claim 1, wherein the metal clip is a copper clip;
The surface of the second bonding pad is plated with a metal layer, the metal layer is a lamination of a Ni layer, a Pb layer and an Au layer, or the metal layer is a lamination of a Ni layer and an Au layer, or the metal layer is an Ag layer, or the metal layer is a Cu layer.
18. The semiconductor package according to claim 1, wherein the first leads are integrally formed with the substrate.
19. The semiconductor package according to claim 1, wherein the front surface of the chip is further provided with a third pad and a fourth pad;
The semiconductor packaging structure further comprises a third pin and a fourth pin, one end of the third pin is connected with the third bonding pad through a metal wire, the other end of the third pin extends out of the second side of the plastic package body and extends towards the direction of the first surface, one end of the fourth pin is connected with the fourth bonding pad through a metal wire, and the other end of the fourth pin extends out of the second side of the plastic package body and extends towards the direction of the first surface.
20. The semiconductor package according to claim 1, wherein the first and second leads are plated with a tin layer having a thickness of 5 to 20 microns.
CN202322234891.4U 2023-08-18 2023-08-18 Semiconductor packaging structure Active CN220984523U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202322234891.4U CN220984523U (en) 2023-08-18 2023-08-18 Semiconductor packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202322234891.4U CN220984523U (en) 2023-08-18 2023-08-18 Semiconductor packaging structure

Publications (1)

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CN220984523U true CN220984523U (en) 2024-05-17

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Family Applications (1)

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