CN220823083U - Radio frequency chip batch aging simulation test system - Google Patents
Radio frequency chip batch aging simulation test system Download PDFInfo
- Publication number
- CN220823083U CN220823083U CN202322608443.6U CN202322608443U CN220823083U CN 220823083 U CN220823083 U CN 220823083U CN 202322608443 U CN202322608443 U CN 202322608443U CN 220823083 U CN220823083 U CN 220823083U
- Authority
- CN
- China
- Prior art keywords
- radio frequency
- power
- module
- tested
- frequency chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 83
- 230000032683 aging Effects 0.000 title claims abstract description 21
- 238000004088 simulation Methods 0.000 title claims abstract description 14
- 239000011159 matrix material Substances 0.000 claims abstract description 26
- 238000004891 communication Methods 0.000 claims abstract description 8
- 230000005540 biological transmission Effects 0.000 claims abstract description 5
- 238000010438 heat treatment Methods 0.000 claims description 15
- 239000000919 ceramic Substances 0.000 claims description 12
- 238000011161 development Methods 0.000 claims description 10
- 230000018109 developmental process Effects 0.000 claims description 10
- 241000270728 Alligator Species 0.000 claims description 2
- 230000007547 defect Effects 0.000 abstract description 6
- 238000012423 maintenance Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 3
- 241000270722 Crocodylidae Species 0.000 description 2
- 229920000147 Styrene maleic anhydride Polymers 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- LNNWVNGFPYWNQE-GMIGKAJZSA-N desomorphine Chemical compound C1C2=CC=C(O)C3=C2[C@]24CCN(C)[C@H]1[C@@H]2CCC[C@@H]4O3 LNNWVNGFPYWNQE-GMIGKAJZSA-N 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
The application relates to a radio frequency chip batch aging simulation test system which comprises a power supply module, a signal source module, a control module, a radio frequency matrix module, a power sensing module and a PC control end, wherein the power supply module supplies power to a plurality of radio frequency chips to be tested; the signal source module outputs initial communication signals to a plurality of radio frequency chips to be tested respectively; the control module controls the transmission power gain coefficients of a plurality of radio frequency chips to be tested and provides an aging temperature environment; the radio frequency matrix module is connected with the plurality of radio frequency chips to be tested to output a plurality of test signals to the power sensing module; the power sensing module measures the power of a plurality of test signals and sends the power to the PC control end to judge whether a plurality of radio frequency chips to be tested are qualified or not. According to the application, the radio frequency chips with hidden defects are screened out by carrying out batch test under the simulated failure environment, so that the problem of poor network stability caused by the failure or failure of the maintained RRU is reduced.
Description
Technical Field
The application relates to the technical field of communication test, in particular to a radio frequency chip batch aging simulation test system.
Background
In the maintenance business of the wireless base station, the radio frequency module RRU occupies more than seventy percent of the total maintenance business. Over fifty percent of radio frequency module failures are radio frequency chip (PA) failures, which are typically handled by replacing the PA chip.
Because the PA chip selected by the RRU of many base station manufacturers has the problem of factory shutdown, only the PA chip in the retreaded or scattered new state can be purchased. Such PAs can only be tested unpowered using a multimeter in a bare die state, and typically pass testing, and after soldering to a circuit board, pass system testing and burn-in testing.
However, after a period of time after the partially repaired RRU is returned to the customer network for use, a failure or failure occurs at some specific transmit power or specific operating temperature, resulting in poor network stability.
Disclosure of utility model
In order to solve the problem that the network stability is poor due to the fact that after the RRU after partial maintenance in the technology returns to a customer network for a period of time, faults or failures occur under certain specific transmitting power or specific working temperature, the application provides a radio frequency chip batch aging simulation test system.
The application provides a rack for batch automatic testing of baseband processing units, which adopts the following technical scheme:
The utility model provides a frame of baseband processing unit batch automatic test, includes power module, signal source module, control module, radio frequency matrix module, power sensing module and PC control end, wherein:
the power module is used for supplying power to the plurality of radio frequency chips to be tested;
the signal source module is used for respectively outputting initial communication signals to the plurality of radio frequency chips to be tested;
The control module is used for controlling the transmission power gain coefficients of the radio frequency chips to be tested and providing an aging temperature environment; the radio frequency matrix module is used for being connected with a plurality of radio frequency chips to be tested to output a plurality of test signals, wherein the test signals are the initial communication signals after passing through the radio frequency chips to be tested;
the power sensing module is used for measuring the power of a plurality of test signals and sending the power to the PC control end;
and the PC control end is used for setting parameters required by the test and receiving the power of the test signals to judge whether the radio frequency chips to be tested are qualified or not.
By adopting the technical scheme, the signal source module is controlled by the PC control end to output specific power to the radio frequency chip to be tested, meanwhile, the transmitting power gain is adjusted by the control module to provide an aging temperature environment so as to simulate a failure environment, and the output power of the radio frequency chip to be tested is detected by the power sensing module so as to screen out the radio frequency chip with hidden defects; in order to improve the efficiency of the test, a mode of testing a plurality of radio frequency chips to be tested at one time is adopted, and test signals output by the radio frequency chips to be tested are routed to a power sensing module through a radio frequency matrix module, so that test results are conveniently obtained in batches, the performance of the radio frequency chips to be tested is evaluated, a maintainer is convenient to select the radio frequency chips with better performance, and the problem that after the RRU after partial maintenance is returned to a customer network for a period of time, faults or failures occur under certain specific transmitting power or specific working temperature, so that the network stability is poor is solved.
Preferably, the PC control end is connected to the signal source module, the control module and the power module through an ethernet switch, and the radio frequency matrix module and the power sensing module are directly connected to the PC control end.
By adopting the technical scheme, a tester can set different test parameters at the PC control end and respectively send the test parameters to the signal source module, the control module and the power module, so that the system can meet the test of radio frequency chips of different models. The radio frequency matrix module and the power sensing module are directly connected with the PC control end, so that the tested data can be directly transmitted to the PC control end for measurement and calculation, and whether the test result meets the standard is checked.
Preferably, the power module includes a plurality of programmable digital power sources, each of the programmable digital power sources is connected with each of the radio frequency chips to be tested, and each of the programmable digital power sources is connected with the ethernet switch.
By adopting the technical scheme, the programmable digital power supply enables the radio frequency chip to be tested, so that the radio frequency chip to be tested can work normally and output signals; the programmable digital power supply is connected to the Ethernet switch, so that the PC control end can regulate and control the output of the programmable digital power supply through the Ethernet switch to meet the working demands of radio frequency chips of different models.
Preferably, the signal source module comprises a signal generator connected with the ethernet switch and a power distributor connected with the signal generator, and the power distributor is connected with the input ends of the plurality of radio frequency chips to be tested.
By adopting the technical scheme, the PC control end outputs initial signals with different powers through the Ethernet switch control signal generator, so that radio frequency chips which fail under certain specific transmitting powers are screened out; the signal generator is connected with the power distributor, so that the same initial signal is output into a plurality of radio frequency chips to be tested, and the connection structure of the circuit is simpler.
Preferably, the control module includes an i.mx6u development board connected to the plurality of radio frequency chips to be tested and the ethernet switch, and a plurality of ceramic heating plates connected to the i.mx6u development board, where the ceramic heating plates are in one-to-one correspondence with the radio frequency chips to be tested, and each ceramic heating plate provides an aging temperature environment for each radio frequency chip to be tested.
By adopting the technical scheme, the I.MX6U development board is connected with the Ethernet switch, so that the control instruction of the PC control end can be received to generate different transmitting power gains, and the radio frequency chip to be detected is controlled to amplify signals by the transmitting power gains; and meanwhile, the I.MX6U receives a control instruction of the PC control end to control the heating time and the temperature of the ceramic heating sheet, so that ageing environments with different temperatures are simulated, and radio frequency chips with hidden defects are screened out.
Preferably, the power sensing module comprises an attenuator connected with the radio frequency matrix module and a power sensor connected with the attenuator, and the power sensor is connected with the PC control end.
Through adopting above-mentioned technical scheme, through using the attenuator, can reduce the test signal after amplifying to a more suitable level to reduce the influence of noise, also can help reducing the reflection of signal simultaneously, thereby guarantee the effective transmission of signal to power sensor, make power sensor's test result more be close to the true value.
Preferably, the test bench is provided with a plurality of groups of wiring terminals, each group of wiring terminals are identified by the test bench, each group of wiring terminals is connected with a pin of the radio frequency chip to be tested through a signal line, and the test bench is provided with a plurality of groups of wiring terminals.
By adopting the technical scheme, a tester can more accurately and conveniently connect pins of the radio frequency chip, and the efficiency of circuit connection is improved.
Preferably, the connector of the signal wire is an alligator clip connector.
By adopting the technical scheme, the pin connection operation of the radio frequency chip is more convenient.
In summary, the present application includes at least one of the following beneficial technical effects:
1. The PC control end is used for controlling the signal source module to output to the radio frequency chip to be tested according to specific power, meanwhile, the control module is used for adjusting the transmitting power gain and providing an aging temperature environment to simulate a failure environment, and the power sensing module is used for detecting the output power of the radio frequency chip to be tested, so that the radio frequency chip with hidden defects is screened out; in order to improve the efficiency of the test, a mode of testing a plurality of radio frequency chips to be tested at one time is adopted, and test signals output by the radio frequency chips to be tested are routed to a power sensing module through a radio frequency matrix module, so that test results are conveniently obtained in batches, the performance of the radio frequency chips to be tested is evaluated, a maintainer is convenient to select the radio frequency chips with better performance, and the problem that after the RRU after partial maintenance is returned to a customer network for a period of time, faults or failures occur under certain specific transmitting power or specific working temperature, so that the network stability is poor is solved.
2. The scheme is convenient for expanding the quantity of batch tests, and the quantity of ports corresponding to the power distributor, the programmable digital power supply, the radio frequency matrix and the test operation table is increased.
3. The whole test process is simpler, an operator is connected with the chip to be tested, the test can be started after the test parameters are set, and other manual participation is not needed in the aging test process.
4. The hardware cost of the whole scheme of the application is controllable, for example: the signal generator is 5 ten thousand, the power sensor is 1 ten thousand, and the practicality is ensured.
Drawings
Fig. 1 is a schematic diagram of connection relationships among functional modules according to an embodiment of the present application.
Fig. 2 is a schematic distribution diagram of connection terminals of a test console according to an embodiment of the application.
Fig. 3 is a schematic diagram of batch test results displayed on a PC control terminal according to an embodiment of the present application.
Reference numerals illustrate: 1. a power module; 2. a signal source module; 3. a control module; 4. a radio frequency matrix module; 5. a power sensing module; 6. a PC control end; 7. an Ethernet switch; 8. a ceramic heating sheet; 9. and a test operation table.
Detailed Description
The application is described in further detail below with reference to fig. 1-3.
Referring to fig. 1, the radio frequency chip batch aging simulation test system comprises a power supply module, a signal source module, a control module, a radio frequency matrix module, a power sensing module and a PC control end, wherein the power supply module is used for supplying power to a plurality of radio frequency chips to be tested; the signal source module is used for respectively outputting initial communication signals to the four radio frequency chips to be tested; the control module is used for controlling the transmission power gain coefficients of the four radio frequency chips to be tested and providing an aging temperature environment; the radio frequency matrix module is used for being connected with four radio frequency chips to be tested to output a plurality of test signals, wherein the test signals are initial communication signals after passing through the radio frequency chips to be tested; the power sensing module is used for measuring the power of the four test signals and sending the power to the PC control end; the PC control end is used for setting parameters required by testing and receiving power of the test signals so as to judge whether the four radio frequency chips to be tested are qualified or not.
Referring to fig. 1, a PC control terminal is connected to a signal source module, a control module and a power module through an ethernet switch, and a radio frequency matrix module and a power sensing module are directly connected to the PC control terminal.
In this embodiment, the ethernet switch is of the model H3C S1224F; the power module comprises four sets of programmable digital power supplies with model number Agilent E3640A; the signal source module comprises a signal generator connected with the Ethernet switch and a power distributor connected with the signal generator. The signal generator is an R & S VSG vector signal source, and the power divider is a 1:4 power divider.
The control module comprises an I.MX6U development board connected with the four radio frequency chips to be tested and the Ethernet switch, and four groups of ceramic heating plates connected with the I.MX6U development board, wherein the ceramic heating plates provide an aging temperature environment for the four radio frequency chips to be tested. Wherein the configuration of the i.mx6u development board comprises: master control chip i.mx6ull; the passive crystal oscillator is 32.768KHz, and the passive crystal oscillator is 24MHz; FLASH storage 512MB; DDR3L memory 256MB; DC 6-16V power input; four sets of output I/Os; an ethernet port 100M; a direct current input is 12V; debug serial port (USB to TTL) and Boot dial switch.
The radio frequency matrix module selects a total instrument measurement and control 6ports radio frequency switch matrix, and the power sensing module comprises an attenuator connected with the radio frequency matrix module and a power sensor connected with the attenuator. The attenuation amplitude of the attenuator is 40dBm, and the power sensor is selected from R & S NRP-Z11 power sensors. The PC control end adopts a WIN11 operating system, and R & S PowerViewer software is built in to read the power of the power sensor.
Referring to fig. 1, the connection between the modules is specifically as follows:
The PC control end is connected to the Ethernet switch port through a network cable, and the USB interface of the PC control end is respectively connected with the power sensor and the radio frequency matrix module. The PC control end controls the signal generator and the programmable digital power supply through the SCPI interface protocol, and the USBTMC protocol controls the radio frequency matrix module.
The I.MX6U development board is connected to the Ethernet exchanger port through a network cable, and the four groups of output I/O gain ports are respectively connected to lead terminals corresponding to Control terminals on the bottom surface of the test operation table through Control lines, so that the lead terminals are communicated with Control terminals of the radio frequency chip positioned on the top of the test operation table. And I.MX6U direct current output 12V port is connected with the ceramic heating plate.
The M X6U development board is connected with the Ethernet switch, so that control instructions of a PC control end can be received to generate different transmitting power gains, and the radio frequency chip to be detected is controlled to amplify signals according to the transmitting power gains; and meanwhile, the I.MX6U receives a control instruction of the PC control end to control the heating time and the temperature of the ceramic heating sheet, so that ageing environments with different temperatures are simulated, and radio frequency chips with hidden defects are screened out.
The LAN port of the signal generator is connected to the Ethernet exchanger port, the signal output port of the signal generator is connected to the input port of the power distributor through a 50 ohm radio frequency wire, and the radio frequency wire joint is Din-SMA.
The four output ports of the power distributor are respectively connected with the RF input ports of the four radio frequency chips to be tested through 50 ohm radio frequency wires, and the radio frequency wire joints are SMA-crocodile clamps.
The PC control end outputs initial signals with different powers through the Ethernet switch control signal generator, so that radio frequency chips which fail under certain specific transmitting powers are screened out; the signal generator is connected with the power distributor, so that the same initial signal is output into a plurality of radio frequency chips to be tested, and the connection structure of the circuit is simpler.
The four groups of programmable digital power supplies are connected to the Ethernet switch port through network cables, and the positive pole, the negative pole and the grounding end of the direct current output terminal of each programmable digital power supply are respectively connected to terminals of the bottom surface of the test operation table corresponding to Vcc, vee and GND.
The RF output ends of the four radio frequency chips to be tested are connected with the input end of the radio frequency matrix module through 50 ohm radio frequency wires, and the radio frequency wire joints are crocodile clips-SMAs.
The output end of the radio frequency matrix module is connected with the input end of the attenuator through a radio frequency line, and the output end of the attenuator is connected to the power sensor through a radio frequency line.
By using the attenuator, the amplified test signal can be reduced to a more proper level, thereby reducing the influence of noise, and simultaneously helping to reduce the reflection of the signal, thereby ensuring the effective transmission of the signal to the power sensor and enabling the test result of the power sensor to be closer to a true value.
Referring to fig. 2, in addition, the test bench is further included for carrying four radio frequency chips to be tested. The test operation table is provided with four groups of wiring terminals, each group of wiring terminals comprises Control, GND, vcc, vee four terminals, and the four terminals respectively correspond to Control, GND, vcc, vee four pins of the radio frequency chip to be tested. Each group of terminal is connected with the pins of the radio frequency chip to be tested in a one-to-one correspondence manner through crocodile clip signal wires.
During testing, the PA chip and all testing environments are connected and powered on, built-in management software is opened through a PC control end, configuration parameters of the corresponding model of the radio frequency chip to be tested are selected, and ageing duration, heating temperature and gain coefficient are set. The direct current voltages required by the radio frequency chips of different models are different, so that the accurate test can be ensured only by selecting the configuration parameters of the corresponding models.
After parameters are configured, clicking a management software interface to start testing, and stopping transmitting power due to faults if the radio frequency chip to be tested is internally short-circuited or open-circuited, wherein a power sensor has no detection value; if the transmitting state is unstable, the transmitting power of the transmitting device fluctuates, and the power sensor detects the fluctuation value; and the PC control end judges whether the state of the radio frequency chip to be detected is normal or fault or critical according to the detection value reported by the power sensor.
Referring to fig. 3, after the test is completed, the PC control end displays the test results of the four radio frequency chips to be tested through different colors, for example:
Green indicates that the PA chip is in a normal state;
The red color indicates that the PA chip is in a fault state, and the system does not detect the transmitting power at this time;
yellow indicates that the PA chip is in a critical state when the power change exceeds the rated power ± 5dBm.
The implementation principle of the application is as follows: the PC control end is used for controlling the signal source module to output to the radio frequency chip to be tested according to specific power, meanwhile, the control module is used for adjusting the transmitting power gain and providing an aging temperature environment to simulate a failure environment, and the power sensing module is used for detecting the output power of the radio frequency chip to be tested, so that the radio frequency chip with hidden defects is screened out; in order to improve the efficiency of the test, a mode of testing a plurality of radio frequency chips to be tested at one time is adopted, and test signals output by the radio frequency chips to be tested are routed to a power sensing module through a radio frequency matrix module, so that test results are conveniently obtained in batches, the performance of the radio frequency chips to be tested is evaluated, a maintainer is convenient to select the radio frequency chips with better performance, and the problem that after the RRU after partial maintenance is returned to a customer network for a period of time, faults or failures occur under certain specific transmitting power or specific working temperature, so that the network stability is poor is solved.
The above embodiments are not intended to limit the scope of the present application, so: all equivalent changes in structure, shape and principle of the application should be covered in the scope of protection of the application.
Claims (8)
1. A radio frequency chip batch aging simulation test system is characterized in that: the system comprises a power module, a signal source module, a control module, a radio frequency matrix module, a power sensing module and a PC control end, wherein:
the power module is used for supplying power to the plurality of radio frequency chips to be tested;
the signal source module is used for respectively outputting initial communication signals to the plurality of radio frequency chips to be tested;
The control module is used for controlling the transmission power gain coefficients of the radio frequency chips to be tested and providing an aging temperature environment; the radio frequency matrix module is used for being connected with a plurality of radio frequency chips to be tested to output a plurality of test signals, wherein the test signals are the initial communication signals after passing through the radio frequency chips to be tested;
the power sensing module is used for measuring the power of a plurality of test signals and sending the power to the PC control end;
and the PC control end is used for setting parameters required by the test and receiving the power of the test signals to judge whether the radio frequency chips to be tested are qualified or not.
2. The system for batch burn-in simulation testing of radio frequency chips of claim 1, wherein: the PC control end is connected with the signal source module, the control module and the power supply module through the Ethernet switch, and the radio frequency matrix module and the power sensing module are directly connected with the PC control end.
3. The system for batch burn-in simulation testing of radio frequency chips of claim 2, wherein: the power module comprises a plurality of programmable digital power supplies, each programmable digital power supply is connected with each radio frequency chip to be tested, and each programmable digital power supply is connected with the Ethernet switch.
4. The system for batch burn-in simulation testing of radio frequency chips of claim 2, wherein: the signal source module comprises a signal generator connected with the Ethernet switch and a power distributor connected with the signal generator, and the power distributor is connected with the input ends of the radio frequency chips to be tested.
5. The system for batch burn-in simulation testing of radio frequency chips of claim 2, wherein: the control module comprises an I.MX6U development board connected with the radio frequency chips to be tested and the Ethernet switch, and a plurality of ceramic heating plates connected with the I.MX6U development board, wherein the ceramic heating plates correspond to the radio frequency chips to be tested one by one, and each ceramic heating plate provides an aging temperature environment for each radio frequency chip to be tested.
6. The system for batch burn-in simulation testing of radio frequency chips of claim 1, wherein: the power sensing module comprises an attenuator connected with the radio frequency matrix module and a power sensor connected with the attenuator, and the power sensor is connected with the PC control end.
7. The system for batch burn-in simulation testing of radio frequency chips of claim 1, wherein: the test operation table is provided with a plurality of groups of wiring terminals, each group of wiring terminals are identified by the test operation table, and each group of wiring terminals is connected with a pin of the radio frequency chip to be tested through a signal wire.
8. The system for batch burn-in simulation testing of radio frequency chips of claim 7, wherein: the joint of the signal wire is an alligator clip joint.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322608443.6U CN220823083U (en) | 2023-09-25 | 2023-09-25 | Radio frequency chip batch aging simulation test system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322608443.6U CN220823083U (en) | 2023-09-25 | 2023-09-25 | Radio frequency chip batch aging simulation test system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220823083U true CN220823083U (en) | 2024-04-19 |
Family
ID=90700476
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322608443.6U Active CN220823083U (en) | 2023-09-25 | 2023-09-25 | Radio frequency chip batch aging simulation test system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220823083U (en) |
-
2023
- 2023-09-25 CN CN202322608443.6U patent/CN220823083U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110268277B (en) | Functionality tester for printed circuit boards, and related systems and methods | |
| CN101206601B (en) | I/o port testing device | |
| CN115932540B (en) | Multi-channel multifunctional chip testing machine and testing method | |
| WO2006068937A2 (en) | A method and system for producing signals to test semiconductor devices | |
| US11320480B1 (en) | Scalable tester for testing multiple devices under test | |
| CN111948520A (en) | Multi-path real-time monitoring power supply system for aging test and test method | |
| CN106936495A (en) | The automatic testing equipment and method of a kind of smooth transceiving chip | |
| CN115856588B (en) | Chip test board and test method | |
| CN111830376A (en) | Comprehensive detection platform for distributor | |
| CN110967623B (en) | ICT (information communication technology) extension fixture for testing number of pins of PCBA (printed circuit board assembly) board and testing method | |
| CN208424379U (en) | The test device of the antenna of electronic equipment | |
| CN220823083U (en) | Radio frequency chip batch aging simulation test system | |
| CN112711504B (en) | Test system and test method | |
| CN219871718U (en) | Power supply test system | |
| CN218445837U (en) | Aging board and chip aging test system | |
| CN116489054A (en) | FPGA-based CoaXPress link performance detection method and system | |
| CN111693754B (en) | Device, equipment and method for detecting PIN voltage of communication module | |
| CN208125894U (en) | A kind of General Relay comprehensive parameter tester | |
| CN210835147U (en) | Modular function board card measuring platform | |
| CN114280520A (en) | Digital channel multi-parameter parallel calibration device of integrated circuit test system | |
| CN113281639A (en) | Board card testing device, system and method | |
| CN117607546B (en) | Multi-channel high-speed high-resistance measurement system and measurement method | |
| CN112415253A (en) | Circuit and system for testing working current of circuit board | |
| CN106526459B (en) | High-performance radio frequency remote control automatic test system and method thereof | |
| CN217133293U (en) | Control cable line inspection test system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |