CN220796716U

CN220796716U - Semiconductor packaging structure

Info

Publication number: CN220796716U
Application number: CN202322465995.6U
Authority: CN
Inventors: 何正鸿; 郭少丽; 何林
Original assignee: Forehope Electronic Ningbo Co Ltd
Current assignee: Forehope Electronic Ningbo Co Ltd
Priority date: 2023-09-11
Filing date: 2023-09-11
Publication date: 2024-04-16
Anticipated expiration: 2033-09-11

Abstract

The utility model provides a semiconductor packaging structure, which relates to the technical field of semiconductor packaging, and comprises a lead frame, a first chip, a second chip and a plastic package body, wherein a base island is arranged on the lead frame, through holes are formed in at least two sides of the base island, and a structural boss is arranged on the side wall of the base island; the first chip is attached to one side surface of the base island and is electrically connected with the lead frame; the second chip is attached to the surface of the other side of the base island and is electrically connected with the lead frame; the plastic package body is arranged on the two side surfaces of the lead frame and wraps the first chip and the second chip. Compared with the prior art, the utility model has the advantages that through the arrangement of the through holes, the two sides of the lead frame can be directly conducted to flow plastic packaging materials, the double-sided plastic packaging can be realized through a one-time plastic packaging process during plastic packaging, the plastic packaging efficiency is greatly improved, and meanwhile, the side wall of the base island is additionally provided with the structural boss, so that the plastic packaging binding force is improved, and the quality of packaged products is ensured.

Description

Semiconductor packaging structure

Technical Field

The utility model relates to the technical field of semiconductor packaging, in particular to a semiconductor packaging structure.

Background

Along with the rapid development of the semiconductor industry, the power device is usually packaged by adopting a lead frame, the integration level of the conventional double-sided mounted chip product is designed so as to improve the performance of the product, each design company is researching and developing the high-speed communication of the chip, and the conventional double-sided chip product needs to be subjected to a secondary plastic packaging process, namely, the two sides of the product are respectively subjected to plastic packaging, so that the cost and the efficiency are low. And the plastic package binding force after plastic package at two sides is poor, and peeling and other phenomena are easy to occur, so that the quality of packaged products is influenced.

Disclosure of Invention

The utility model aims to provide a semiconductor packaging structure which can realize double-sided plastic packaging by adopting one-time plastic packaging, improve efficiency, improve plastic packaging binding force and improve quality of packaged products.

Embodiments of the present utility model are implemented as follows:

in a first aspect, the present utility model provides a semiconductor package structure, comprising:

the lead frame is provided with a base island, at least two sides of the base island are provided with through holes, and the side wall of the base island is provided with a structural boss;

the first chip is attached to one side surface of the base island and is electrically connected with the lead frame;

the second chip is attached to the surface of the other side of the base island and is electrically connected with the lead frame;

the plastic package body is arranged on the two side surfaces of the lead frame, the first chip and the second chip are covered in the plastic package body, and the plastic package body extends to the through hole and is covered outside the structural boss.

In an alternative embodiment, the structural boss is disposed in the middle of the sidewall of the base island and protrudes toward the center of the through hole.

In an alternative embodiment, the structural boss is in the shape of an arc or a rectangular block.

In an alternative embodiment, the semiconductor package structure further includes:

the third chip is arranged on one side surface of the first chip, which is far away from the lead frame, in a staggered manner with the first chip;

the fourth chip is attached to the surface of one side, far away from the lead frame, of the second chip and is arranged in a staggered manner with the second chip;

wherein, the third chip and the fourth chip are both coated in the plastic package body.

In an optional embodiment, the third chip and the fourth chip both correspond to the through holes on one side of the base island, and a conductive column is further disposed on the third chip, and the conductive column penetrates through the corresponding through hole and is connected with the fourth chip, so that the third chip and the fourth chip are electrically connected.

In an alternative embodiment, the first chip and the second chip are symmetrically arranged on two side surfaces of the base island, and the third chip and the fourth chip are symmetrically arranged.

In an alternative embodiment, a surface of the first chip on a side far from the base island is provided with a first connecting wire, and the first connecting wire spans the through hole on the side of the base island and is connected with the lead frame;

and a second connecting wire is arranged on the surface of one side, far away from the base island, of the second chip, and spans the through hole on one side of the base island and is connected with the lead frame.

In an optional embodiment, a first heat sink is further attached to a surface of the third chip, which is far away from the lead frame, and the first heat sink extends to the lead frame and is wrapped in the plastic package.

In an optional embodiment, a second heat sink is further attached to a surface of the side, away from the lead frame, of the fourth chip, and the second heat sink extends to the lead frame and is wrapped in the plastic package.

In an alternative embodiment, the first heat sink and the second heat sink are both in a bent structure, and the first heat sink and the second heat sink are respectively connected to the lead frames on two sides of the base island.

The embodiment of the utility model has the beneficial effects that:

according to the semiconductor packaging structure provided by the embodiment of the utility model, the base island is arranged on the lead frame, the through holes are arranged on at least two sides of the base island, the side wall of the base island is provided with the structural boss, the structural boss is positioned in the through hole, the first chip and the second chip are attached to the surfaces of two sides of the base island, then a plastic package body is formed on the surfaces of two sides of the lead frame by adopting a one-time plastic package process, and the plastic package body wraps the first chip and the second chip and extends to the through holes to wrap the structural boss. Compared with the prior art, the utility model has the advantages that through the arrangement of the through holes, the two sides of the lead frame can be directly conducted to flow plastic packaging materials, the double-sided plastic packaging can be realized through a one-time plastic packaging process during plastic packaging, the plastic packaging efficiency is greatly improved, meanwhile, the side wall of the base island is additionally provided with the structural boss, and the contact area between the base island and the plastic packaging body can be increased through the structural boss, so that the plastic packaging binding force is improved, the plastic packaging body is prevented from peeling, and the quality of packaged products is ensured.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic diagram of a semiconductor package structure according to an embodiment of the present utility model;

fig. 2 is a flow chart illustrating the fabrication of the semiconductor package structure of fig. 1.

Icon:

100-a semiconductor package structure; 110-a lead frame; 111-through holes; 113-structural bosses; 120-a first chip; 121-a first connection line; 130-a second chip; 131-a second connecting line; 140-plastic package body; 150-a third chip; 151-conductive posts; 160-a fourth chip; 170-a first heat sink; 190-second heat sink.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. The components of the embodiments of the present utility model generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the utility model, as presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.

In the description of the present utility model, it should be noted that, directions or positional relationships indicated by terms such as "center", "upper", "lower", "right", "left", "vertical", "horizontal", "inner", "outer", etc., are directions or positional relationships based on those shown in the drawings, or are directions or positional relationships conventionally put in use of the inventive product, are merely for convenience of describing the present utility model and simplifying the description, and are not indicative or implying that the apparatus or element to be referred to must have a specific direction, be constructed and operated in a specific direction, and thus should not be construed as limiting the present utility model. Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.

Furthermore, the terms "horizontal," "vertical," and the like do not denote a requirement that the component be absolutely horizontal or overhang, but rather may be slightly inclined. As "horizontal" merely means that its direction is more horizontal than "vertical", and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.

In the description of the present utility model, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present utility model will be understood in specific cases by those of ordinary skill in the art.

First embodiment

Referring to fig. 1, in a first aspect, the present utility model provides a semiconductor package structure 100, which can realize double-sided plastic packaging by one-time plastic packaging, thereby improving efficiency, improving bonding force of plastic packaging, and improving quality of packaged products.

The semiconductor package structure 100 provided in this embodiment includes a lead frame 110, a first chip 120, a second chip 130, and a plastic package body 140, wherein a base island is disposed on the lead frame 110, through holes 111 are disposed on at least two sides of the base island, and a structural boss 113 is disposed on a side wall of the base island; the first chip 120 is attached to one side surface of the base island and is electrically connected to the lead frame 110; the second chip 130 is attached to the other surface of the base island and is electrically connected with the lead frame 110; the plastic package body 140 is disposed on two side surfaces of the lead frame 110, and encapsulates the first chip 120 and the second chip 130, and the plastic package body 140 extends to the through hole 111 and encapsulates the structural boss 113.

In this embodiment, through holes 111 are disposed on two sides of the base island, the sizes of the first chip 120 and the second chip 130 are smaller than those of the base island, the first chip 120 and the second chip 130 are respectively attached to two side surfaces of the base island, and the plastic package body 140 is coated on two sides of the middle area of the lead frame 110, and the first chip 120, the second chip 130 and the structural boss 113 are coated. This implementation force is through setting up through-hole 111 for the both sides of lead frame 110 frame can directly switch on and supply the plastic envelope material to flow, can realize the double-sided plastic envelope through a plastic envelope technology when the plastic envelope, has promoted plastic envelope efficiency by a wide margin, adds structure boss 113 at the lateral wall of base island simultaneously, can increase the area of contact with plastic envelope body 140 through this structure boss 113 to promote plastic envelope cohesion, avoid plastic envelope body 140 to appear peeling off the phenomenon, guaranteed the quality of encapsulation product.

In the present embodiment, the structural boss 113 is provided in the middle of the sidewall of the base island and protrudes toward the center of the through hole 111. Specifically, the structural bosses 113 are disposed at both sides of the base island, the structural bosses 113 may be formed by a secondary etching process, and a stepped structure is formed at the inner side, and the detailed forming process of the structural bosses 113 is not described herein too much. By protruding the structural boss 113 toward the center of the through hole 111, the structural boss 113 after plastic packaging can be laterally inserted into the plastic packaging body 140, thereby improving the bonding force between the plastic packaging body 140 and the lead frame 110.

In this embodiment, the structural boss 113 has an arc shape or a rectangular block shape. Preferably, the structural boss 113 has a rectangular block shape, the manufacturing process thereof is simple, and the contact area with the plastic package body 140 can be further increased, thereby further increasing the coupling force. In this embodiment, the structural boss 113 is formed by an etching process, so that a portion of the copper material of the island is removed, thereby reducing the copper residue rate of the lead frame 110 in the package structure, and further reducing the thermal expansion coefficient and young's modulus of the chip and the bottom region of the lead frame 110, so that the chip and the lead frame are more matched. The influence of the residual copper rate of the lead frame 110 on the chip is reduced, the filling material of the plastic package body 140 adopts silicon oxide, the thermal expansion coefficient of the plastic package body 140 is closer to that of the chip material, and the problem that the adhesive layer at the bottom of the chip and the lead frame 110 are easy to delaminate in the prior art is solved.

Further, the semiconductor package structure 100 further includes a third chip 150 and a fourth chip 160, and the second chip 130 is disposed on a surface of the first chip 120 far from the leadframe 110, and is offset from the first chip 120; the fourth chip 160 is attached to a surface of the second chip 130, which is far away from the lead frame 110, and is arranged in a dislocation manner with the second chip 130; the third chip 150 and the fourth chip 160 are both encapsulated in the plastic package 140. By providing the third chip 150 and the fourth chip 160, the number of integrated chip packages can be increased, and thus the package integration level can be improved, contributing to miniaturization of the device. In addition, the third chip 150 and the first chip 120 are arranged in a staggered manner, and the fourth chip 160 and the second chip 130 are arranged in a staggered manner, so that not only can the electric connection between the chips be satisfied, but also the first chip 120 and the second chip 130 can be conveniently exposed out of part of the bonding pads, and the electric connection to the lead frame 110 is facilitated.

In this embodiment, the third chip 150 and the fourth chip 160 correspond to the through hole 111 on the side of the island, and the third chip 150 is further provided with a conductive pillar 151, and the conductive pillar 151 penetrates through the corresponding through hole 111 and is connected to the fourth chip 160, so that the third chip 150 and the fourth chip 160 are electrically connected. Specifically, the projection of the third chip 150 on the lead frame 110 and the projection of the fourth chip 160 on the lead frame 110 overlap with the through hole 111, so that the third chip 150 and the fourth chip 160 extend to two sides of the through hole 111 respectively, the third chip 150 and the fourth chip 160 are connected through the conductive column 151, the electrical connection between the chips is realized, and meanwhile, the conductive column 151 also plays a structural supporting role to prevent the third chip 150 and the fourth chip 160 from displacement.

It should be noted that, the conductive column 151 may be a metal column, for example, a copper column, and the metal column and the structural boss 113 have a certain gap therebetween, and the diameter of the metal column is smaller than the width of the through hole 111, so that smooth flow of the molding compound can be ensured, and by providing the structural boss 113, impact of the molding compound on the conductive column 151 can be reduced, so as to protect the conductive column 151.

In this embodiment, the first chip 120 and the second chip 130 are symmetrically disposed on both side surfaces of the island, and the third chip 150 and the fourth chip 160 are symmetrically disposed. By adopting symmetrical arrangement, on one hand, the space utilization rate can be ensured, the integration level is improved, on the other hand, the chip is convenient to paste, and the two sides adopt the same technological parameters to realize the mounting.

In the present embodiment, a surface of the first chip 120 on a side away from the base island is provided with a first connection line 121, and the first connection line 121 crosses the through hole 111 on the base island side and is connected to the lead frame 110; the second chip 130 is provided with a second connection line 131 on a surface of a side thereof remote from the base island, and the second connection line 131 crosses the through hole 111 on the base island side and is connected to the lead frame 110. The electrical connection between the chip and the lead frame 110 is realized by a wire bonding mode, and the wire bonding structures are all covered in the plastic package body 140, so that good protection is obtained.

In the present embodiment, a first heat sink 170 is further attached to a surface of the third chip 150, which is far away from the leadframe 110, and the first heat sink 170 extends to the leadframe 110 and is encapsulated in the plastic package 140. The surface of the side of the fourth chip 160 far away from the lead frame 110 is further adhered with a second heat sink 190, and the second heat sink 190 extends to the lead frame 110 and is wrapped in the plastic package body 140. By providing the first heat sink 170 and the second heat sink 190, a good heat dissipation effect can be achieved on the chip stacking structure from both sides, and heat dissipation on the chip surface can be improved.

In this embodiment, the first heat sink 170 and the second heat sink 190 are both in a bent structure, and the first heat sink 170 and the second heat sink 190 are respectively connected to the lead frames 110 on two sides of the island. In this embodiment, the first heat sink 170 and the second heat sink 190 can be adhered to different positions on two sides of the leadframe 110 through heat-dissipating glue, wherein the first heat sink 170 extends towards the left side of the third chip 150 and is then folded and attached to the leadframe 110 frame, and the second heat sink 190 extends towards the right side of the fourth chip 160 and is then folded and attached to the leadframe 110 frame, and by providing the first heat sink 170 and the second heat sink 190, the back support function and the protection function can be further achieved. In the actual packaging process, due to the fact that the first radiating fins 170 and the second radiating fins 190 are arranged, when the lead frame 110 frame is turned over, the first radiating fins 170 or the second radiating fins 190 can be directly contacted with the carrier, so that a supporting effect is achieved, the back surface of a chip is prevented from being directly contacted with the carrier, the other side process is prevented from being carried out after single-side plastic package protection in the traditional process, and packaging efficiency is greatly improved.

The first heat sink 170 and the second heat sink 190 are made of a heat conductive metal, for example, copper heat sink.

Referring to fig. 2, the semiconductor package structure 100 provided in this embodiment has the following manufacturing process:

first, a lead frame 110 is taken, and the side wall of the base island of the lead frame 110 is provided with a structural boss 113.

Then, the single-sided chip mounting is completed, the first chip 120 is mounted on one side surface of the base island, the wire bonding is completed, the mounting of the third chip 150 is completed, the first heat sink 170 is mounted on the surface of the third chip 150, the bonding between the third chip 150 and the lead frame 110 is completed, and the fixing bonding is realized through a baking process during the mounting.

The leadframe 110 structure is turned over again, and the first heat sink 170 can play a role of backside protection and support, so as to avoid the influence on the stacked structure of the first chip 120 and the third chip 150.

The mounting of the second chip 130, the third chip 150, and the second heat sink 190 is then completed.

And then, the plastic package body 140 is formed by pressure injection molding of plastic package liquid through a plastic package process, the stacked structure is protected by the plastic package body 140, the plastic package body 140 is formed by one-step injection molding, and finally, the lead frame 110 is punched and separated through a punching process. The plastic package body 140 does not completely cover the lead frame 110, and after two ends of the lead frame 110 extend out of the plastic package body 140, pins can be formed, and the pins can be flat pins or bent pins.

In summary, the present embodiment provides a semiconductor package structure 100, a base island is disposed on a lead frame 110, through holes 111 are disposed on at least two sides of the base island, and structural bosses 113 are disposed on the side walls of the base island, the structural bosses 113 are located in the through holes 111, a first chip 120 and a second chip 130 are attached to two side surfaces of the base island, and then a plastic package body 140 is formed on two side surfaces of the lead frame 110 by a one-time plastic package process, wherein the plastic package body 140 wraps the first chip 120 and the second chip 130 and extends to the through holes 111 to wrap the structural bosses 113. Compared with the prior art, the through hole 111 is arranged, so that the two sides of the lead frame 110 frame can be directly conducted to flow plastic packaging materials, double-sided plastic packaging can be realized through a one-time plastic packaging process during plastic packaging, the plastic packaging efficiency is greatly improved, meanwhile, the structural boss 113 is additionally arranged on the side wall of the base island, the contact area with the plastic packaging body 140 can be increased through the structural boss 113, the plastic packaging binding force is improved, the plastic packaging body 140 is prevented from peeling, and the quality of packaged products is guaranteed. Meanwhile, by arranging the first radiating fins 170 and the second radiating fins 190, the radiating capacity is improved on one hand, and on the other hand, the structure supporting function can be achieved, and the stacked chips are protected.

The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.

Claims

1. A semiconductor package structure, comprising:

2. The semiconductor package according to claim 1, wherein the structural boss is disposed in a middle portion of a sidewall of the base island and protrudes toward a center of the through hole.

3. The semiconductor package according to claim 2, wherein the structural boss has a circular arc shape or a rectangular block shape.

4. The semiconductor package according to claim 1, wherein the semiconductor package further comprises:

5. The semiconductor package according to claim 4, wherein the third chip and the fourth chip each correspond to the through hole on the side of the island, and a conductive post is further disposed on the third chip, and the conductive post penetrates through the corresponding through hole and is connected to the fourth chip, so that the third chip and the fourth chip are electrically connected.

6. The semiconductor package according to claim 5, wherein the first chip and the second chip are symmetrically disposed on both side surfaces of the base island, and the third chip and the fourth chip are symmetrically disposed.

7. The semiconductor package according to claim 4, wherein a surface of the first chip on a side away from the base island is provided with a first connection line crossing the through hole on the base island side and connected to the lead frame;

8. The semiconductor package according to claim 4, wherein a first heat sink is further attached to a surface of the third chip away from the leadframe, and the first heat sink extends to the leadframe and is encapsulated in the plastic package.

9. The semiconductor package according to claim 8, wherein a second heat sink is further attached to a surface of the fourth chip away from the leadframe, and the second heat sink extends to the leadframe and is encapsulated in the plastic package.

10. The semiconductor package according to claim 9, wherein the first heat sink and the second heat sink are each of a bent structure, and the first heat sink and the second heat sink are connected to the lead frames on both sides of the island, respectively.