CN220627773U - Wafer support of semiconductor rapid annealing furnace - Google Patents
Wafer support of semiconductor rapid annealing furnace Download PDFInfo
- Publication number
- CN220627773U CN220627773U CN202320918828.XU CN202320918828U CN220627773U CN 220627773 U CN220627773 U CN 220627773U CN 202320918828 U CN202320918828 U CN 202320918828U CN 220627773 U CN220627773 U CN 220627773U
- Authority
- CN
- China
- Prior art keywords
- wafer
- supporting
- support
- annealing furnace
- rod
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000137 annealing Methods 0.000 title claims abstract description 27
- 239000004065 semiconductor Substances 0.000 title claims abstract description 21
- 235000012431 wafers Nutrition 0.000 abstract description 110
- 238000000034 method Methods 0.000 description 8
- 239000012634 fragment Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000000452 restraining effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Landscapes
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The utility model discloses a wafer support of a semiconductor rapid annealing furnace, which comprises a sliding door, a first supporting rod, a second supporting rod, supporting cushion blocks and a wafer tray, wherein the sliding door is matched with a furnace chamber of the annealing furnace, the first supporting rod and the second supporting rod are arranged on the inner side surface of the sliding door facing the furnace chamber, supporting arms are arranged on the first supporting rod and the second supporting rod, the supporting cushion blocks are correspondingly arranged on the supporting arms, the supporting cushion blocks on the first supporting rod and the second supporting rod form a circumferential supporting structure for supporting wafers above the supporting plates, each supporting cushion block is of a block-shaped structure with an upper step and a lower step, a thin wafer is placed at the upper step through the wafer tray, and a thick wafer is placed at the lower step. The utility model can be compatible with processing thick wafer and thin wafer, reduces the breaking rate of thin wafer and protects wafer more perfectly.
Description
Technical Field
The utility model relates to the technical field of semiconductor manufacturing, in particular to a wafer bracket of a semiconductor rapid annealing furnace.
Background
The fabrication of Integrated Circuit (IC) semiconductor devices typically requires heat treating silicon wafers in the presence of a reactive gas. A wafer is a basic material for manufacturing semiconductor chips, and is called a wafer because it has a circular shape. The wafer is placed on a wafer support within the semiconductor device while being processed. The rapid annealing furnace is a process device commonly used in semiconductor wafer manufacturing and is used for heating and rapidly annealing wafers, and the main purposes of the rapid annealing furnace include high-temperature annealing, repairing crystal lattices after ion implantation, activating impurities, oxidizing, nitriding, silicide generation, metal alloying and the like, and the wafers are also in different forms.
With the continuous development of semiconductors, the wafer size is larger and the wafer thickness is thinner, for example, the thinnest 6 inch wafer thickness can reach 100um, and the wafer is easily blown off due to the air flow in the process equipment, and if the reliability of the wafer support is poor, fragments can be possibly caused. Moreover, the existing wafer support structure is generally only suitable for wafers of one specification, which is not beneficial to the wide use of the equipment.
Disclosure of Invention
The applicant provides a wafer support of a semiconductor rapid annealing furnace, which aims at the defects that the stability and the safety of a thin wafer are poor, fragments are possibly caused, the wafer support can only be applied to wafers of one specification and the like in the wafer support of the conventional semiconductor rapid annealing furnace, can be used for compatibly processing thick wafers and thin wafers, reduces the breakage rate of the thin wafers, and protects the wafers more perfectly.
The technical scheme adopted by the utility model is as follows:
the utility model provides a quick annealing stove wafer support of semiconductor, including the push-and-pull door, first bracing piece, the second bracing piece, supporting pad and wafer tray, the push-and-pull door cooperates with the furnace chamber of annealing stove, be equipped with first bracing piece and second bracing piece on the medial surface of push-and-pull door towards the furnace chamber, be equipped with the support arm on first bracing piece and second bracing piece, the correspondence is equipped with supporting pad on the support arm, the supporting pad on first bracing piece and the second bracing piece forms the circumference bearing structure of supporting the top wafer, every supporting pad is the block structure that has two steps from top to bottom, thin slice wafer is placed in upper step department through the wafer tray, thick slice wafer is placed in lower floor step department.
As a further improvement of the above technical scheme:
the first support rod and the second support rod are arranged in parallel and face the interior of the furnace chamber.
The number of the support cushion blocks on the first support rod and the second support rod is 3, the first support rod is provided with 1 support arm and a corresponding support cushion block, and the second support rod is provided with 2 support arms and a corresponding support cushion block; the 3 support pads form three support points on the same circumference, which together form a circumferential support structure for supporting the wafer above.
The total number of the support cushion blocks on the first support rod and the second support rod is more than 3, and the support cushion blocks are all positioned on the same circumference for supporting the wafer above.
The upper and lower steps of the support cushion block are positioned on the stepped slope, the slope surface is arranged above the upper step, and the slope surface is arranged between the upper step and the lower step.
The wafer tray is placed at the upper step from the upper slope surface of the upper step.
The thick wafer is placed at the lower step from the slope surface between the upper and lower steps.
The wafer tray is of an annular structure, and an inner step for supporting and limiting the placed thin wafer is arranged on the inner circumference of the wafer tray.
The thermocouple is arranged on the inner side surface of the sliding door, extends into the furnace chamber from the inner side surface of the sliding door and reaches the position below the thin wafer or the thick wafer.
The number of the thermocouples is more than two.
The beneficial effects of the utility model are as follows:
the supporting cushion blocks on the two supporting rods are provided with two stages of steps, the lower stage step is used for placing thicker wafers, the upper stage step is used for placing a tray for placing thinner wafers, the function of supporting the tray for thin wafers can be compatible, thick wafers and thin wafers can be processed, and the breaking rate of the thin wafers can be reduced. The two steps of the two supporting rods can accommodate wafers with various thicknesses, the stability and the safety of the wafer tray in the transmission process of the sliding door are ensured, the fragment rate is reduced, and the thermocouple can detect the process temperature in real time. The utility model has simple structure and high reliability, and protects the wafer more perfectly.
Drawings
FIG. 1 is a schematic diagram of the present utility model.
Fig. 2 is a schematic view of a wafer placed according to the present utility model.
FIG. 3 is a schematic diagram of the present utility model for placing a thick wafer.
Fig. 4 is a schematic view of a second support bar according to the present utility model.
Fig. 5 is an enlarged schematic view of a portion a of fig. 4.
In the figure: 1. a sliding door; 2. a first support bar; 3. a second support bar; 4. supporting cushion blocks; 5. a wafer tray; 6. bao Pianjing round; 7. a thick wafer; 8. and a thermocouple.
Detailed Description
The following describes specific embodiments of the present utility model with reference to the drawings.
As shown in fig. 1 to 5, the wafer support of the semiconductor rapid annealing furnace comprises a sliding door 1, a first supporting rod 2, a second supporting rod 3, a supporting cushion block 4, a wafer tray 5 and a thermocouple 8, wherein the sliding door 1 is a sealing door matched with a furnace chamber of the annealing furnace, and the sliding door 1 is hermetically connected with the furnace chamber to form an annealing process chamber when being closed. The inner side surface of the sliding door 1, which faces the furnace chamber, is provided with a first supporting rod 2 and a second supporting rod 3 which are parallel in parallel, and the first supporting rod 2 and the second supporting rod 3 face the inside of the furnace chamber and are arranged along the length direction of the furnace chamber. The first support rod 2 and the second support rod 3 are provided with support arms, and the support arms are correspondingly provided with support cushion blocks 4. The number of the support cushion blocks 4 on the first support rod 2 and the second support rod 3 is 3, preferably, 1 support arm and 1 corresponding support cushion block 4 are arranged on the first support rod 2, and 2 support arms and 2 corresponding support cushion blocks 4 are arranged on the second support rod 3. The 3 supporting pads 4 arranged on the first supporting rod 2 and the second supporting rod 3 form three supporting points positioned on the same circumference, and together form a circumferential supporting structure for supporting the wafer above.
As an embodiment, the total number of the support pads 4 on the first support bar 2 and the second support bar 3 is more than 3, and the support pads are all positioned on the same circumference for supporting the wafer above.
The circumferential support structures formed by the support pads 4 on the first support bar 2 and the second support bar 3 may be adapted to support both the wafer 6 and the wafer 7.
Each supporting cushion block 4 is of a block-shaped structure with an upper step and a lower step, and the upper step and the lower step of the supporting cushion block 4 are positioned on a stepped slope. The upper part of the upper step is a slope surface, the upper step is a horizontal surface, a slope surface is arranged between the upper step and the lower step, and the lower step is a horizontal surface. The first support rod 2 and the second support rod 3 support the wafer tray 5 by means of the upper steps through the circumferential support structures formed by the support cushion blocks 4, the wafer 6 is placed in the wafer tray 5, the wafer tray 5 is placed at the upper steps, and the upper slope surface of the upper steps is convenient for placing the wafer tray 5. The first support rod 2 and the second support rod 3 directly support the thick wafer 7 by means of each lower step through a circumferential support structure formed by the support cushion blocks 4, and a slope surface between the upper and lower steps is convenient for placing the thick wafer 7.
The wafer tray 5 has an annular structure, and an inner step for supporting is provided on the inner circumference of the wafer tray 5 for supporting and restraining the wafer 6. Since the wafer 6 is very thin and light, it is easily blown away by wind or air flow, and thus is restrained and carried by the wafer tray 5.
The inner side surface of the sliding door 1 is positioned below the first supporting rod 2 and the second supporting rod 3, more than two thermocouples 8 are preferably arranged, and the thermocouples 8 extend from the inner side surface of the sliding door 1 to the inside of the furnace chamber, reach the lower part of the position of the wafer and are parallel to the first supporting rod 2 and the second supporting rod 3. The thermocouple 8 is connected to an external circuit for detecting the temperatures of the wafer 6 and the wafer 7 and the furnace chamber.
When the wafer processing device is implemented, when the wafer 6 is operated, the wafer 6 is placed in the wafer tray 5 in advance, the wafer tray 5 is conveyed by a manipulator, the wafer tray 5 is placed on the first support rod 2 and the second support rod 3, and the wafer tray 5 is placed on the upper step of the support cushion block 4 on the first support rod 2 and the second support rod 3 because the extension of the wafer tray 5 is larger than the diameters of the wafer 6 and the thick wafer 7, and then the sliding door 1 enters a cavity through a driving device to perform process reaction.
When the thick wafer 7 is operated, the thick wafer 7 is carried by a manipulator, so that the thick wafer 7 is placed on the first supporting rod 2 and the second supporting rod 3, and the thick wafer 7 is placed on the lower step of the supporting cushion block 4 on the first supporting rod 2 and the second supporting rod 3 because the diameter of the thick wafer 7 is smaller than that of the wafer tray 5, and then the sliding door 1 enters the cavity through the driving device to perform process reaction.
The wafer support adopted by the utility model uses the double-layer step support frame, can be compatible with wafers with various thicknesses, saves cost and space, uses a tray structure for thin wafers, and reduces the fragment rate of the thin wafers. For the accompanying air flow in the process machine, the wafer tray is used to make the wafer not easy to be influenced by the air flow.
The two steps of the two supporting rods can accommodate wafers with various thicknesses, the stability and the safety of the wafer tray in the transmission process of the sliding door are ensured, the fragment rate is reduced, and the thermocouple can detect the process temperature in real time. The utility model has simple structure and high reliability, and protects the wafer more perfectly.
The above description is illustrative of the utility model and is not intended to be limiting, and the utility model may be modified in any form without departing from the spirit of the utility model.
Claims (10)
1. A wafer support of a semiconductor rapid annealing furnace is characterized in that: including push-and-pull door (1), first bracing piece (2), second bracing piece (3), supporting pad (4) and wafer tray (5), push-and-pull door (1) and the cooperation of furnace chamber of annealing stove are equipped with first bracing piece (2) and second bracing piece (3) on push-and-pull door (1) towards the medial surface of furnace chamber, be equipped with the support arm on first bracing piece (2) and second bracing piece (3), correspond on the support arm and be equipped with supporting pad (4), supporting pad (4) on first bracing piece (2) and the second bracing piece (3) form the circumference bearing structure of supporting the upper wafer, every supporting pad (4) is for having the block-shaped structure of upper and lower two steps, thin slice wafer (6) are placed in upper step department through wafer tray (5), thick slice wafer (7) are placed in lower floor step department.
2. The rapid semiconductor annealing furnace wafer support according to claim 1, wherein: the first supporting rod (2) and the second supporting rod (3) are arranged in parallel, and the first supporting rod (2) and the second supporting rod (3) face the inner part of the furnace chamber.
3. The rapid semiconductor annealing furnace wafer support according to claim 1, wherein: the number of the support cushion blocks (4) on the first support rod (2) and the second support rod (3) is 3, 1 support arm and the corresponding support cushion block (4) are arranged on the first support rod (2), and 2 support arms and the corresponding support cushion block (4) are arranged on the second support rod (3); the 3 supporting cushion blocks (4) form three supporting points positioned on the same circumference, and together form a circumferential supporting structure for supporting the wafer above.
4. The rapid semiconductor annealing furnace wafer support according to claim 1, wherein: the total number of the support cushion blocks (4) on the first support rod (2) and the second support rod (3) is more than 3, and the support cushion blocks are all positioned on the same circumference for supporting the wafer above.
5. The rapid semiconductor annealing furnace wafer support according to claim 1, wherein: the upper and lower steps of the support cushion block (4) are positioned on a ladder-shaped slope, the upper part of the upper step is a slope surface, and a slope surface is arranged between the upper step and the lower step.
6. The rapid annealing furnace wafer support according to claim 5, wherein: the wafer tray (5) is placed at the upper step from the upper slope surface of the upper step.
7. The rapid annealing furnace wafer support according to claim 5, wherein: the thick wafer (7) is placed at the lower step from the slope surface between the upper step and the lower step.
8. The rapid semiconductor annealing furnace wafer support according to claim 1, wherein: the wafer tray (5) is of an annular structure, and an inner step for supporting and limiting the wafer (6) is arranged on the inner circumference of the wafer tray (5).
9. The rapid semiconductor annealing furnace wafer support according to claim 1, wherein: the inner side surface of the sliding door (1) is provided with a thermocouple (8), and the thermocouple (8) extends from the inner side surface of the sliding door (1) to the interior of the furnace chamber to reach the lower part of the position of the thin wafer (6) or the thick wafer (7).
10. The rapid annealing furnace wafer support according to claim 9, wherein: the number of thermocouples (8) is more than two.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202320918828.XU CN220627773U (en) | 2023-04-21 | 2023-04-21 | Wafer support of semiconductor rapid annealing furnace |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202320918828.XU CN220627773U (en) | 2023-04-21 | 2023-04-21 | Wafer support of semiconductor rapid annealing furnace |
Publications (1)
Publication Number | Publication Date |
---|---|
CN220627773U true CN220627773U (en) | 2024-03-19 |
Family
ID=90211820
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202320918828.XU Active CN220627773U (en) | 2023-04-21 | 2023-04-21 | Wafer support of semiconductor rapid annealing furnace |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN220627773U (en) |
-
2023
- 2023-04-21 CN CN202320918828.XU patent/CN220627773U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3125199B2 (en) | Vertical heat treatment equipment | |
JP5043826B2 (en) | Substrate processing apparatus and semiconductor device manufacturing method | |
KR100290047B1 (en) | Heat Treatment Boat | |
JP4887293B2 (en) | Substrate processing apparatus, substrate manufacturing method, semiconductor device manufacturing method, and substrate processing method | |
US6423556B1 (en) | Method for evaluating impurity concentrations in heat treatment furnaces | |
TW201142951A (en) | Heat treatment apparatus and method of manufacturing semiconductor device | |
CN220627773U (en) | Wafer support of semiconductor rapid annealing furnace | |
JP3188967B2 (en) | Heat treatment equipment | |
KR100364101B1 (en) | Heat treatment method | |
US8172950B2 (en) | Substrate processing apparatus and semiconductor device producing method | |
CN116825681A (en) | Heat treatment method and heat treatment device | |
JP4281447B2 (en) | Manufacturing method of semiconductor device | |
US4256052A (en) | Temperature gradient means in reactor tube of vapor deposition apparatus | |
JP2004281674A (en) | Heat treatment equipment and process for producing substrate | |
JP2006080294A (en) | Method of manufacturing substrate | |
JPH02151035A (en) | Buried-in diffusion process in bipolar ic manufacture | |
JP2005086132A (en) | Heat treating apparatus, manufacturing method of semiconductor device, manufacturing method of substrate, and treating method of substrate | |
CN101414570B (en) | Semiconductor technology method and semiconductor device system | |
JP2006100303A (en) | Substrate manufacturing method and heat treatment apparatus | |
JP2001358136A (en) | Method for heat-treating semiconductor wafer | |
CN116721963A (en) | Annealing furnace and annealing equipment | |
JPH02272725A (en) | Wafer holding device, wafer carrying-in/out method using this device, and vertical wafer boat used primarily for this carrying-in/out method | |
JPWO2004001835A1 (en) | Heat treatment apparatus, substrate manufacturing method, and semiconductor device manufacturing method | |
JP2005209723A (en) | Substrate treatment device | |
JP2008078459A (en) | Substrate treating device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |