CN220525036U

CN220525036U - Circuit for real-time acquisition of flow computer

Info

Publication number: CN220525036U
Application number: CN202322223207.2U
Authority: CN
Inventors: 马秀云; 唐善华; 祁伟; 孟祥岩; 杨树森; 杜朝晖; 张岩; 李伟; 郭民; 郭婧; 赵永辉; 刘亚; 刘建冲; 龚俊; 焦健; 娄娟; 刘鸿凯; 张延超
Original assignee: National Pipe Network Group Beijing Pipeline Co ltd; China Oil and Gas Pipeline Network Corp
Current assignee: National Pipe Network Group Beijing Pipeline Co ltd; China Oil and Gas Pipeline Network Corp
Priority date: 2022-12-30
Filing date: 2023-08-17
Publication date: 2024-02-23
Anticipated expiration: 2033-08-17

Abstract

The application discloses a circuit that flow computer gathered in real time. Comprising the following steps: the singlechip minimum system circuit comprises a singlechip, wherein the singlechip is an STM32F407 chip; the 4-20mA input circuit is connected with the singlechip and comprises a current-voltage conversion circuit, a filter circuit and an AD1248 conversion chip; the 4-20mA output circuit is connected with the singlechip and comprises a DAC8565 chip and a double operational amplifier constant current source circuit; the switching value input circuit is connected with the singlechip and comprises a photoelectric coupling device and a ceramic chip capacitor; the switching value output circuit is connected with the singlechip and comprises a driving device and a photoelectric coupling device; a power supply circuit; the communication interface circuit is connected with the singlechip and comprises a first communication interface circuit and a second communication interface circuit; the pulse input circuit comprises a filter circuit, a driving circuit, a first optical isolator element and a second optical isolator element. The flow meter and the related signals thereof can be acquired, and the calculation precision and the accumulation precision of the flow computer are improved.

Description

Circuit for real-time acquisition of flow computer

Technical Field

The application relates to the technical field of natural gas long-distance pipelines, in particular to a circuit for real-time acquisition of a flow computer.

Background

Real-time online heat value metering of natural gas is a future development trend, and because heat value metering is not adopted, the natural gas flow computer-related products are absent. The flow computer needs to achieve the purpose of real-time acquisition for the acquisition of flow meter signals and other matched measuring instruments and meters so as to ensure the calculation precision and the accumulation precision of the flow computer.

For a long time, the flow computer used by the natural gas long-distance pipeline only supports the flowmeter products of the manufacturer, the same point of each manufacturer is that the acquired information is limited, the detailed state information of the flowmeter cannot be acquired, the communication protocol is not open to the outside, so that a user is difficult to establish a unified metering management platform, and the intelligent development of metering management is limited.

Disclosure of Invention

The purpose of this embodiment of the application is to provide a circuit that flow computer gathered in real time for because flowmeter signal and other measuring instrument signals of supporting can't gather in real time in the solution prior art, thereby lead to flow computer's calculation accuracy and the lower problem of accumulation precision.

To achieve the above object, a first aspect of the present application provides a circuit for real-time collection of a flow computer, applied to the flow computer, the circuit comprising:

The singlechip minimum system circuit comprises a singlechip, wherein the singlechip is an STM32F407 chip;

the 4-20mA input circuit is connected with the singlechip and comprises a current-voltage conversion circuit, a filter circuit and an AD1248 conversion chip which are sequentially connected and is used for inputting voltage signals;

the 4-20mA output circuit is connected with the singlechip and comprises a DAC8565 chip and a double operational amplifier constant current source circuit for outputting voltage signals;

the switching value input circuit is connected with the singlechip and comprises a photoelectric coupling device and a ceramic chip capacitor, and is used for inputting switching value;

the switching value output circuit is connected with the singlechip and comprises a driving device and a photoelectric coupling device, and is used for outputting switching value;

a power supply circuit for supplying power;

the communication interface circuit is connected with the singlechip and comprises a first communication interface circuit and a second communication interface circuit, and is used for equipment communication;

the pulse input circuit comprises a filter circuit, a driving circuit, a first optical isolator element and a second optical isolator element, and is used for connecting pulse signals to the singlechip.

In this embodiment of the present application, the minimum system circuit of the singlechip further includes:

the singlechip power supply module, the crystal oscillator, the reset circuit and the debugging interface are used for running the singlechip;

The crystal oscillator comprises a first crystal oscillator and a second crystal oscillator.

In this embodiment of the application, 17 th, 30 th, 39 th, 52 th, 62 nd, 72 nd, 84 th, 95 th, 108 th, 121 th, 131 th and 144 th pins of the singlechip are connected with a 3.3V power supply, 16 th, 38 th, 51 st, 61 st, 83 rd, 94 th, 107 th, 120 th and 130 th pins are connected with a power supply ground, and a decoupling ceramic chip capacitor is arranged between a 3.3V end of the power supply and a power supply ground end and close to the singlechip pins.

In the embodiment of the application, the minimum system circuit of the singlechip also comprises a real-time clock module and an oscillating circuit, wherein a 6 th pin VBAT of the singlechip is connected with a 3V power supply and is used for ensuring that the real-time clock module keeps working normally when power is lost;

the 25 th pin nRST of the singlechip is connected with a low-level reset signal and is used for ensuring that the singlechip enters a working state after being electrified;

the 23 th pin PH0-OSC-IN and the 24 th pin PH1-OSC-OUT of the singlechip are connected into a first crystal oscillator, and the first crystal oscillator is a high-stability passive crystal oscillator and is used for realizing a singlechip clock by combining an oscillating circuit of the singlechip;

the 8 th pin PC14-OSC32-IN and the 9 th pin PC15-OSC32-OUT of the singlechip are connected into a second crystal oscillator, and the second crystal oscillator is a high-stability passive crystal oscillator and is used for realizing a singlechip clock by combining an oscillating circuit of the singlechip;

The 105 th pin JTMS_SWDIO and the 109 th pin JTCK_SWCLK of the singlechip are respectively connected with a debugging interface and are used for realizing simulation debugging and program downloading of the singlechip.

In the embodiment of the application, the circuit further comprises a double-path isolation power supply, wherein a 1 st pin of an AD1248 conversion chip of the 4-20mA input circuit is connected with a 5V end of the double-path isolation power supply, a 2 nd pin is connected with a ground end of the double-path isolation power supply, a 4 th pin is connected with an AD_RES pin of the single-chip microcomputer, a 5 th pin is connected with an external reference voltage of 1.25V, a 11 th pin is connected with a 4-20mA conversion voltage positive end, a 12 th pin is connected with an external reference voltage of 1.25V so as to form an AD conversion differential input, a 23 rd pin is connected with an AD_START pin of the single-chip microcomputer, a 24 th pin is connected with an AD_CS pin of the single-chip microcomputer, a 26 th pin is connected with an AD_OUT pin of the single-chip microcomputer, a 27 th pin is connected with an AD_DIN pin of the single-chip microcomputer, and a 28 th pin is connected with an AD_SCK pin of the single-chip microcomputer.

In the embodiment of the application, a 16 th pin of a DAC8565 chip of the 4-20mA output circuit is connected with a DA_LDAC pin of the single-chip microcomputer, a 15 th pin is connected with a DA_EN pin of the single-chip microcomputer, a 13 th pin is connected with a DA_RES pin of the single-chip microcomputer, a 11 th pin is connected with a DA_DIN pin of the single-chip microcomputer, a 10 th pin is connected with a DA_SCLK pin of the single-chip microcomputer, and a 9 th pin is connected with a DA_SYNC pin of the single-chip microcomputer.

In the embodiment of the application, the photoelectric coupling devices of the switching value input circuit comprise a first photoelectric coupling device, a second photoelectric coupling device, a third photoelectric coupling device, a fourth photoelectric coupling device, a fifth photoelectric coupling device, a sixth photoelectric coupling device, a seventh photoelectric coupling device and an eighth photoelectric coupling device, and the seventh photoelectric coupling device and the eighth photoelectric coupling device are used for isolating an input switching signal;

the ceramic chip capacitor of the switching value input circuit comprises a first ceramic chip capacitor, a second ceramic chip capacitor, a third ceramic chip capacitor, a fourth ceramic chip capacitor, a fifth ceramic chip capacitor, a sixth ceramic chip capacitor, a seventh ceramic chip capacitor and an eighth ceramic chip capacitor, and is used for filtering;

the first ceramic chip capacitor is arranged between two pins of the first photoelectric coupling device, the second ceramic chip capacitor is arranged between two pins of the second photoelectric coupling device, the third ceramic chip capacitor is arranged between two pins of the third photoelectric coupling device, the fourth ceramic chip capacitor is arranged between two pins of the fourth photoelectric coupling device, the fifth ceramic chip capacitor is arranged between two pins of the fifth photoelectric coupling device, the sixth ceramic chip capacitor is arranged between two pins of the sixth photoelectric coupling device, the seventh ceramic chip capacitor is arranged between two pins of the seventh photoelectric coupling device, and the eighth ceramic chip capacitor is arranged between two pins of the eighth photoelectric coupling device.

In the embodiment of the application, the driving device of the switching value output circuit comprises a first driving device and a second driving device, and the first driving device and the second driving device are all ULN2003 chips;

the photoelectric coupling devices of the switching value output circuit include a ninth photoelectric coupling device, a tenth photoelectric coupling device, an eleventh photoelectric coupling device, a twelfth photoelectric coupling device, a thirteenth photoelectric coupling device, and a fourteenth photoelectric coupling device.

In the embodiment of the application, the first communication interface circuit is an RS-485 interface circuit and comprises a MAX487 chip, wherein a 1 st pin of the MAX487 chip is connected with a USART2_RX pin of the single-chip microcomputer, a 4 th pin of the MAX487 chip is connected with a USART2_TX pin of the single-chip microcomputer, and a 2 nd pin and a 3 rd pin of the MAX487 chip are connected with the USART2_TXEN pin of the single-chip microcomputer.

In this embodiment of the present application, the first communication interface circuit further includes a first communication protection circuit, where the first communication protection circuit includes a first diode, a second diode, and a third diode, which are used for protecting the circuit.

In the embodiment of the application, the second communication interface circuit is an RS-422 high-speed communication interface circuit and comprises a MAX488 chip, wherein the 3 rd pin of the MAX488 chip is connected with the USART4_TX pin of the singlechip, and the 4 th pin is connected with the USART4_RX pin of the singlechip.

In an embodiment of the present application, the second communication interface circuit further includes a second communication protection circuit, where the second communication protection circuit includes a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, and an eighth diode, for protecting the circuit.

Through the technical scheme, the circuit for acquiring the flow rate in real time is applied to the flow rate computer, and comprises a singlechip minimum system circuit, wherein the singlechip minimum system circuit comprises a singlechip which is an STM32F407 chip; the 4-20mA input circuit is connected with the singlechip and comprises a current-voltage conversion circuit, a filter circuit and an AD1248 conversion chip which are sequentially connected and is used for inputting voltage signals; the 4-20mA output circuit is connected with the singlechip and comprises a DAC8565 chip and a double operational amplifier constant current source circuit for outputting voltage signals; the switching value input circuit is connected with the singlechip and comprises a photoelectric coupling device and a ceramic chip capacitor, and is used for inputting switching value; the switching value output circuit is connected with the singlechip and comprises a driving device and a photoelectric coupling device, and is used for outputting switching value; a power supply circuit for supplying power; the communication interface circuit is connected with the singlechip and comprises a first communication interface circuit and a second communication interface circuit, and is used for equipment communication. Based on the circuit, the flowmeter and the related signals thereof can be acquired, so that the calculation precision and the accumulation precision of the flow computer are improved.

Additional features and advantages of embodiments of the present application will be set forth in the detailed description that follows.

Drawings

The accompanying drawings are included to provide a further understanding of embodiments of the present application and are incorporated in and constitute a part of this specification, illustrate embodiments of the present application and together with the description serve to explain, without limitation, the embodiments of the present application. In the drawings:

FIG. 1 schematically illustrates a circuit diagram of a flow computer acquisition in real time according to an embodiment of the present application;

FIG. 2 schematically illustrates a pulse input circuit diagram according to an embodiment of the present application;

FIG. 3 schematically illustrates a single chip microcomputer minimum system circuit diagram according to an embodiment of the present application;

FIG. 4 schematically illustrates a 4-20mA input circuit diagram in accordance with an embodiment of the present application;

FIG. 5 schematically illustrates a 4-20mA output circuit diagram in accordance with an embodiment of the present application;

FIG. 6 schematically illustrates a switching value input circuit diagram according to an embodiment of the present application;

FIG. 7 schematically illustrates a switching value output circuit diagram according to an embodiment of the present application;

FIG. 8 schematically illustrates an RS-485 interface circuit diagram, according to an embodiment of the application;

Fig. 9 schematically illustrates an RS-422 interface circuit diagram according to an embodiment of the present application.

Description of the reference numerals

1. Singlechip minimum system circuit 2 4-20mA input circuit

3 4-20mA output circuit 4 switching value input circuit

5. Switching value output circuit 6 power supply circuit

7. Pulse input circuit of communication interface circuit 8

Detailed Description

For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it should be understood that the specific implementations described herein are only for illustrating and explaining the embodiments of the present application, and are not intended to limit the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present application based on the embodiments herein.

It should be noted that, in the embodiment of the present application, directional indications (such as up, down, left, right, front, and rear … …) are referred to, and the directional indications are merely used to explain the relative positional relationship, movement conditions, and the like between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.

In addition, if there is a description of "first", "second", etc. in the embodiments of the present application, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions of the embodiments may be combined with each other, but it is necessary to base that the technical solutions can be realized by those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should be regarded as not exist and not within the protection scope of the present application.

Fig. 1 schematically shows a circuit composition diagram of a flow computer acquired in real time according to an embodiment of the present application. As shown in fig. 1, an embodiment of the present application provides a circuit for real-time collection of a flow computer, which is applied to the flow computer, and the circuit may include:

the singlechip minimum system circuit 1 comprises a singlechip, wherein the singlechip is an STM32F407 chip;

the 4-20mA input circuit 2 is connected with the singlechip and comprises a current-voltage conversion circuit, a filter circuit and an AD1248 conversion chip which are sequentially connected, and is used for inputting voltage signals;

The 4-20mA output circuit 3 is connected with the singlechip and comprises a DAC8565 chip and a double operational amplifier constant current source circuit for outputting voltage signals;

the switching value input circuit 4 is connected with the singlechip and comprises a photoelectric coupling device and a ceramic chip capacitor, and is used for inputting switching value;

the switching value output circuit 5 is connected with the singlechip and comprises a driving device and a photoelectric coupling device, and is used for outputting switching value;

a power supply circuit 6 for supplying power;

the communication interface circuit 7 is connected with the singlechip and comprises a first communication interface circuit and a second communication interface circuit for equipment communication;

the pulse input circuit 8 comprises a filter circuit, a driving circuit, a first optical isolator element and a second optical isolator element, and is used for connecting pulse signals to the singlechip.

In the prior art, a flow computer used in a natural gas long-distance pipeline generally only supports flowmeter products of all manufacturers, the information acquired by the flowmeter products is limited, detailed state information of the flowmeter cannot be acquired, a communication protocol is not open to the outside, a unified metering management platform is difficult to establish for users, and intelligent development of metering management is limited. Meanwhile, the flow computer needs to achieve the effect of real-time acquisition on the acquisition of flow meter signals and other matched measuring instruments and meters so as to ensure the calculation precision and the accumulation precision of the flow computer. Based on this, this application provides a circuit that flow computer gathered in real time, is applied to flow computer, and flow computer's design adopts core board and real-time collection plate structure form, and the circuit that flow computer gathered in real time of this application is integrated on real-time collection board, and real-time collection board is mainly responsible for the real-time collection to measuring instrument and meter, flowmeter signal. The flow computer real-time acquisition circuit of the embedded system is adopted, the design separated from the core plate is realized, and the accuracy of real-time acquisition is higher.

In the embodiment of the application, the circuit for real-time acquisition of the flow computer comprises a singlechip minimum system circuit 1, a 4-20mA input circuit 2, a 4-20mA output circuit 3, a switching value input circuit 4, a switching value output circuit 5, a power supply circuit 6 and a communication interface circuit 7. Wherein, the 4-20mA input circuit 2, the 4-20mA output circuit 3, the switching value input circuit 4, the switching value output circuit 5, the power supply circuit 6 and the communication interface circuit 7 are respectively connected with the singlechip. The singlechip minimum system circuit 1 comprises a singlechip, and the singlechip adopts a 32-bit high-performance singlechip microprocessor STM32F407 chip. The singlechip minimum system also comprises a singlechip power supply module, a crystal oscillator, a reset circuit, a debugging interface and the like, and is used for operating the singlechip. The 4-20mA input circuit 2 comprises a current-voltage conversion circuit, a filter circuit and an AD1248 conversion chip which are sequentially connected, wherein the chip is a 24-bit AD conversion chip, and high-precision 24-bit acquisition of 4 paths of 4-20mA signals can be realized. The 4-20mA output circuit 3 comprises a DAC8565 chip and a dual operational amplifier constant current source circuit. The DAC8565 chip is a 14-bit resolution DA conversion chip, 4 paths of 4-20mA signal output can be realized, digital quantity is converted into voltage signals, the voltage signals are respectively output from pins 1, 2, 7 and 8 of the DAC8565 chip, and the voltage signals are converted into 4-20mA signals according to voltage values through a double operational amplifier constant current source circuit and are output from an IOUT0 pin.

The switching value input circuit 4 adopts a photoelectric isolation design, and comprises photoelectric coupling devices and ceramic chip capacitors, and in the embodiment of the application, the switching value input circuit has eight paths, so that eight photoelectric coupling devices and ceramic chip capacitors are respectively arranged, and one ceramic chip capacitor is arranged between two pins of the output end of each photoelectric coupling device. The switching value input circuit 4 further includes eight jumper settings. Taking a first path of switching value input circuit as an example, J1 is set as a jumper, J1-1 and J1-2 are in an active mode when in short circuit, J1-2 and J1-3 are in a passive mode when in short circuit, an input switching signal is isolated by a photoelectric coupling device G1 and is output from a corresponding pin G1 to a pin DIN0 of the singlechip, and a ceramic capacitor is arranged between two pins at the output end of G1 and used for filtering.

The switching value output circuit 5 adopts a photoelectric isolation design, and comprises a driving device and photoelectric coupling devices, in the embodiment of the application, six paths of switching value output circuits are shared, and 6 paths of switching value output circuits are driven by the driving device ULN2003 and connected with 2 pins of a plurality of photoelectric coupling devices so as to drive the photoelectric coupling devices. The output signal of the photoelectric coupling device is used as the input of the ULN2003 driving device and is output from the DO_0 pin to the DO_5 pin of the driving device through driving.

In the embodiment of the present application, the power supply circuit 6 is a two-way power supply circuit, and is further connected to a two-way isolation power supply, and is used for providing power for the whole single way. The communication interface circuit 7 comprises a first communication interface circuit and a second communication interface circuit, wherein the first communication interface circuit is a 2-channel RS-485 interface circuit, the second communication interface circuit is an RS-422 high-speed communication interface circuit, and the RS-422 high-speed full duplex communication interface can meet the highest 4M BPS communication baud rate and is a full duplex interface, so that bidirectional simultaneous data transmission can be realized. The 2-way RS-485 interface circuit and the RS-422 high-speed communication interface circuit can be adapted to the communication of various devices.

Fig. 2 schematically shows a pulse input circuit diagram according to an embodiment of the present application. As shown in fig. 2, in the embodiment of the present application, the pulse input circuit has two paths, and the two paths of pulses are s_freq1 and s_freq2, respectively. S_FREQ1 and S_FREQ2 are respectively connected to the input ends of the first opto-isolator element G9 and the second opto-isolator element G10 through a filter circuit and a driving circuit, and after being isolated by the opto-isolator element, two paths of pulse signals are respectively connected to corresponding pins of the singlechip from the FREQ1 pin of the first opto-isolator element G9 and the FREQ2 pin of the second opto-isolator element G10.

Fig. 3 schematically illustrates a circuit diagram of a single-chip microcomputer minimum system according to an embodiment of the application. As shown in fig. 3, in the embodiment of the present application, the minimum system circuit of the singlechip further includes:

In the embodiment of the application, the singlechip minimum system circuit further comprises a singlechip power supply module, a crystal oscillator, a reset circuit and a debugging interface, and is used for enabling the singlechip to operate. The crystal oscillator is a crystal oscillator and is used for generating oscillation frequency in a circuit.

As shown in FIG. 3, in the embodiment of the application, the 17 th, 30 th, 39 th, 52 th, 62 nd, 72 nd, 84 th, 95 th, 108 th, 121 th, 131 th and 144 th pins of the SCM are connected with a 3.3V power supply, the 16 th, 38 th, 51 th, 61 th, 83 th, 94 th, 107 th, 120 th and 130 th pins are connected with a power supply ground, and decoupling ceramic chip capacitors are arranged between the 3.3V end of the power supply and the ground end of the power supply and close to the SCM pins.

Specifically, the singlechip adopts 3.3V power supply, so 17 th, 30 th, 39 th, 52 th, 62 th, 72 th, 84 th, 95 th, 108 th, 121 th, 131 th and 144 th pins of the singlechip are connected with 3.3V power supply. The 16 th pin, the 38 th pin, the 51 th pin, the 61 th pin, the 83 th pin, the 94 th pin, the 107 th pin, the 120 th pin and the 130 th pin are connected with power ground, decoupling ceramic chip capacitors C50, C12, C15, C16, C46, C48 and C114-C119 are arranged between the 3.3V end of the power supply and the ground end of the power supply and close to the pin of the singlechip, and the decoupling ceramic chip capacitors are 104 capacitors

As shown in fig. 3, in the embodiment of the present application, the minimum system circuit of the singlechip further includes a real-time clock module and an oscillating circuit, and the 6 th pin VBAT of the singlechip is connected with a 3V power supply, so as to ensure that the real-time clock module keeps working normally when power is lost;

Specifically, the 6 th pin VBAT of the singlechip is connected with a 3V battery power supply, so as to ensure that a Real-time clock (RTC) module can still keep normal operation when power is off. The 25 th pin nRST of the singlechip is connected with a low-level reset signal so as to ensure that the singlechip normally enters a working state after being electrified. The 23 th pin PH0-OSC-IN and the 24 th pin PH1-OSC-OUT of the singlechip are connected into a first crystal oscillator, and the first crystal oscillator is a high-stability passive crystal oscillator and is used for realizing a singlechip clock by combining an oscillating circuit of the singlechip; the 8 th pin PC14-OSC32-IN and the 9 th pin PC15-OSC32-OUT of the singlechip are connected into a second crystal oscillator which is a high-stability passive crystal oscillator and is used for realizing a singlechip clock by combining an oscillating circuit of the singlechip. The 105 th pin JTMS_SWDIO and the 109 th pin JTCK_SWCLK of the singlechip are respectively connected with a debugging interface and are used for realizing simulation debugging and program downloading of the singlechip.

Fig. 4 schematically illustrates a 4-20mA input circuit diagram according to an embodiment of the present application. As shown in FIG. 4, in the embodiment of the application, the circuit further comprises a double-path isolation power supply, wherein the 1 st pin of the AD1248 conversion chip of the 4-20mA input circuit is connected with the 5V end of the double-path isolation power supply, the 2 nd pin is connected with the ground end of the double-path isolation power supply, the 4 th pin is connected with the AD_RES pin of the single-chip microcomputer, the 5 th pin is connected with the external reference voltage 1.25V, the 11 th pin is connected with the positive end of the 4-20mA conversion voltage, the 12 th pin is connected with the external reference voltage 1.25V so as to form an AD conversion differential input, the 23 rd pin is connected with the AD_START pin of the single-chip microcomputer, the 24 th pin is connected with the AD_CS pin of the single-chip microcomputer, the 26 th pin is connected with the AD_OUT pin of the single-chip microcomputer, the 27 th pin is connected with the AD_DIN pin of the single-chip microcomputer, and the 28 th pin is connected with the AD_SCK pin of the single-chip microcomputer.

Specifically, the 4-20mA signal input circuit adopts a front-end current-voltage conversion circuit and a filter circuit, and then is connected with an AD1248 conversion chip, and the chip is a 24-bit AD conversion chip. The 1 st pin of the AD1248 conversion chip is powered by 5V, the 2 nd pin is grounded, the 4 th pin is connected with the AD_RES pin of the singlechip, and the 5 th pin is connected with the external reference voltage of 1.25V. The 11 th pin is connected with the positive end of 4-20mA conversion voltage, and the 12 th pin is connected with 1.25V reference voltage to form AD conversion differential input. The 23 th pin is connected with the AD_START pin of the single-chip microcomputer, the 24 th pin is connected with the AD_CS pin of the single-chip microcomputer, the 26 th pin is connected with the AD_OUT pin of the single-chip microcomputer, the 27 th pin is connected with the AD_DIN pin of the single-chip microcomputer, and the 28 th pin is connected with the AD_SCK pin of the single-chip microcomputer.

Fig. 5 schematically shows a 4-20mA output circuit diagram according to an embodiment of the present application. As shown in fig. 5, in the embodiment of the application, the 16 th pin of the DAC8565 chip of the 4-20mA output circuit is connected to the da_ldac pin of the single-chip microcomputer, the 15 th pin is connected to the da_en pin of the single-chip microcomputer, the 13 th pin is connected to the da_res pin of the single-chip microcomputer, the 11 th pin is connected to the da_din pin of the single-chip microcomputer, the 10 th pin is connected to the da_sclk pin of the single-chip microcomputer, and the 9 th pin is connected to the da_sync pin of the single-chip microcomputer.

Specifically, the 4-20mA output circuit adopts a DAC8565 chip, and the DAC8565 chip is a 14-bit resolution DA conversion chip, so that digital quantity conversion into a voltage signal can be realized. The 16 th pin of the DAC8565 chip is connected with the DA_LDAC pin of the single-chip microcomputer, the 15 th pin is connected with the DA_EN pin of the single-chip microcomputer, the 13 th pin is connected with the DA_RES pin of the single-chip microcomputer, the 11 th pin is connected with the DA_DIN pin of the single-chip microcomputer, the 10 th pin is connected with the DA_SCLK pin of the single-chip microcomputer, and the 9 th pin is connected with the DA_SYNC pin of the single-chip microcomputer. The voltage signals are output from the 1 st pin, the 2 nd pin, the 7 th pin and the 8 th pin of the DAC8565 chip respectively, are converted into 4-20mA signals according to the voltage values through the double operational amplifier constant current source circuits U26A and U26B, and are output from the IOUT0 pin. The two operational amplifiers U26A and U26B are operational amplifiers, and the two operational amplifier constant current power supply circuits are circuits formed by the operational amplifiers U26A and U26B.

Fig. 6 schematically shows a switching value input circuit diagram according to an embodiment of the present application. As shown in fig. 6, in the embodiment of the present application, the optocoupler of the switching value input circuit includes a first optocoupler, a second optocoupler, a third optocoupler, a fourth optocoupler, a fifth optocoupler, a sixth optocoupler, a seventh optocoupler, and an eighth optocoupler for isolating an input switching signal;

Specifically, the switching value input circuit has eight paths, so that eight photoelectric coupling devices and eight ceramic chip capacitors are respectively arranged, one ceramic chip capacitor is arranged between two pins of the output end of each photoelectric coupling device, and the ceramic chip capacitor is 104 capacitors. The first ceramic chip capacitor C58 is arranged between two pins of the first photoelectric coupling device G1, the second ceramic chip capacitor C59 is arranged between two pins of the second photoelectric coupling device G2, the third ceramic chip capacitor C60 is arranged between two pins of the third photoelectric coupling device G3, the fourth ceramic chip capacitor C61 is arranged between two pins of the fourth photoelectric coupling device G4, the fifth ceramic chip capacitor C62 is arranged between two pins of the fifth photoelectric coupling device G5, the sixth ceramic chip capacitor C63 is arranged between two pins of the sixth photoelectric coupling device G6, the seventh ceramic chip capacitor C64 is arranged between two pins of the seventh photoelectric coupling device G7, and the eighth ceramic chip capacitor C65 is arranged between two pins of the eighth photoelectric coupling device G8.

The switching value input circuit 4 further includes eight jumper settings. Taking a first path of switching value input circuit as an example, J1 is set as a jumper, J1-1 and J1-2 are in an active mode when in short circuit, J1-2 and J1-3 are in a passive mode when in short circuit, an input switching signal is isolated by a photoelectric coupling device G1 and is output from a corresponding pin G1 to a pin DIN0 of the singlechip, and a ceramic capacitor is arranged between two pins at the output end of G1 and used for filtering.

Fig. 7 schematically shows a switching value output circuit diagram according to an embodiment of the present application. As shown in fig. 7, in the embodiment of the present application, the driving device of the switching value output circuit includes a first driving device and a second driving device, and the first driving device and the second driving device are ULN2003 chips;

Specifically, the switching value output circuit has six paths in total, and the 6 paths of switching value output circuits are driven by the driving device ULN2003 and are respectively connected with the pins 2 of the ninth photoelectric coupling device G11, the tenth photoelectric coupling device G12, the eleventh photoelectric coupling device G13, the twelfth photoelectric coupling device G14, the thirteenth photoelectric coupling device G15 and the fourteenth photoelectric coupling device G16 to drive the photoelectric coupling devices. The output signals of the photoelectric coupling devices are input as ULN2003 driving devices and are respectively output from DO_0 pin, DO_1 pin, DO_2 pin, DO_3 pin, DO_4 pin and DO_5 pin of the driving devices through driving.

Fig. 8 schematically illustrates an RS-485 interface circuit diagram according to an embodiment of the application. As shown in fig. 8, in the embodiment of the present application, the first communication interface circuit is an RS-485 interface circuit, and includes a MAX487 chip, where the 1 st pin of the MAX487 chip is connected to the usart2_rx pin of the single-chip microcomputer, the 4 th pin is connected to the usart2_tx pin of the single-chip microcomputer, and the 2 nd pin and the 3 rd pin are connected to the usart2_txen pin of the single-chip microcomputer.

Specifically, the first communication interface circuit is an RS-485 interface circuit and comprises a MAX487 chip, wherein a 1 st pin of the MAX487 chip is connected with a USART2_RX pin of the single-chip microcomputer, a 4 th pin of the MAX487 chip is connected with a USART2_TX pin of the single-chip microcomputer, and a 2 nd pin and a 3 rd pin of the MAX I/O interface circuit are connected with a USART2_TXEN pin of the single-chip microcomputer. The standard communication interface of the RS-485 interface circuit is two pins of RS485A and RS 485B.

As shown in fig. 8, in the embodiment of the present application, the first communication interface circuit further includes a first communication protection circuit, where the first communication protection circuit includes a first diode, a second diode, and a third diode, for protecting the circuit.

Specifically, the first communication interface circuit, namely the RS-485 interface circuit, further comprises a first communication protection circuit, wherein the first communication protection circuit is composed of a first diode D19, a second diode D20 and a third diode D21, and the communication protection circuit can meet the industrial field protection requirement so as to protect the circuit.

Fig. 9 schematically illustrates an RS-422 interface circuit diagram according to an embodiment of the present application. As shown in fig. 9, in the embodiment of the present application, the second communication interface circuit is an RS-422 high-speed communication interface circuit, and includes a MAX488 chip, where the 3 rd pin of the MAX488 chip is connected to the usart4_tx pin of the single-chip microcomputer, and the 4 th pin is connected to the usart4_rx pin of the single-chip microcomputer.

Specifically, the second communication interface circuit is an RS-422 high-speed communication interface circuit, and comprises a MAX488 chip, and the MAX488 chip can be used for realizing RS-422 communication conversion. The 3 rd pin of the MAX488 chip is connected with the USART4_TX pin of the singlechip, and the 4 th pin is connected with the USART4_RX pin of the singlechip. The RS-422 high-speed full duplex communication interface can meet the highest 4M BPS communication baud rate, and the full duplex interface can realize bidirectional simultaneous data transmission. The communication interface of the standard RS-422 is led out from pins RS488_A3, B3, Z3 and Y3.

As shown in fig. 9, in the embodiment of the present application, the second communication interface circuit further includes a second communication protection circuit, where the second communication protection circuit includes a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, and an eighth diode, for protecting the circuit.

Specifically, the second communication interface circuit further includes a second communication protection circuit, which is formed by a third diode D25, a fourth diode D26, a fifth diode D27, a sixth diode D28, a seventh diode D29, and an eighth diode D30, and is used for protecting the circuit.

It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In one typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include volatile memory in a computer-readable medium, random Access Memory (RAM) and/or nonvolatile memory, etc., such as Read Only Memory (ROM) or flash RAM. Memory is an example of a computer-readable medium.

Computer readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of storage media for a computer include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape disk storage or other magnetic storage devices, or any other non-transmission medium, which can be used to store information that can be accessed by a computing device. Computer-readable media, as defined herein, does not include transitory computer-readable media (transmission media), such as modulated data signals and carrier waves.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises an element.

The foregoing is merely exemplary of the present application and is not intended to limit the present application. Various modifications and changes may be made to the present application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc. which are within the spirit and principles of the present application are intended to be included within the scope of the claims of the present application.

Claims

1. A circuit for real-time collection of a flow computer, which is characterized by being applied to the flow computer and comprising:

the 4-20mA input circuit is connected with the singlechip and comprises a current-voltage conversion circuit, a filter circuit and an AD1248 conversion chip which are sequentially connected, and is used for inputting voltage signals;

a power supply circuit for supplying power;

The communication interface circuit is connected with the singlechip and comprises a first communication interface circuit and a second communication interface circuit which are used for equipment communication;

2. The circuit of claim 1, wherein the single chip microcomputer minimum system circuit further comprises:

3. The circuit of claim 2, wherein the 17 th, 30 th, 39 th, 52 th, 62 nd, 72 nd, 84 th, 95 th, 108 th, 121 th, 131 th and 144 th pins of the single chip microcomputer are connected with a 3.3V power supply, the 16 th, 38 th, 51 st, 61 th, 83 th, 94 th, 107 th, 120 th and 130 th pins are connected with a power supply ground, and decoupling ceramic chip capacitors are arranged between the 3.3V end of the power supply and the ground end of the power supply and close to the pins of the single chip microcomputer.

4. The circuit of claim 2, wherein the single-chip microcomputer minimum system circuit further comprises a real-time clock module and an oscillating circuit, and the 6 th pin VBAT of the single-chip microcomputer is connected with a 3V power supply and used for ensuring that the real-time clock module keeps working normally when power is lost;

and the 105 th pin JTMS_SWDIO and the 109 th pin JTCK_SWCLK of the singlechip are respectively connected with the debugging interface and are used for realizing simulation debugging and program downloading of the singlechip.

5. The circuit of claim 1, further comprising a dual-path isolation power supply, wherein a 1 st pin of an AD1248 conversion chip of the 4-20mA input circuit is connected to a 5V end of the dual-path isolation power supply, a 2 nd pin is connected to a ground end of the dual-path isolation power supply, a 4 th pin is connected to an ad_res pin of the single-chip microcomputer, a 5 th pin is connected to an external reference voltage of 1.25V, an 11 th pin is connected to a 4-20mA conversion voltage positive end, a 12 th pin is connected to the external reference voltage of 1.25V to form an AD conversion differential input, a 23 rd pin is connected to an ad_start pin of the single-chip microcomputer, a 24 th pin is connected to an ad_cs pin of the single-chip microcomputer, a 26 th pin is connected to an ad_out pin of the single-chip microcomputer, a 27 th pin is connected to an ad_din pin of the single-chip microcomputer, and a 28 th pin is connected to an ad_sck pin of the single-chip microcomputer.

6. The circuit of claim 1, wherein a 16 th pin of a DAC8565 chip of the 4-20mA output circuit is connected to a da_ldac pin of the single-chip microcomputer, a 15 th pin is connected to a da_en pin of the single-chip microcomputer, a 13 th pin is connected to a da_res pin of the single-chip microcomputer, an 11 th pin is connected to a da_din pin of the single-chip microcomputer, a 10 th pin is connected to a da_sclk pin of the single-chip microcomputer, and a 9 th pin is connected to a da_sync pin of the single-chip microcomputer.

7. The circuit of claim 1, wherein the optocoupler of the switching value input circuit comprises a first optocoupler, a second optocoupler, a third optocoupler, a fourth optocoupler, a fifth optocoupler, a sixth optocoupler, a seventh optocoupler, and an eighth optocoupler for isolating an input switching signal;

8. The circuit of claim 1, wherein the drive devices of the switching value output circuit comprise a first drive device and a second drive device, each of the first drive device and the second drive device being a ULN2003 chip;

9. The circuit of claim 1, wherein the first communication interface circuit is an RS-485 interface circuit, and comprises a MAX487 chip, wherein pin 1 of the MAX487 chip is connected to a usart2_rx pin of the single-chip microcomputer, pin 4 is connected to a usart2_tx pin of the single-chip microcomputer, and pins 2 and 3 are connected to usart2_txen pins of the single-chip microcomputer.

10. The circuit of claim 1, wherein the first communication interface circuit further comprises a first communication protection circuit comprising a first diode, a second diode, and a third diode for protecting the circuit.

11. The circuit of claim 1, wherein the second communication interface circuit is an RS-422 high-speed communication interface circuit, and comprises a MAX488 chip, wherein the 3 rd pin of the MAX488 chip is connected to the usart4_tx pin of the single-chip microcomputer, and the 4 th pin is connected to the usart4_rx pin of the single-chip microcomputer.

12. The circuit of claim 1, wherein the second communication interface circuit further comprises a second communication protection circuit comprising a third diode, a fourth diode, a fifth diode, a sixth diode, a seventh diode, and an eighth diode for protecting the circuit.