CN220439354U - Gate-type inductor - Google Patents

Abstract

The utility model discloses a gate-type inductor, which comprises a high-frequency circuit, a direct-current power supply and a plurality of patch inductors connected between the high-frequency circuit and the direct-current power supply, wherein the patch inductors are distributed in a gate-type manner. The utility model achieves the purpose of reducing the distributed capacitance by increasing the distance between the patch inductance and the ground.

Description

Gate-type inductor

Technical Field

The utility model belongs to the technical field of high-frequency circuits, and particularly relates to a gate-type inductor.

Background

When the high-frequency circuit is directly connected with the direct-current power supply, the direct-current power supply is equivalent to the short circuit of the high-frequency signal, which is equivalent to the high-frequency signal to the ground through a small impedance, so that the loss of the high-frequency signal is greatly increased. The problem that the overall loss of the high-frequency circuit is increased due to the fact that the low-impedance direct-current power supply is connected when the high-frequency circuit is externally connected with the direct-current power supply is solved. In order to solve the problem, a large inductor is connected in series between the high-frequency circuit and the direct-current power supply, so that the high-frequency circuit presents higher impedance to the high-frequency signal to reduce loss. The method is poor in finding effect and high in high-frequency circuit loss in practical application, the method is poor in finding effect, the loss of the high-frequency circuit is large, and the existence of distributed capacitance between the patch inductor and the ground is found to be the reason for large high-frequency signal loss after analysis.

Disclosure of Invention

The utility model aims to provide a gate-type inductor, which achieves the purpose of reducing distributed capacitance by increasing the distance between a patch inductor and ground.

In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:

the gate-type inductor comprises a high-frequency circuit, a direct-current power supply, and a plurality of patch inductors connected between the high-frequency circuit and the direct-current power supply, wherein the patch inductors are distributed in a gate shape.

Further, the number of the patch inductors is three, and the patch inductors are welded to the circuit board respectively.

Further, three patch inductors are distributed in a delta shape along the same axial direction and are connected in series in sequence.

Further, two of the three patch inductors are arranged vertically, and the other patch inductor is arranged between the two vertical patch inductors transversely.

Further, the device also comprises a grounding circuit, and the patch inductor is arranged far away from the end of the grounding circuit.

Further, a distributed capacitance is formed between the patch inductance and the ground circuit.

Compared with the prior art, the utility model has the advantages that: according to the utility model, three patch inductors are connected with the high-frequency circuit and the direct-current power supply, and are distributed on the same axis and vertically arranged according to two of the patch inductors, and the other patch inductor is horizontally arranged between the two patch inductors vertically arranged and integrally forms a gate, so that the purpose of reducing the distributed capacitance can be achieved by increasing the interval between the patch inductors and the ground.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and should not be considered limiting the scope, and that other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic diagram of a prior art structure in which a high frequency circuit is directly connected to a dc power supply.

Fig. 2 is a schematic diagram of a connection structure equivalent to a capacitor by using a patch inductor and ground in the prior art.

Fig. 3 is a schematic diagram of a gate inductor structure according to the present utility model.

Fig. 4 is a graph of experimental data of a gate inductor provided by the present utility model.

Reference numerals: 1. a patch inductance; 2. a high frequency circuit; 3. a DC power supply.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.

In the description of the present utility model, it should be noted that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. indicate an azimuth or a positional relationship based on that shown in the drawings, or an azimuth or a positional relationship in which the inventive product is conventionally put in use, it is merely for convenience of describing the present utility model and simplifying the description, and it is not indicated or implied that the apparatus or element referred to must have a specific azimuth, be constructed and operated in a specific azimuth, and thus should not be construed as limiting the present utility model.

Furthermore, the terms "first," "second," "third," and the like, if any, are used merely for distinguishing between descriptions and not for indicating or implying a relative importance.

Furthermore, the terms "horizontal," "vertical," "overhang" and the like, if any, do not denote a requirement that the component be absolutely horizontal or overhang, but rather may be slightly inclined. As "horizontal" merely means that its direction is more horizontal than "vertical", and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.

In the description of the present utility model, it should also be noted that, unless explicitly stated and limited otherwise, the terms "disposed," "mounted," "connected," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present utility model will be understood in specific cases by those of ordinary skill in the art.

It should be noted that the features of the embodiments of the present utility model may be combined with each other without conflict.

As shown in fig. 3, a gate-type inductor comprises a high-frequency circuit 2 and a dc power supply 3, and further comprises a plurality of chip inductors 1 connected between the high-frequency circuit 2 and the dc power supply 3, wherein the chip inductors 1 are distributed in a gate-type manner.

Compared with the prior art, in the prior art, when the high-frequency circuit 2 is externally connected with the direct-current power supply 3, the overall loss of the high-frequency circuit 2 is increased due to the connection of the low-impedance direct-current power supply 3, and aiming at the problem, the most common method is to serially connect a large inductor between the high-frequency circuit 2 and the direct-current power supply 3 so as to present higher impedance to the high-frequency signal to reduce the loss. As shown in fig. 1: when the high-frequency circuit 2 is directly connected with the direct-current power supply 3, the direct-current power supply 3 is equivalently shorted for the high-frequency signal, which is equivalent to passing the high-frequency signal to the ground through a smaller impedance, so that the loss of the high-frequency signal is greatly increased, and an inductance L needs to be connected between the high-frequency signal and the direct-current power supply 3 in series to increase the impedance and reduce the loss. However, in the practical use process, the loss of the high-frequency circuit 2 is larger, and the existence of the distributed capacitance between the patch inductor 1 and the ground is found to be the cause of the large loss of the high-frequency signal after analysis. As shown in fig. 2, the patch inductor 1 is equivalent to the ground as two plates of a capacitor, and the capacitance c=εs/4πkd is inversely proportional to the plate spacing. The space between the patch inductor 1 and the ground is small, so that the distributed capacitance is large, the equivalent capacitance impedance of the capacitance is inversely proportional to the capacitance, the impedance of the large distributed capacitance to the high-frequency signal is small, and the impedance between the high-frequency circuit 2 and the direct-current power supply 3 is reduced due to the combination of the distributed capacitance, so that the loss is increased. In the utility model, on the basis of the principle, as shown in fig. 3, the access of the inductor is further improved, the original one inductor is changed into three, and the inductor is welded in a shape of a door in the Z-axis direction. The purpose of reducing the distributed capacitance can be achieved by increasing the spacing between the patch inductance 1 and ground,

the patch inductors 1 are three and are welded on the circuit board respectively. The three patch inductors 1 are distributed in a delta shape along the same axial direction and are connected in series in sequence. And the welding inductor is shaped like a Chinese character 'men' in the Z-axis direction.

Two of the three patch inductors 1 are vertically arranged, and the other patch inductor 1 is transversely arranged between the two vertical patch inductors 1. The device also comprises a grounding circuit, and the patch inductor 1 is arranged far away from the end of the grounding circuit. A distributed capacitance is formed between the patch inductor 1 and the ground circuit. The distributed capacitance between the patch inductor 1 and the grounding circuit is set by keeping the patch inductor 1 away from the contact circuit end, so that the distance between the patch inductor 1 and the grounding circuit is effectively increased, and the damage of the high-frequency circuit 2 is reduced.

In practical experiments, the length of a high-frequency circuit is 2cm, the width is 1mm, the distance between the inductor and the ground is 0.2mm, and the signal frequency is 400MHz.

When a 0603 packaging inductor 100uH is connected, the loss of a high-frequency signal is about 0.5dB by adopting a conventional connection method;

when three 0603 packaging inductors 33uH are connected, the high-frequency signal loss is 0.05 dB-0.1 dB by adopting a gate type inductor connection method.

The use of the gate inductance can be seen to greatly reduce the loss of the high frequency circuit 2.

As shown in fig. 4, at 200MHz, the common inductance usage has 7.0dB of insertion loss, 6.6dB of insertion loss after the gate is changed, and the overall insertion loss also has a decreasing trend, thus the inductance is effectively improved compared with the traditional inductance usage.

The above embodiments are merely for illustrating the technical solution of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions.

Claims (6)

1. The utility model provides a gate-type inductance, includes high frequency circuit (2) and DC power supply (3), its characterized in that: the high-frequency power supply further comprises a plurality of patch inductors (1) connected between the high-frequency circuit (2) and the direct-current power supply (3), and the patch inductors (1) are distributed in a gate shape.

2. The gate inductor of claim 1, wherein: the number of the patch inductors (1) is three, and the patch inductors are welded to the circuit board respectively.

3. The gate inductor of claim 2, wherein: the three patch inductors (1) are distributed in a delta shape along the same axial direction and are connected in series in sequence.

4. A gate inductor as claimed in claim 3 wherein: two of the three patch inductors (1) are vertically arranged, and the other patch inductor (1) is horizontally arranged between the two vertical patch inductors (1).

5. The gate inductor of claim 1, wherein: the patch inductor (1) is arranged far away from the end of the grounding circuit.

6. The gate inductance of claim 5, wherein: a distributed capacitor is formed between the patch inductor (1) and the grounding circuit.