CN220419955U - Serial port circuit of video processor and video processor system - Google Patents
Serial port circuit of video processor and video processor system Download PDFInfo
- Publication number
- CN220419955U CN220419955U CN202322379570.3U CN202322379570U CN220419955U CN 220419955 U CN220419955 U CN 220419955U CN 202322379570 U CN202322379570 U CN 202322379570U CN 220419955 U CN220419955 U CN 220419955U
- Authority
- CN
- China
- Prior art keywords
- module
- electrically connected
- resistor
- video processor
- channel selection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 88
- 230000003321 amplification Effects 0.000 claims description 2
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 15
- 238000004891 communication Methods 0.000 description 10
- 230000002093 peripheral effect Effects 0.000 description 10
- 238000000034 method Methods 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Landscapes
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
The utility model discloses a serial circuit of a video processor and a video processor system. The serial port circuit of the video processor comprises: the device comprises a channel selection module, a first protocol conversion module, a second protocol conversion module and an interface module; the input end of the channel selection module is connected with UART protocol data of the video processor, the first protocol data output end is electrically connected with the input end of the first protocol conversion module, and the second protocol data output end is electrically connected with the input end of the second protocol conversion module; the output end of the first protocol conversion module is electrically connected with the interface module, and the first protocol conversion module is used for converting UART protocol data into RS232 protocol data; the output end of the second protocol conversion module is electrically connected with the interface module, and the second protocol conversion module is used for converting UART protocol data into RS485 protocol data. The utility model can expand the interface type of the video processor.
Description
Technical Field
The present utility model relates to the field of video processors, and in particular, to a serial circuit of a video processor and a video processor system.
Background
Video processors, such as LED (Light Emitting Diode ) video processors, can enable images to be accurately displayed in LED displays, and thus have important applications in the LED display technology field.
In the related art, the interface type of the video processor is single, and the communication distance is short, which limits the further application of the video processor.
Disclosure of Invention
The utility model provides a serial port circuit of a video processor and a video processor system, which are used for expanding the interface type of the video processor.
According to an aspect of the present utility model, there is provided a serial circuit of a video processor, the serial circuit of the video processor including: the device comprises a channel selection module, a first protocol conversion module, a second protocol conversion module and an interface module;
the input end of the channel selection module is connected with UART protocol data of the video processor, the first protocol data output end of the channel selection module is electrically connected with the input end of the first protocol conversion module, the second protocol data output end of the channel selection module is electrically connected with the input end of the second protocol conversion module, and the channel selection module is used for conducting the input end of the channel selection module with the first protocol data output end or the second protocol data output end according to a selection signal of the selection end of the channel selection module;
the output end of the first protocol conversion module is electrically connected with the interface module, and the first protocol conversion module is used for converting UART protocol data into RS232 protocol data;
the output end of the second protocol conversion module is electrically connected with the interface module, and the second protocol conversion module is used for converting UART protocol data into RS485 protocol data;
the interface module is used for externally connecting a control assembly.
Optionally, the channel selection module is a TS3a5018PWR chip.
Optionally, the serial port circuit of the video processor further comprises an amplifying module, and the interface module is electrically connected with the selection end of the channel selection module through the amplifying module; the interface module is electrically connected with the input end of the amplifying module, and the output end of the amplifying module is electrically connected with the selection end of the channel selection module.
Optionally, the amplifying module includes: the first resistor, the second resistor, the third resistor, the fourth resistor and the first triode;
the first end of the first resistor is connected to a first voltage source, the second end of the first resistor is electrically connected with the collector electrode of the first triode, and the collector electrode of the first triode is used as the output end of the amplifying module;
the first end of the second resistor is used as an input end of the amplifying module, and the second end of the second resistor is electrically connected with the collector electrode of the first triode;
the first end of the third resistor is electrically connected with the second end of the second resistor, and the second end of the third resistor is electrically connected with the base electrode of the first triode;
the first end of the fourth resistor is electrically connected with the base electrode of the first triode, and the second end of the fourth resistor is grounded; and the emitter electrode of the first triode is grounded.
Optionally, the first protocol conversion module is an SP3232EEY chip.
Optionally, the second protocol conversion module is a max13487EESA chip.
Optionally, the serial port circuit of the video processor further includes a level conversion module, and the second protocol data output end of the channel selection module is electrically connected with the second protocol conversion module through the level conversion module.
Optionally, the level conversion module includes:
the fifth resistor, the first MOS tube and the sixth resistor;
the first end of the fifth resistor is electrically connected with the second protocol data output end of the channel selection module, and the second end of the fifth resistor is connected with a first voltage source;
the control end of the first MOS tube is connected to the first voltage source, the first end of the first MOS tube is electrically connected with the second protocol data output end of the channel selection module, and the second end of the first MOS tube is electrically connected with the second protocol conversion module;
and the first end of the sixth resistor is connected to a second voltage source, and the second end of the sixth resistor is electrically connected with the second protocol conversion module.
According to another aspect of the present utility model there is provided a video processor system comprising a video processor and a serial circuit of the video processor as described above.
Optionally, the video processor system further includes the control component, the control component is electrically connected with the interface module, and the control component is a central control device or an intelligent business display motherboard.
According to the technical scheme of the embodiment of the utility model, the control circuit of the adopted video processor comprises: the device comprises a channel selection module, a first protocol conversion module, a second protocol conversion module and an interface module; the input end of the channel selection module is connected with UART protocol data of the video processor, the first protocol data output end of the channel selection module is electrically connected with the input end of the first protocol conversion module, the second protocol data output end of the channel selection module is electrically connected with the input end of the second protocol conversion module, and the channel selection module is used for conducting the input end of the channel selection module with the first protocol data output end or the second protocol data output end according to a selection signal of the selection end of the channel selection module; the output end of the first protocol conversion module is electrically connected with the interface module, and the first protocol conversion module is used for converting UART protocol data into RS232 protocol data; the output end of the second protocol conversion module is electrically connected with the interface module, and the second protocol conversion module is used for converting UART protocol data into RS485 protocol data; the interface module is used for externally connecting the control assembly. The serial port circuit of the video processor can realize communication with the RS232 protocol of the control assembly and communication with the RS485 protocol, and has various interface types.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the utility model or to delineate the scope of the utility model. Other features of the present utility model will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic circuit diagram of a serial circuit of a video processor according to an embodiment of the present utility model;
fig. 2 is an application schematic diagram of a serial circuit of a video processor according to an embodiment of the present utility model;
fig. 3 is a schematic circuit diagram of a channel selection module and a peripheral circuit thereof according to an embodiment of the present utility model;
fig. 4 is a schematic circuit diagram of an interface module according to an embodiment of the present utility model;
fig. 5 is a schematic circuit diagram of an amplifying module according to an embodiment of the present utility model;
fig. 6 is a schematic circuit diagram of a first protocol conversion module and a peripheral circuit thereof according to an embodiment of the present utility model;
fig. 7 is a schematic circuit diagram of a second protocol conversion module and a peripheral circuit thereof according to an embodiment of the present utility model;
fig. 8 is a schematic circuit diagram of a level shift module according to an embodiment of the utility model.
Detailed Description
In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present utility model and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic circuit structure of a serial circuit of a video processor according to an embodiment of the present utility model, and fig. 2 is an application schematic diagram of a serial circuit of a video processor according to an embodiment of the present utility model, referring to fig. 1 and fig. 2. The serial port circuit of the video processor comprises: a channel selection module 11, a first protocol conversion module 12, a second protocol conversion module 13, and an interface module 14; the input end of the channel selection module 11 receives UART protocol data from the video processor 21, the first protocol data output end of the channel selection module 11 is electrically connected with the input end of the first protocol conversion module 12, the second protocol data output end of the channel selection module 11 is electrically connected with the input end of the second protocol conversion module 13, and the channel selection module 11 is used for conducting the input end of the channel selection module 11 with the first protocol data output end or the second protocol data output end according to a selection signal of the selection end; the output end of the first protocol conversion module 12 is electrically connected with the interface module 14, and the first protocol conversion module 12 is used for converting UART protocol data into RS232 protocol data; the output end of the second protocol conversion module 13 is electrically connected with the interface module 14, and the second protocol conversion module 13 is used for converting UART protocol data into RS485 protocol data; the interface module 14 is used to externally connect the control assembly 22.
Specifically, the serial circuit of the video processor is used to implement data transmission between the control component 22 and the video processor 21, so that the control component 22 can control the video processor 21. The serial circuit of the video processor may be part of the video processor. When in use, the control component 22 is electrically connected with the interface module 14, the channel selection module 11 is electrically connected with a video processor body of the video processor 21, for example, a main board of the video processor, specifically, a selection end of the channel selection module 11 can be connected with a singlechip in the video processor, and the singlechip outputs a selection signal to the channel selection module 11, thereby controlling the input end of the channel selection module 11 to be conducted with the first protocol data output end or the second protocol data output end thereof. For example, when the control component 22 only supports the RS232 protocol, the singlechip outputs a control signal to conduct the input end of the channel selection module 11 with the first protocol data output end thereof, and at this time, UART protocol data output by the video processor 21 is output through the first protocol data output end of the channel selection module 11, converted into RS232 protocol data by the first protocol conversion module 12, and output to the control component 22 through the interface module 14, thereby realizing communication with the control component 22. When the control component 22 only supports the RS485 protocol or the control component 22 and the interface module 14 need to be connected in a long distance, the RS485 protocol can be used for communication, at this time, the singlechip conducts the input end of the channel selection module 11 with the second protocol data output end thereof, at this time, UART protocol data output by the video processor 21 is output through the second protocol data output end of the channel selection module 11, and is converted into RS485 protocol data by the first protocol conversion module 12, and is output to the control component 22 through the interface module 14, thereby realizing communication with the control component 22. Therefore, the serial port circuit of the video processor in the embodiment can not only realize communication with the RS232 protocol of the control component, but also realize communication with the RS485 protocol, and the interface types are various. In addition, the first protocol conversion module 12 and the second protocol conversion module 13 are both connected to the same interface module 14, so that the number of the interface modules 14 is also small, which is beneficial to reducing the volume of a serial circuit of the video processor and reducing the cost.
According to the technical scheme of the embodiment, the control circuit of the adopted video processor comprises: the device comprises a channel selection module, a first protocol conversion module, a second protocol conversion module and an interface module; the input end of the channel selection module is connected with UART protocol data of the video processor, the first protocol data output end of the channel selection module is electrically connected with the input end of the first protocol conversion module, the second protocol data output end of the channel selection module is electrically connected with the input end of the second protocol conversion module, and the channel selection module is used for conducting the input end of the channel selection module with the first protocol data output end or the second protocol data output end according to a selection signal of the selection end of the channel selection module; the output end of the first protocol conversion module is electrically connected with the interface module, and the first protocol conversion module is used for converting UART protocol data into RS232 protocol data; the output end of the second protocol conversion module is electrically connected with the interface module, and the second protocol conversion module is used for converting UART protocol data into RS485 protocol data; the interface module is used for externally connecting the control assembly. The serial port circuit of the video processor can realize communication with the RS232 protocol of the control assembly and communication with the RS485 protocol, and has various interface types.
Optionally, fig. 3 is a schematic circuit diagram of a channel selection module and a peripheral circuit thereof according to an embodiment of the present utility model, and refer to fig. 3. The channel selection module is a TS3A5018PWR chip. The end D1 and the end D2 are respectively defined as UART_TX0 and UART_RX0 and are used for connecting a video processor; the UART_Tx1 and the UART_Rx1 are connected with the first protocol conversion module 12; the UART_TX2 and the UART_RX2 are connected with a second protocol conversion module 13; the selection terminal is the IN terminal, defined as aswt_in1. When aswt_in1 is high, channel a is open, channel B is closed, UART protocol data of the video processor is passed through channel D of channel select module 11 to channel a and then from channel a to the input of first protocol conversion module 12. When aswt_in1 is low, channel B is open, channel a is closed, UART protocol data of the video processor is passed through channel D of channel select module 11 to channel B and then from channel B to the input of second protocol conversion module 13. It is understood that the peripheral circuitry of the channel selection module may include components such as current limiting resistors.
Fig. 4 is a schematic circuit diagram of an interface module according to an embodiment of the present utility model, where the interface module includes peripheral circuits such as ESD protection devices in addition to the interface element 121.
Optionally, fig. 5 is a schematic circuit diagram of an amplifying module according to an embodiment of the present utility model, and referring to fig. 5, a serial port circuit of a video processor further includes an amplifying module, where the interface module is electrically connected to a selection end of the channel selection module through the amplifying module; the interface module is electrically connected with the input end of the amplifying module, and the output end of the amplifying module is electrically connected with the selection end of the channel selection module.
Specifically, the level of the selection signal output from the singlechip is possibly not matched with the level which can be processed by the channel selection module, and the selection signal can be amplified by the amplifying module and then output to the channel selection module, so that the channel selection module can normally process the selection signal.
Illustratively, as shown in FIG. 5, the amplification module includes: the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4 and the first triode Q1; the first end of the first resistor R1 is connected to a first voltage source VDD33, the second end of the first resistor R1 is electrically connected with the collector of the first triode Q1, and the collector of the first triode Q1 is used as the output end of the amplifying module; the first end of the second resistor R2 is used as an input end SWT_In1 of the amplifying module, and the second end of the second resistor R2 is electrically connected with the collector electrode of the first triode Q1; the first end of the third resistor R3 is electrically connected with the second end of the second resistor R2, and the second end of the third resistor R3 is electrically connected with the base electrode of the first triode Q1; the first end of the fourth resistor R4 is electrically connected with the base electrode of the first triode Q1, and the second end of the fourth resistor R4 and the emitter electrode of the first triode Q1 are grounded. The components constitute a common-emitter amplifying circuit, and specific parameters of the components can be set according to actual needs, and are not limited herein.
Optionally, fig. 6 is a schematic circuit diagram of a first protocol conversion module and a peripheral circuit thereof according to an embodiment of the present utility model, and refer to fig. 6. The first protocol conversion module is the SP3232EEY chip 122. The peripheral circuitry may include capacitors, resistors, etc., and is connected in a configuration as shown in fig. 6.
Optionally, fig. 7 is a schematic circuit diagram of a second protocol conversion module and a peripheral circuit thereof according to an embodiment of the present utility model. Referring to fig. 7, the second protocol conversion module is a max13487EESA chip. The peripheral circuits include components such as capacitors and resistors.
Optionally, fig. 8 is a schematic circuit diagram of a level conversion module according to an embodiment of the present utility model, and referring to fig. 8, a serial port circuit of a video processor further includes a level conversion module, and a second protocol data output end of the channel selection module is electrically connected to the second protocol conversion module through the level conversion module. The level conversion module can convert the level of the second protocol data output end and then output the converted level to the second protocol conversion module, so that the second protocol conversion module can normally process the received UART signal. As shown in fig. 8, each terminal of each second protocol data output terminal corresponds to a level conversion module, and each level conversion module includes: the fifth resistor R5, the first MOS tube T1 and the sixth resistor R6; the first end of the fifth resistor R5 is electrically connected with the second protocol data output end of the channel selection module, and the second end of the fifth resistor R5 is connected to the first voltage source VDD33; the control end of the first MOS tube is connected to a first voltage source VDD3, the first end of the first MOS tube T1 is electrically connected with the second protocol conversion module of the channel selection module, and the second end of the first MOS tube is electrically connected with the second protocol conversion module; the first end of the sixth resistor R6 is connected to the second voltage source +5V_standby, and the second end of the sixth resistor R6 is electrically connected with the second protocol conversion module. The first MOS transistor T1 may be turned on or off according to the output signal of the second protocol data output end, so as to control the output end thereof to output a high-low level after level conversion, for example, when uart_rx2 is high, the first transistor T1 is turned off, and RXD is pulled up to be high level through the sixth resistor R6; when uart_rx2 is low, the first MOS T1 is turned on, and RXD directly outputs low.
The embodiment of the utility model also provides a video processor system, which comprises a video processor and the serial circuit of the video processor provided by any embodiment of the utility model, and the serial circuit of the video processor provided by any embodiment of the utility model has the same beneficial effects and is not repeated here.
Optionally, the video processor further comprises a control component, the control component is electrically connected with the interface module, and the control component is a central control device or an intelligent business display main board. The intelligent business display main board has a display effect, and a user can select a selection signal output to the channel selection module through the intelligent business display main board.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present utility model may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present utility model are achieved, and the present utility model is not limited herein.
The above embodiments do not limit the scope of the present utility model. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included in the scope of the present utility model.
Claims (10)
1. A serial circuit of a video processor, the serial circuit of the video processor comprising: the device comprises a channel selection module, a first protocol conversion module, a second protocol conversion module and an interface module;
the input end of the channel selection module is connected with UART protocol data of the video processor, the first protocol data output end of the channel selection module is electrically connected with the input end of the first protocol conversion module, the second protocol data output end of the channel selection module is electrically connected with the input end of the second protocol conversion module, and the channel selection module is used for conducting the input end of the channel selection module with the first protocol data output end or the second protocol data output end according to a selection signal of the selection end of the channel selection module;
the output end of the first protocol conversion module is electrically connected with the interface module, and the first protocol conversion module is used for converting UART protocol data into RS232 protocol data;
the output end of the second protocol conversion module is electrically connected with the interface module, and the second protocol conversion module is used for converting UART protocol data into RS485 protocol data;
the interface module is used for externally connecting a control assembly.
2. The serial circuit of a video processor of claim 1, wherein the channel selection module is a TS3a5018PWR chip.
3. The serial circuit of the video processor of claim 2, further comprising an amplifying module, wherein the interface module is electrically connected to the selection terminal of the channel selection module through the amplifying module; the interface module is electrically connected with the input end of the amplifying module, and the output end of the amplifying module is electrically connected with the selection end of the channel selection module.
4. The serial circuit of a video processor of claim 3, wherein the amplification module comprises: the first resistor, the second resistor, the third resistor, the fourth resistor and the first triode;
the first end of the first resistor is connected to a first voltage source, the second end of the first resistor is electrically connected with the collector electrode of the first triode, and the collector electrode of the first triode is used as the output end of the amplifying module;
the first end of the second resistor is used as an input end of the amplifying module, and the second end of the second resistor is electrically connected with the collector electrode of the first triode;
the first end of the third resistor is electrically connected with the second end of the second resistor, and the second end of the third resistor is electrically connected with the base electrode of the first triode;
the first end of the fourth resistor is electrically connected with the base electrode of the first triode, and the second end of the fourth resistor is grounded; and the emitter electrode of the first triode is grounded.
5. The serial circuit of claim 1, wherein the first protocol conversion module is an SP3232EEY chip.
6. The serial circuit of claim 1, wherein the second protocol conversion module is a max13487EESA chip.
7. The serial circuit of claim 6, wherein the serial circuit of the video processor further comprises a level shift module, and the second protocol data output of the channel selection module is electrically connected to the second protocol conversion module through the level shift module.
8. The serial circuit of the video processor of claim 7, wherein the level shifting module comprises:
the fifth resistor, the first MOS tube and the sixth resistor;
the first end of the fifth resistor is electrically connected with the second protocol data output end of the channel selection module, and the second end of the fifth resistor is connected with a first voltage source;
the control end of the first MOS tube is connected to the first voltage source, the first end of the first MOS tube is electrically connected with the second protocol data output end of the channel selection module, and the second end of the first MOS tube is electrically connected with the second protocol conversion module;
and the first end of the sixth resistor is connected to a second voltage source, and the second end of the sixth resistor is electrically connected with the second protocol conversion module.
9. A video processor system comprising a video processor and the serial circuit of the video processor of any one of claims 1-8.
10. The video processor system of claim 9, further comprising the control component, the control component being electrically connected to the interface module, the control component being a central control device or an intelligent merchant display motherboard.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322379570.3U CN220419955U (en) | 2023-08-30 | 2023-08-30 | Serial port circuit of video processor and video processor system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322379570.3U CN220419955U (en) | 2023-08-30 | 2023-08-30 | Serial port circuit of video processor and video processor system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220419955U true CN220419955U (en) | 2024-01-30 |
Family
ID=89647948
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322379570.3U Active CN220419955U (en) | 2023-08-30 | 2023-08-30 | Serial port circuit of video processor and video processor system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220419955U (en) |
-
2023
- 2023-08-30 CN CN202322379570.3U patent/CN220419955U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101989246A (en) | Electronic device capable of automatically switching master and slave equipment modes of universal serial bus (USB) | |
| US7710099B2 (en) | Power control apparatus for motherboard | |
| CN212305299U (en) | Communication level conversion circuit | |
| CN110928823A (en) | Level conversion circuit | |
| CN103379400A (en) | Earphone detecting circuit and electronic apparatus having same | |
| CN101957650B (en) | Power supply circuit of central processing unit | |
| CN220419955U (en) | Serial port circuit of video processor and video processor system | |
| CN202102275U (en) | IO port expansion circuit | |
| CN105282653A (en) | Audio-insertion automatic wake-up apparatus and audio-insertion automatic wake-up method | |
| WO2014105295A1 (en) | Integration of signal sampling within transistor amplifier stage | |
| CN110502092B (en) | Power supply circuit and electronic equipment | |
| CN203809327U (en) | Fan control circuit | |
| CN109960677B (en) | Extension circuit for USB interface | |
| CN215904446U (en) | Unified output foot kicking sensor system | |
| CN103279443A (en) | Uart communication signal conversion circuit | |
| CN203537553U (en) | An Interface circuit realizing serial port and infrared multiplex functions | |
| CN110109860A (en) | Electronic system and signal switching circuit | |
| CN218122640U (en) | Matching circuit | |
| CN221101384U (en) | PCIe communication module based on DP interface | |
| CN109117401A (en) | A kind of serial port level changer | |
| CN112398716B (en) | Low-cost MBUS host circuit | |
| CN216098935U (en) | ADC channel expansion device and cleaning robot control circuit | |
| CN212965129U (en) | Differential sampling circuit for multi-path alternating current distribution voltage | |
| CN216929999U (en) | Level conversion circuit in unidirectional transmission circuit and electronic equipment | |
| CN218497463U (en) | IIC communication level matching circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |